blob: 02075bfcd8fda95fb4a8f7dcdff51918ba41ce36 [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_crtc.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
Andy Grossb9ed9f02012-10-16 00:17:40 -050022#include <drm/drm_mode.h>
Rob Clarkcd5351f2011-11-12 12:09:40 -060023#include "drm_crtc.h"
24#include "drm_crtc_helper.h"
25
26#define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
27
28struct omap_crtc {
29 struct drm_crtc base;
Rob Clarkbb5c2d92012-01-16 12:51:16 -060030 struct drm_plane *plane;
Rob Clarkf5f94542012-12-04 13:59:12 -060031
Rob Clarkbb5c2d92012-01-16 12:51:16 -060032 const char *name;
Rob Clarkf5f94542012-12-04 13:59:12 -060033 int pipe;
34 enum omap_channel channel;
35 struct omap_overlay_manager_info info;
36
37 /*
38 * Temporary: eventually this will go away, but it is needed
39 * for now to keep the output's happy. (They only need
40 * mgr->id.) Eventually this will be replaced w/ something
41 * more common-panel-framework-y
42 */
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +030043 struct omap_overlay_manager *mgr;
Rob Clarkf5f94542012-12-04 13:59:12 -060044
45 struct omap_video_timings timings;
46 bool enabled;
47 bool full_update;
48
49 struct omap_drm_apply apply;
50
51 struct omap_drm_irq apply_irq;
52 struct omap_drm_irq error_irq;
53
54 /* list of in-progress apply's: */
55 struct list_head pending_applies;
56
57 /* list of queued apply's: */
58 struct list_head queued_applies;
59
60 /* for handling queued and in-progress applies: */
61 struct work_struct apply_work;
Rob Clarkcd5351f2011-11-12 12:09:40 -060062
Rob Clarkbb5c2d92012-01-16 12:51:16 -060063 /* if there is a pending flip, these will be non-null: */
Rob Clarkcd5351f2011-11-12 12:09:40 -060064 struct drm_pending_vblank_event *event;
Rob Clarkbb5c2d92012-01-16 12:51:16 -060065 struct drm_framebuffer *old_fb;
Rob Clarkf5f94542012-12-04 13:59:12 -060066
67 /* for handling page flips without caring about what
68 * the callback is called from. Possibly we should just
69 * make omap_gem always call the cb from the worker so
70 * we don't have to care about this..
71 *
72 * XXX maybe fold into apply_work??
73 */
74 struct work_struct page_flip_work;
Rob Clarkcd5351f2011-11-12 12:09:40 -060075};
76
Archit Taneja0d8f3712013-03-26 19:15:19 +053077uint32_t pipe2vbl(struct drm_crtc *crtc)
78{
79 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
80
81 return dispc_mgr_get_vsync_irq(omap_crtc->channel);
82}
83
Rob Clarkf5f94542012-12-04 13:59:12 -060084/*
85 * Manager-ops, callbacks from output when they need to configure
86 * the upstream part of the video pipe.
87 *
88 * Most of these we can ignore until we add support for command-mode
89 * panels.. for video-mode the crtc-helpers already do an adequate
90 * job of sequencing the setup of the video pipe in the proper order
91 */
92
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +030093/* ovl-mgr-id -> crtc */
94static struct omap_crtc *omap_crtcs[8];
95
Rob Clarkf5f94542012-12-04 13:59:12 -060096/* we can probably ignore these until we support command-mode panels: */
97static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
98{
99}
100
101static int omap_crtc_enable(struct omap_overlay_manager *mgr)
102{
103 return 0;
104}
105
106static void omap_crtc_disable(struct omap_overlay_manager *mgr)
107{
108}
109
110static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
111 const struct omap_video_timings *timings)
112{
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300113 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
Rob Clarkf5f94542012-12-04 13:59:12 -0600114 DBG("%s", omap_crtc->name);
115 omap_crtc->timings = *timings;
116 omap_crtc->full_update = true;
117}
118
119static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
120 const struct dss_lcd_mgr_config *config)
121{
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300122 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
Rob Clarkf5f94542012-12-04 13:59:12 -0600123 DBG("%s", omap_crtc->name);
124 dispc_mgr_set_lcd_config(omap_crtc->channel, config);
125}
126
127static int omap_crtc_register_framedone_handler(
128 struct omap_overlay_manager *mgr,
129 void (*handler)(void *), void *data)
130{
131 return 0;
132}
133
134static void omap_crtc_unregister_framedone_handler(
135 struct omap_overlay_manager *mgr,
136 void (*handler)(void *), void *data)
137{
138}
139
140static const struct dss_mgr_ops mgr_ops = {
141 .start_update = omap_crtc_start_update,
142 .enable = omap_crtc_enable,
143 .disable = omap_crtc_disable,
144 .set_timings = omap_crtc_set_timings,
145 .set_lcd_config = omap_crtc_set_lcd_config,
146 .register_framedone_handler = omap_crtc_register_framedone_handler,
147 .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
148};
149
150/*
151 * CRTC funcs:
152 */
153
Rob Clarkcd5351f2011-11-12 12:09:40 -0600154static void omap_crtc_destroy(struct drm_crtc *crtc)
155{
156 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600157
158 DBG("%s", omap_crtc->name);
159
160 WARN_ON(omap_crtc->apply_irq.registered);
161 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
162
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600163 omap_crtc->plane->funcs->destroy(omap_crtc->plane);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600164 drm_crtc_cleanup(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600165
Rob Clarkcd5351f2011-11-12 12:09:40 -0600166 kfree(omap_crtc);
167}
168
169static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
170{
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600171 struct omap_drm_private *priv = crtc->dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600172 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600173 bool enabled = (mode == DRM_MODE_DPMS_ON);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600174 int i;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600175
Rob Clarkf5f94542012-12-04 13:59:12 -0600176 DBG("%s: %d", omap_crtc->name, mode);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600177
Rob Clarkf5f94542012-12-04 13:59:12 -0600178 if (enabled != omap_crtc->enabled) {
179 omap_crtc->enabled = enabled;
180 omap_crtc->full_update = true;
181 omap_crtc_apply(crtc, &omap_crtc->apply);
182
183 /* also enable our private plane: */
184 WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
185
186 /* and any attached overlay planes: */
187 for (i = 0; i < priv->num_planes; i++) {
188 struct drm_plane *plane = priv->planes[i];
189 if (plane->crtc == crtc)
190 WARN_ON(omap_plane_dpms(plane, mode));
191 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600192 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600193}
194
195static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200196 const struct drm_display_mode *mode,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600197 struct drm_display_mode *adjusted_mode)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600198{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600199 return true;
200}
201
202static int omap_crtc_mode_set(struct drm_crtc *crtc,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600203 struct drm_display_mode *mode,
204 struct drm_display_mode *adjusted_mode,
205 int x, int y,
206 struct drm_framebuffer *old_fb)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600207{
208 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
209
Rob Clarkf5f94542012-12-04 13:59:12 -0600210 mode = adjusted_mode;
211
212 DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
213 omap_crtc->name, mode->base.id, mode->name,
214 mode->vrefresh, mode->clock,
215 mode->hdisplay, mode->hsync_start,
216 mode->hsync_end, mode->htotal,
217 mode->vdisplay, mode->vsync_start,
218 mode->vsync_end, mode->vtotal,
219 mode->type, mode->flags);
220
221 copy_timings_drm_to_omap(&omap_crtc->timings, mode);
222 omap_crtc->full_update = true;
223
224 return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600225 0, 0, mode->hdisplay, mode->vdisplay,
226 x << 16, y << 16,
Rob Clarkf5f94542012-12-04 13:59:12 -0600227 mode->hdisplay << 16, mode->vdisplay << 16,
228 NULL, NULL);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600229}
230
231static void omap_crtc_prepare(struct drm_crtc *crtc)
232{
233 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600234 DBG("%s", omap_crtc->name);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600235 omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
236}
237
238static void omap_crtc_commit(struct drm_crtc *crtc)
239{
240 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600241 DBG("%s", omap_crtc->name);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600242 omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
243}
244
245static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600246 struct drm_framebuffer *old_fb)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600247{
248 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600249 struct drm_plane *plane = omap_crtc->plane;
250 struct drm_display_mode *mode = &crtc->mode;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600251
Rob Clarkf5f94542012-12-04 13:59:12 -0600252 return omap_plane_mode_set(plane, crtc, crtc->fb,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600253 0, 0, mode->hdisplay, mode->vdisplay,
254 x << 16, y << 16,
Rob Clarkf5f94542012-12-04 13:59:12 -0600255 mode->hdisplay << 16, mode->vdisplay << 16,
256 NULL, NULL);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600257}
258
259static void omap_crtc_load_lut(struct drm_crtc *crtc)
260{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600261}
262
Rob Clark72d0c332012-03-11 21:11:21 -0500263static void vblank_cb(void *arg)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600264{
265 struct drm_crtc *crtc = arg;
266 struct drm_device *dev = crtc->dev;
267 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600268 unsigned long flags;
269
Rob Clarkf5f94542012-12-04 13:59:12 -0600270 spin_lock_irqsave(&dev->event_lock, flags);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600271
272 /* wakeup userspace */
Rob Clarkf5f94542012-12-04 13:59:12 -0600273 if (omap_crtc->event)
274 drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
Rob Clark7411f9c2012-03-11 21:11:22 -0500275
Rob Clarkf5f94542012-12-04 13:59:12 -0600276 omap_crtc->event = NULL;
277 omap_crtc->old_fb = NULL;
278
279 spin_unlock_irqrestore(&dev->event_lock, flags);
280}
281
282static void page_flip_worker(struct work_struct *work)
283{
284 struct omap_crtc *omap_crtc =
285 container_of(work, struct omap_crtc, page_flip_work);
286 struct drm_crtc *crtc = &omap_crtc->base;
Rob Clarkf5f94542012-12-04 13:59:12 -0600287 struct drm_display_mode *mode = &crtc->mode;
288 struct drm_gem_object *bo;
289
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100290 mutex_lock(&crtc->mutex);
Rob Clarkf5f94542012-12-04 13:59:12 -0600291 omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
292 0, 0, mode->hdisplay, mode->vdisplay,
293 crtc->x << 16, crtc->y << 16,
294 mode->hdisplay << 16, mode->vdisplay << 16,
295 vblank_cb, crtc);
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100296 mutex_unlock(&crtc->mutex);
Rob Clarkf5f94542012-12-04 13:59:12 -0600297
298 bo = omap_framebuffer_bo(crtc->fb, 0);
299 drm_gem_object_unreference_unlocked(bo);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600300}
301
Rob Clark72d0c332012-03-11 21:11:21 -0500302static void page_flip_cb(void *arg)
303{
304 struct drm_crtc *crtc = arg;
305 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600306 struct omap_drm_private *priv = crtc->dev->dev_private;
Rob Clark72d0c332012-03-11 21:11:21 -0500307
Rob Clarkf5f94542012-12-04 13:59:12 -0600308 /* avoid assumptions about what ctxt we are called from: */
309 queue_work(priv->wq, &omap_crtc->page_flip_work);
Rob Clark72d0c332012-03-11 21:11:21 -0500310}
311
Rob Clarkcd5351f2011-11-12 12:09:40 -0600312static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
313 struct drm_framebuffer *fb,
314 struct drm_pending_vblank_event *event)
315{
316 struct drm_device *dev = crtc->dev;
317 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clark119c0812012-09-04 17:46:22 -0500318 struct drm_gem_object *bo;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600319
Rob Clarkf5f94542012-12-04 13:59:12 -0600320 DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1,
321 fb->base.id, event);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600322
Rob Clarkf5f94542012-12-04 13:59:12 -0600323 if (omap_crtc->old_fb) {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600324 dev_err(dev->dev, "already a pending flip\n");
325 return -EINVAL;
326 }
327
Rob Clarkcd5351f2011-11-12 12:09:40 -0600328 omap_crtc->event = event;
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600329 crtc->fb = fb;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600330
Rob Clark119c0812012-09-04 17:46:22 -0500331 /*
332 * Hold a reference temporarily until the crtc is updated
333 * and takes the reference to the bo. This avoids it
334 * getting freed from under us:
335 */
336 bo = omap_framebuffer_bo(fb, 0);
337 drm_gem_object_reference(bo);
338
339 omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600340
341 return 0;
342}
343
Rob Clark3c810c62012-08-15 15:18:01 -0500344static int omap_crtc_set_property(struct drm_crtc *crtc,
345 struct drm_property *property, uint64_t val)
346{
347 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clark1e0fdfc2012-09-04 11:36:20 -0500348 struct omap_drm_private *priv = crtc->dev->dev_private;
349
350 if (property == priv->rotation_prop) {
351 crtc->invert_dimensions =
352 !!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
353 }
354
Rob Clark3c810c62012-08-15 15:18:01 -0500355 return omap_plane_set_property(omap_crtc->plane, property, val);
356}
357
Rob Clarkcd5351f2011-11-12 12:09:40 -0600358static const struct drm_crtc_funcs omap_crtc_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600359 .set_config = drm_crtc_helper_set_config,
360 .destroy = omap_crtc_destroy,
361 .page_flip = omap_crtc_page_flip_locked,
Rob Clark3c810c62012-08-15 15:18:01 -0500362 .set_property = omap_crtc_set_property,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600363};
364
365static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
366 .dpms = omap_crtc_dpms,
367 .mode_fixup = omap_crtc_mode_fixup,
368 .mode_set = omap_crtc_mode_set,
369 .prepare = omap_crtc_prepare,
370 .commit = omap_crtc_commit,
371 .mode_set_base = omap_crtc_mode_set_base,
372 .load_lut = omap_crtc_load_lut,
373};
374
Rob Clarkf5f94542012-12-04 13:59:12 -0600375const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
376{
377 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
378 return &omap_crtc->timings;
379}
380
381enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
382{
383 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
384 return omap_crtc->channel;
385}
386
387static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
388{
389 struct omap_crtc *omap_crtc =
390 container_of(irq, struct omap_crtc, error_irq);
391 struct drm_crtc *crtc = &omap_crtc->base;
392 DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
393 /* avoid getting in a flood, unregister the irq until next vblank */
394 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
395}
396
397static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
398{
399 struct omap_crtc *omap_crtc =
400 container_of(irq, struct omap_crtc, apply_irq);
401 struct drm_crtc *crtc = &omap_crtc->base;
402
403 if (!omap_crtc->error_irq.registered)
404 omap_irq_register(crtc->dev, &omap_crtc->error_irq);
405
406 if (!dispc_mgr_go_busy(omap_crtc->channel)) {
407 struct omap_drm_private *priv =
408 crtc->dev->dev_private;
409 DBG("%s: apply done", omap_crtc->name);
410 omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
411 queue_work(priv->wq, &omap_crtc->apply_work);
412 }
413}
414
415static void apply_worker(struct work_struct *work)
416{
417 struct omap_crtc *omap_crtc =
418 container_of(work, struct omap_crtc, apply_work);
419 struct drm_crtc *crtc = &omap_crtc->base;
420 struct drm_device *dev = crtc->dev;
421 struct omap_drm_apply *apply, *n;
422 bool need_apply;
423
424 /*
425 * Synchronize everything on mode_config.mutex, to keep
426 * the callbacks and list modification all serialized
427 * with respect to modesetting ioctls from userspace.
428 */
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100429 mutex_lock(&crtc->mutex);
Rob Clarkf5f94542012-12-04 13:59:12 -0600430 dispc_runtime_get();
431
432 /*
433 * If we are still pending a previous update, wait.. when the
434 * pending update completes, we get kicked again.
435 */
436 if (omap_crtc->apply_irq.registered)
437 goto out;
438
439 /* finish up previous apply's: */
440 list_for_each_entry_safe(apply, n,
441 &omap_crtc->pending_applies, pending_node) {
442 apply->post_apply(apply);
443 list_del(&apply->pending_node);
444 }
445
446 need_apply = !list_empty(&omap_crtc->queued_applies);
447
448 /* then handle the next round of of queued apply's: */
449 list_for_each_entry_safe(apply, n,
450 &omap_crtc->queued_applies, queued_node) {
451 apply->pre_apply(apply);
452 list_del(&apply->queued_node);
453 apply->queued = false;
454 list_add_tail(&apply->pending_node,
455 &omap_crtc->pending_applies);
456 }
457
458 if (need_apply) {
459 enum omap_channel channel = omap_crtc->channel;
460
461 DBG("%s: GO", omap_crtc->name);
462
463 if (dispc_mgr_is_enabled(channel)) {
464 omap_irq_register(dev, &omap_crtc->apply_irq);
465 dispc_mgr_go(channel);
466 } else {
467 struct omap_drm_private *priv = dev->dev_private;
468 queue_work(priv->wq, &omap_crtc->apply_work);
469 }
470 }
471
472out:
473 dispc_runtime_put();
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100474 mutex_unlock(&crtc->mutex);
Rob Clarkf5f94542012-12-04 13:59:12 -0600475}
476
477int omap_crtc_apply(struct drm_crtc *crtc,
478 struct omap_drm_apply *apply)
479{
480 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600481
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100482 WARN_ON(!mutex_is_locked(&crtc->mutex));
Rob Clarkf5f94542012-12-04 13:59:12 -0600483
484 /* no need to queue it again if it is already queued: */
485 if (apply->queued)
486 return 0;
487
488 apply->queued = true;
489 list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
490
491 /*
492 * If there are no currently pending updates, then go ahead and
493 * kick the worker immediately, otherwise it will run again when
494 * the current update finishes.
495 */
496 if (list_empty(&omap_crtc->pending_applies)) {
497 struct omap_drm_private *priv = crtc->dev->dev_private;
498 queue_work(priv->wq, &omap_crtc->apply_work);
499 }
500
501 return 0;
502}
503
504/* called only from apply */
505static void set_enabled(struct drm_crtc *crtc, bool enable)
506{
507 struct drm_device *dev = crtc->dev;
508 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
509 enum omap_channel channel = omap_crtc->channel;
510 struct omap_irq_wait *wait = NULL;
511
512 if (dispc_mgr_is_enabled(channel) == enable)
513 return;
514
515 /* ignore sync-lost irqs during enable/disable */
516 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
517
518 if (dispc_mgr_get_framedone_irq(channel)) {
519 if (!enable) {
520 wait = omap_irq_wait_init(dev,
521 dispc_mgr_get_framedone_irq(channel), 1);
522 }
523 } else {
524 /*
525 * When we disable digit output, we need to wait until fields
526 * are done. Otherwise the DSS is still working, and turning
527 * off the clocks prevents DSS from going to OFF mode. And when
528 * enabling, we need to wait for the extra sync losts
529 */
530 wait = omap_irq_wait_init(dev,
531 dispc_mgr_get_vsync_irq(channel), 2);
532 }
533
534 dispc_mgr_enable(channel, enable);
535
536 if (wait) {
537 int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
538 if (ret) {
539 dev_err(dev->dev, "%s: timeout waiting for %s\n",
540 omap_crtc->name, enable ? "enable" : "disable");
541 }
542 }
543
544 omap_irq_register(crtc->dev, &omap_crtc->error_irq);
545}
546
547static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
548{
549 struct omap_crtc *omap_crtc =
550 container_of(apply, struct omap_crtc, apply);
551 struct drm_crtc *crtc = &omap_crtc->base;
552 struct drm_encoder *encoder = NULL;
553
554 DBG("%s: enabled=%d, full=%d", omap_crtc->name,
555 omap_crtc->enabled, omap_crtc->full_update);
556
557 if (omap_crtc->full_update) {
558 struct omap_drm_private *priv = crtc->dev->dev_private;
559 int i;
560 for (i = 0; i < priv->num_encoders; i++) {
561 if (priv->encoders[i]->crtc == crtc) {
562 encoder = priv->encoders[i];
563 break;
564 }
565 }
566 }
567
568 if (!omap_crtc->enabled) {
569 set_enabled(&omap_crtc->base, false);
570 if (encoder)
571 omap_encoder_set_enabled(encoder, false);
572 } else {
573 if (encoder) {
574 omap_encoder_set_enabled(encoder, false);
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300575 omap_encoder_update(encoder, omap_crtc->mgr,
Rob Clarkf5f94542012-12-04 13:59:12 -0600576 &omap_crtc->timings);
577 omap_encoder_set_enabled(encoder, true);
578 omap_crtc->full_update = false;
579 }
580
581 dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
582 dispc_mgr_set_timings(omap_crtc->channel,
583 &omap_crtc->timings);
584 set_enabled(&omap_crtc->base, true);
585 }
586
587 omap_crtc->full_update = false;
588}
589
590static void omap_crtc_post_apply(struct omap_drm_apply *apply)
591{
592 /* nothing needed for post-apply */
593}
594
595static const char *channel_names[] = {
596 [OMAP_DSS_CHANNEL_LCD] = "lcd",
597 [OMAP_DSS_CHANNEL_DIGIT] = "tv",
598 [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
599};
600
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300601void omap_crtc_pre_init(void)
602{
603 dss_install_mgr_ops(&mgr_ops);
604}
605
Rob Clarkcd5351f2011-11-12 12:09:40 -0600606/* initialize crtc */
607struct drm_crtc *omap_crtc_init(struct drm_device *dev,
Rob Clarkf5f94542012-12-04 13:59:12 -0600608 struct drm_plane *plane, enum omap_channel channel, int id)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600609{
610 struct drm_crtc *crtc = NULL;
Rob Clarkf5f94542012-12-04 13:59:12 -0600611 struct omap_crtc *omap_crtc;
612 struct omap_overlay_manager_info *info;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600613
Rob Clarkf5f94542012-12-04 13:59:12 -0600614 DBG("%s", channel_names[channel]);
615
616 omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
Joe Perches78110bb2013-02-11 09:41:29 -0800617 if (!omap_crtc)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600618 goto fail;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600619
Rob Clarkcd5351f2011-11-12 12:09:40 -0600620 crtc = &omap_crtc->base;
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600621
Rob Clarkf5f94542012-12-04 13:59:12 -0600622 INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
623 INIT_WORK(&omap_crtc->apply_work, apply_worker);
624
625 INIT_LIST_HEAD(&omap_crtc->pending_applies);
626 INIT_LIST_HEAD(&omap_crtc->queued_applies);
627
628 omap_crtc->apply.pre_apply = omap_crtc_pre_apply;
629 omap_crtc->apply.post_apply = omap_crtc_post_apply;
630
Archit Taneja0d8f3712013-03-26 19:15:19 +0530631 omap_crtc->channel = channel;
632 omap_crtc->plane = plane;
633 omap_crtc->plane->crtc = crtc;
634 omap_crtc->name = channel_names[channel];
635 omap_crtc->pipe = id;
636
637 omap_crtc->apply_irq.irqmask = pipe2vbl(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600638 omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
639
640 omap_crtc->error_irq.irqmask =
641 dispc_mgr_get_sync_lost_irq(channel);
642 omap_crtc->error_irq.irq = omap_crtc_error_irq;
643 omap_irq_register(dev, &omap_crtc->error_irq);
644
Rob Clarkf5f94542012-12-04 13:59:12 -0600645 /* temporary: */
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300646 omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
Rob Clarkf5f94542012-12-04 13:59:12 -0600647
648 /* TODO: fix hard-coded setup.. add properties! */
649 info = &omap_crtc->info;
650 info->default_color = 0x00000000;
651 info->trans_key = 0x00000000;
652 info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
653 info->trans_enabled = false;
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600654
Rob Clarkcd5351f2011-11-12 12:09:40 -0600655 drm_crtc_init(dev, crtc, &omap_crtc_funcs);
656 drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
657
Rob Clark3c810c62012-08-15 15:18:01 -0500658 omap_plane_install_properties(omap_crtc->plane, &crtc->base);
659
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300660 omap_crtcs[channel] = omap_crtc;
661
Rob Clarkcd5351f2011-11-12 12:09:40 -0600662 return crtc;
663
664fail:
YAMANE Toshiakid21a9d32012-11-14 19:30:23 +0900665 if (crtc)
Rob Clark65b0bd02011-12-09 23:26:07 -0600666 omap_crtc_destroy(crtc);
YAMANE Toshiakid21a9d32012-11-14 19:30:23 +0900667
Rob Clarkcd5351f2011-11-12 12:09:40 -0600668 return NULL;
669}