| commit | fde207eb15115f1081e589267ebdf442aa54cda5 | [log] [tgz] |
|---|---|---|
| author | Bill Huang <bilhuang@nvidia.com> | Thu Jun 18 17:28:26 2015 -0400 |
| committer | Thierry Reding <treding@nvidia.com> | Fri Nov 20 18:05:04 2015 +0100 |
| tree | d6f9907076138f33db9691e28d8b6bcfded1a214 | |
| parent | 407254da291c03c32109881ca8cbda5607714a8f [diff] |
clk: tegra: pll: Add code to handle if resets are supported by PLL If a PLL has a reset_reg specified, properly handle that in the enable/disable logic paths. Reviewed-by: Benson Leung <bleung@chromium.org> Signed-off-by: Bill Huang <bilhuang@nvidia.com> Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>