| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| # Copyright (c) 2020 NXP |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NXP iMX8MP Soc USB Controller |
| |
| maintainers: |
| - Li Jun <jun.li@nxp.com> |
| |
| properties: |
| compatible: |
| const: fsl,imx8mp-dwc3 |
| |
| reg: |
| maxItems: 1 |
| description: Address and length of the register set for the wrapper of |
| dwc3 core on the SOC. |
| |
| "#address-cells": |
| enum: [ 1, 2 ] |
| |
| "#size-cells": |
| enum: [ 1, 2 ] |
| |
| dma-ranges: |
| description: |
| See section 2.3.9 of the DeviceTree Specification. |
| |
| ranges: true |
| |
| interrupts: |
| maxItems: 1 |
| description: The interrupt that is asserted when a wakeup event is |
| received. |
| |
| clocks: |
| description: |
| A list of phandle and clock-specifier pairs for the clocks |
| listed in clock-names. |
| items: |
| - description: system hsio root clock. |
| - description: suspend clock, used for usb wakeup logic. |
| |
| clock-names: |
| items: |
| - const: hsio |
| - const: suspend |
| |
| # Required child node: |
| |
| patternProperties: |
| "^dwc3@[0-9a-f]+$": |
| type: object |
| description: |
| A child node must exist to represent the core DWC3 IP block |
| The content of the node is defined in dwc3.txt. |
| |
| required: |
| - compatible |
| - reg |
| - "#address-cells" |
| - "#size-cells" |
| - dma-ranges |
| - ranges |
| - clocks |
| - clock-names |
| - interrupts |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/imx8mp-clock.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| usb3_0: usb@32f10100 { |
| compatible = "fsl,imx8mp-dwc3"; |
| reg = <0x32f10100 0x8>; |
| clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, |
| <&clk IMX8MP_CLK_USB_ROOT>; |
| clock-names = "hsio", "suspend"; |
| interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| dma-ranges = <0x40000000 0x40000000 0xc0000000>; |
| ranges; |
| |
| dwc3@38100000 { |
| compatible = "snps,dwc3"; |
| reg = <0x38100000 0x10000>; |
| clocks = <&clk IMX8MP_CLK_HSIO_AXI>, |
| <&clk IMX8MP_CLK_USB_CORE_REF>, |
| <&clk IMX8MP_CLK_USB_ROOT>; |
| clock-names = "bus_early", "ref", "suspend"; |
| assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; |
| assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; |
| assigned-clock-rates = <500000000>; |
| interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
| phys = <&usb3_phy0>, <&usb3_phy0>; |
| phy-names = "usb2-phy", "usb3-phy"; |
| snps,dis-u2-freeclk-exists-quirk; |
| }; |
| }; |