| Microsemi Ocelot SoC ICPU Interrupt Controller |
| - compatible : should be "mscc,ocelot-icpu-intr" |
| - reg : Specifies base physical address and size of the registers. |
| - interrupt-controller : Identifies the node as an interrupt controller |
| - #interrupt-cells : Specifies the number of cells needed to encode an |
| interrupt source. The value shall be 1. |
| - interrupt-parent : phandle of the CPU interrupt controller. |
| - interrupts : Specifies the CPU interrupt the controller is connected to. |
| intc: interrupt-controller@70000070 { |
| compatible = "mscc,ocelot-icpu-intr"; |
| interrupt-parent = <&cpuintc>; |