| commit | 00d082cc4ea6e42ec4fed832a1020231bb1ca150 | [log] [tgz] |
|---|---|---|
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | Wed Mar 06 22:48:35 2019 +0200 |
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | Thu Mar 28 06:12:42 2019 +0200 |
| tree | 6b2257d90fee778e56f93003a7fab563d4536fec | |
| parent | 871370308675e477abd57a69ce66ca4730a4249c [diff] |
drm: rcar-du: lvds: Set LVEN and LVRES bits together on D3 On the D3 SoC the LVDS PHY must be enabled in the same register write that enables the LVDS output. Skip writing the LVEN bit independently on that platform, it will be set by the write that sets LVRES. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>