blob: 4b58e812cf674c9a2025e4a731fcaae9e961c21f [file] [log] [blame]
Will Deacon478fcb22012-03-05 11:49:33 +00001/*
2 * Based on arch/arm/kernel/ptrace.c
3 *
4 * By Ross Biro 1/23/92
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 * Copyright (C) 2012 ARM Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
AKASHI Takahirofd92d4a2014-04-30 10:51:32 +010022#include <linux/compat.h>
Will Deacon478fcb22012-03-05 11:49:33 +000023#include <linux/kernel.h>
24#include <linux/sched.h>
25#include <linux/mm.h>
26#include <linux/smp.h>
27#include <linux/ptrace.h>
28#include <linux/user.h>
29#include <linux/security.h>
30#include <linux/init.h>
31#include <linux/signal.h>
32#include <linux/uaccess.h>
33#include <linux/perf_event.h>
34#include <linux/hw_breakpoint.h>
35#include <linux/regset.h>
36#include <linux/tracehook.h>
37#include <linux/elf.h>
38
39#include <asm/compat.h>
40#include <asm/debug-monitors.h>
41#include <asm/pgtable.h>
42#include <asm/traps.h>
43#include <asm/system_misc.h>
44
45/*
46 * TODO: does not yet catch signals sent when the child dies.
47 * in exit.c or in signal.c.
48 */
49
50/*
51 * Called by kernel/ptrace.c when detaching..
52 */
53void ptrace_disable(struct task_struct *child)
54{
55}
56
Will Deacon478fcb22012-03-05 11:49:33 +000057#ifdef CONFIG_HAVE_HW_BREAKPOINT
58/*
59 * Handle hitting a HW-breakpoint.
60 */
61static void ptrace_hbptriggered(struct perf_event *bp,
62 struct perf_sample_data *data,
63 struct pt_regs *regs)
64{
65 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
66 siginfo_t info = {
67 .si_signo = SIGTRAP,
68 .si_errno = 0,
69 .si_code = TRAP_HWBKPT,
70 .si_addr = (void __user *)(bkpt->trigger),
71 };
72
73#ifdef CONFIG_COMPAT
74 int i;
75
76 if (!is_compat_task())
77 goto send_sig;
78
79 for (i = 0; i < ARM_MAX_BRP; ++i) {
80 if (current->thread.debug.hbp_break[i] == bp) {
81 info.si_errno = (i << 1) + 1;
82 break;
83 }
84 }
85 for (i = ARM_MAX_BRP; i < ARM_MAX_HBP_SLOTS && !bp; ++i) {
86 if (current->thread.debug.hbp_watch[i] == bp) {
87 info.si_errno = -((i << 1) + 1);
88 break;
89 }
90 }
91
92send_sig:
93#endif
94 force_sig_info(SIGTRAP, &info, current);
95}
96
97/*
98 * Unregister breakpoints from this task and reset the pointers in
99 * the thread_struct.
100 */
101void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
102{
103 int i;
104 struct thread_struct *t = &tsk->thread;
105
106 for (i = 0; i < ARM_MAX_BRP; i++) {
107 if (t->debug.hbp_break[i]) {
108 unregister_hw_breakpoint(t->debug.hbp_break[i]);
109 t->debug.hbp_break[i] = NULL;
110 }
111 }
112
113 for (i = 0; i < ARM_MAX_WRP; i++) {
114 if (t->debug.hbp_watch[i]) {
115 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
116 t->debug.hbp_watch[i] = NULL;
117 }
118 }
119}
120
121void ptrace_hw_copy_thread(struct task_struct *tsk)
122{
123 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
124}
125
126static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
127 struct task_struct *tsk,
128 unsigned long idx)
129{
130 struct perf_event *bp = ERR_PTR(-EINVAL);
131
132 switch (note_type) {
133 case NT_ARM_HW_BREAK:
134 if (idx < ARM_MAX_BRP)
135 bp = tsk->thread.debug.hbp_break[idx];
136 break;
137 case NT_ARM_HW_WATCH:
138 if (idx < ARM_MAX_WRP)
139 bp = tsk->thread.debug.hbp_watch[idx];
140 break;
141 }
142
143 return bp;
144}
145
146static int ptrace_hbp_set_event(unsigned int note_type,
147 struct task_struct *tsk,
148 unsigned long idx,
149 struct perf_event *bp)
150{
151 int err = -EINVAL;
152
153 switch (note_type) {
154 case NT_ARM_HW_BREAK:
155 if (idx < ARM_MAX_BRP) {
156 tsk->thread.debug.hbp_break[idx] = bp;
157 err = 0;
158 }
159 break;
160 case NT_ARM_HW_WATCH:
161 if (idx < ARM_MAX_WRP) {
162 tsk->thread.debug.hbp_watch[idx] = bp;
163 err = 0;
164 }
165 break;
166 }
167
168 return err;
169}
170
171static struct perf_event *ptrace_hbp_create(unsigned int note_type,
172 struct task_struct *tsk,
173 unsigned long idx)
174{
175 struct perf_event *bp;
176 struct perf_event_attr attr;
177 int err, type;
178
179 switch (note_type) {
180 case NT_ARM_HW_BREAK:
181 type = HW_BREAKPOINT_X;
182 break;
183 case NT_ARM_HW_WATCH:
184 type = HW_BREAKPOINT_RW;
185 break;
186 default:
187 return ERR_PTR(-EINVAL);
188 }
189
190 ptrace_breakpoint_init(&attr);
191
192 /*
193 * Initialise fields to sane defaults
194 * (i.e. values that will pass validation).
195 */
196 attr.bp_addr = 0;
197 attr.bp_len = HW_BREAKPOINT_LEN_4;
198 attr.bp_type = type;
199 attr.disabled = 1;
200
201 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
202 if (IS_ERR(bp))
203 return bp;
204
205 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
206 if (err)
207 return ERR_PTR(err);
208
209 return bp;
210}
211
212static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
213 struct arch_hw_breakpoint_ctrl ctrl,
214 struct perf_event_attr *attr)
215{
Will Deacon8f34a1d2012-10-18 15:17:00 +0100216 int err, len, type, disabled = !ctrl.enabled;
Will Deacon478fcb22012-03-05 11:49:33 +0000217
Will Deaconcdc27c22013-12-17 17:09:08 +0000218 attr->disabled = disabled;
219 if (disabled)
220 return 0;
Will Deacon478fcb22012-03-05 11:49:33 +0000221
Will Deaconcdc27c22013-12-17 17:09:08 +0000222 err = arch_bp_generic_fields(ctrl, &len, &type);
223 if (err)
224 return err;
225
226 switch (note_type) {
227 case NT_ARM_HW_BREAK:
228 if ((type & HW_BREAKPOINT_X) != type)
Will Deacon478fcb22012-03-05 11:49:33 +0000229 return -EINVAL;
Will Deaconcdc27c22013-12-17 17:09:08 +0000230 break;
231 case NT_ARM_HW_WATCH:
232 if ((type & HW_BREAKPOINT_RW) != type)
233 return -EINVAL;
234 break;
235 default:
236 return -EINVAL;
Will Deacon478fcb22012-03-05 11:49:33 +0000237 }
238
239 attr->bp_len = len;
240 attr->bp_type = type;
Will Deacon478fcb22012-03-05 11:49:33 +0000241
242 return 0;
243}
244
245static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
246{
247 u8 num;
248 u32 reg = 0;
249
250 switch (note_type) {
251 case NT_ARM_HW_BREAK:
252 num = hw_breakpoint_slots(TYPE_INST);
253 break;
254 case NT_ARM_HW_WATCH:
255 num = hw_breakpoint_slots(TYPE_DATA);
256 break;
257 default:
258 return -EINVAL;
259 }
260
261 reg |= debug_monitors_arch();
262 reg <<= 8;
263 reg |= num;
264
265 *info = reg;
266 return 0;
267}
268
269static int ptrace_hbp_get_ctrl(unsigned int note_type,
270 struct task_struct *tsk,
271 unsigned long idx,
272 u32 *ctrl)
273{
274 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
275
276 if (IS_ERR(bp))
277 return PTR_ERR(bp);
278
279 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
280 return 0;
281}
282
283static int ptrace_hbp_get_addr(unsigned int note_type,
284 struct task_struct *tsk,
285 unsigned long idx,
286 u64 *addr)
287{
288 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
289
290 if (IS_ERR(bp))
291 return PTR_ERR(bp);
292
293 *addr = bp ? bp->attr.bp_addr : 0;
294 return 0;
295}
296
297static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
298 struct task_struct *tsk,
299 unsigned long idx)
300{
301 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
302
303 if (!bp)
304 bp = ptrace_hbp_create(note_type, tsk, idx);
305
306 return bp;
307}
308
309static int ptrace_hbp_set_ctrl(unsigned int note_type,
310 struct task_struct *tsk,
311 unsigned long idx,
312 u32 uctrl)
313{
314 int err;
315 struct perf_event *bp;
316 struct perf_event_attr attr;
317 struct arch_hw_breakpoint_ctrl ctrl;
318
319 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
320 if (IS_ERR(bp)) {
321 err = PTR_ERR(bp);
322 return err;
323 }
324
325 attr = bp->attr;
326 decode_ctrl_reg(uctrl, &ctrl);
327 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
328 if (err)
329 return err;
330
331 return modify_user_hw_breakpoint(bp, &attr);
332}
333
334static int ptrace_hbp_set_addr(unsigned int note_type,
335 struct task_struct *tsk,
336 unsigned long idx,
337 u64 addr)
338{
339 int err;
340 struct perf_event *bp;
341 struct perf_event_attr attr;
342
343 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
344 if (IS_ERR(bp)) {
345 err = PTR_ERR(bp);
346 return err;
347 }
348
349 attr = bp->attr;
350 attr.bp_addr = addr;
351 err = modify_user_hw_breakpoint(bp, &attr);
352 return err;
353}
354
355#define PTRACE_HBP_ADDR_SZ sizeof(u64)
356#define PTRACE_HBP_CTRL_SZ sizeof(u32)
Will Deacon7797d172012-10-11 12:10:57 +0100357#define PTRACE_HBP_PAD_SZ sizeof(u32)
Will Deacon478fcb22012-03-05 11:49:33 +0000358
359static int hw_break_get(struct task_struct *target,
360 const struct user_regset *regset,
361 unsigned int pos, unsigned int count,
362 void *kbuf, void __user *ubuf)
363{
364 unsigned int note_type = regset->core_note_type;
Will Deacon7797d172012-10-11 12:10:57 +0100365 int ret, idx = 0, offset, limit;
Will Deacon478fcb22012-03-05 11:49:33 +0000366 u32 info, ctrl;
367 u64 addr;
368
369 /* Resource info */
370 ret = ptrace_hbp_get_resource_info(note_type, &info);
371 if (ret)
372 return ret;
373
Will Deacon7797d172012-10-11 12:10:57 +0100374 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
375 sizeof(info));
376 if (ret)
377 return ret;
378
379 /* Pad */
380 offset = offsetof(struct user_hwdebug_state, pad);
381 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
382 offset + PTRACE_HBP_PAD_SZ);
Will Deacon478fcb22012-03-05 11:49:33 +0000383 if (ret)
384 return ret;
385
386 /* (address, ctrl) registers */
Will Deacon7797d172012-10-11 12:10:57 +0100387 offset = offsetof(struct user_hwdebug_state, dbg_regs);
Will Deacon478fcb22012-03-05 11:49:33 +0000388 limit = regset->n * regset->size;
389 while (count && offset < limit) {
390 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
391 if (ret)
392 return ret;
393 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
394 offset, offset + PTRACE_HBP_ADDR_SZ);
395 if (ret)
396 return ret;
397 offset += PTRACE_HBP_ADDR_SZ;
398
399 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
400 if (ret)
401 return ret;
402 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
403 offset, offset + PTRACE_HBP_CTRL_SZ);
404 if (ret)
405 return ret;
406 offset += PTRACE_HBP_CTRL_SZ;
Will Deacon7797d172012-10-11 12:10:57 +0100407
408 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
409 offset,
410 offset + PTRACE_HBP_PAD_SZ);
411 if (ret)
412 return ret;
413 offset += PTRACE_HBP_PAD_SZ;
Will Deacon478fcb22012-03-05 11:49:33 +0000414 idx++;
415 }
416
417 return 0;
418}
419
420static int hw_break_set(struct task_struct *target,
421 const struct user_regset *regset,
422 unsigned int pos, unsigned int count,
423 const void *kbuf, const void __user *ubuf)
424{
425 unsigned int note_type = regset->core_note_type;
Will Deacon7797d172012-10-11 12:10:57 +0100426 int ret, idx = 0, offset, limit;
Will Deacon478fcb22012-03-05 11:49:33 +0000427 u32 ctrl;
428 u64 addr;
429
Will Deacon7797d172012-10-11 12:10:57 +0100430 /* Resource info and pad */
431 offset = offsetof(struct user_hwdebug_state, dbg_regs);
432 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
Will Deacon478fcb22012-03-05 11:49:33 +0000433 if (ret)
434 return ret;
435
436 /* (address, ctrl) registers */
437 limit = regset->n * regset->size;
438 while (count && offset < limit) {
439 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
440 offset, offset + PTRACE_HBP_ADDR_SZ);
441 if (ret)
442 return ret;
443 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
444 if (ret)
445 return ret;
446 offset += PTRACE_HBP_ADDR_SZ;
447
448 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
449 offset, offset + PTRACE_HBP_CTRL_SZ);
450 if (ret)
451 return ret;
452 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
453 if (ret)
454 return ret;
455 offset += PTRACE_HBP_CTRL_SZ;
Will Deacon7797d172012-10-11 12:10:57 +0100456
457 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
458 offset,
459 offset + PTRACE_HBP_PAD_SZ);
460 if (ret)
461 return ret;
462 offset += PTRACE_HBP_PAD_SZ;
Will Deacon478fcb22012-03-05 11:49:33 +0000463 idx++;
464 }
465
466 return 0;
467}
468#endif /* CONFIG_HAVE_HW_BREAKPOINT */
469
470static int gpr_get(struct task_struct *target,
471 const struct user_regset *regset,
472 unsigned int pos, unsigned int count,
473 void *kbuf, void __user *ubuf)
474{
475 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
476 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
477}
478
479static int gpr_set(struct task_struct *target, const struct user_regset *regset,
480 unsigned int pos, unsigned int count,
481 const void *kbuf, const void __user *ubuf)
482{
483 int ret;
484 struct user_pt_regs newregs;
485
486 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
487 if (ret)
488 return ret;
489
490 if (!valid_user_regs(&newregs))
491 return -EINVAL;
492
493 task_pt_regs(target)->user_regs = newregs;
494 return 0;
495}
496
497/*
498 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
499 */
500static int fpr_get(struct task_struct *target, const struct user_regset *regset,
501 unsigned int pos, unsigned int count,
502 void *kbuf, void __user *ubuf)
503{
504 struct user_fpsimd_state *uregs;
505 uregs = &target->thread.fpsimd_state.user_fpsimd;
506 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
507}
508
509static int fpr_set(struct task_struct *target, const struct user_regset *regset,
510 unsigned int pos, unsigned int count,
511 const void *kbuf, const void __user *ubuf)
512{
513 int ret;
514 struct user_fpsimd_state newstate;
515
516 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
517 if (ret)
518 return ret;
519
520 target->thread.fpsimd_state.user_fpsimd = newstate;
521 return ret;
522}
523
524static int tls_get(struct task_struct *target, const struct user_regset *regset,
525 unsigned int pos, unsigned int count,
526 void *kbuf, void __user *ubuf)
527{
528 unsigned long *tls = &target->thread.tp_value;
529 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
530}
531
532static int tls_set(struct task_struct *target, const struct user_regset *regset,
533 unsigned int pos, unsigned int count,
534 const void *kbuf, const void __user *ubuf)
535{
536 int ret;
537 unsigned long tls;
538
539 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
540 if (ret)
541 return ret;
542
543 target->thread.tp_value = tls;
544 return ret;
545}
546
547enum aarch64_regset {
548 REGSET_GPR,
549 REGSET_FPR,
550 REGSET_TLS,
551#ifdef CONFIG_HAVE_HW_BREAKPOINT
552 REGSET_HW_BREAK,
553 REGSET_HW_WATCH,
554#endif
555};
556
557static const struct user_regset aarch64_regsets[] = {
558 [REGSET_GPR] = {
559 .core_note_type = NT_PRSTATUS,
560 .n = sizeof(struct user_pt_regs) / sizeof(u64),
561 .size = sizeof(u64),
562 .align = sizeof(u64),
563 .get = gpr_get,
564 .set = gpr_set
565 },
566 [REGSET_FPR] = {
567 .core_note_type = NT_PRFPREG,
568 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
569 /*
570 * We pretend we have 32-bit registers because the fpsr and
571 * fpcr are 32-bits wide.
572 */
573 .size = sizeof(u32),
574 .align = sizeof(u32),
575 .get = fpr_get,
576 .set = fpr_set
577 },
578 [REGSET_TLS] = {
579 .core_note_type = NT_ARM_TLS,
580 .n = 1,
581 .size = sizeof(void *),
582 .align = sizeof(void *),
583 .get = tls_get,
584 .set = tls_set,
585 },
586#ifdef CONFIG_HAVE_HW_BREAKPOINT
587 [REGSET_HW_BREAK] = {
588 .core_note_type = NT_ARM_HW_BREAK,
589 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
590 .size = sizeof(u32),
591 .align = sizeof(u32),
592 .get = hw_break_get,
593 .set = hw_break_set,
594 },
595 [REGSET_HW_WATCH] = {
596 .core_note_type = NT_ARM_HW_WATCH,
597 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
598 .size = sizeof(u32),
599 .align = sizeof(u32),
600 .get = hw_break_get,
601 .set = hw_break_set,
602 },
603#endif
604};
605
606static const struct user_regset_view user_aarch64_view = {
607 .name = "aarch64", .e_machine = EM_AARCH64,
608 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
609};
610
611#ifdef CONFIG_COMPAT
612#include <linux/compat.h>
613
614enum compat_regset {
615 REGSET_COMPAT_GPR,
616 REGSET_COMPAT_VFP,
617};
618
619static int compat_gpr_get(struct task_struct *target,
620 const struct user_regset *regset,
621 unsigned int pos, unsigned int count,
622 void *kbuf, void __user *ubuf)
623{
624 int ret = 0;
625 unsigned int i, start, num_regs;
626
627 /* Calculate the number of AArch32 registers contained in count */
628 num_regs = count / regset->size;
629
630 /* Convert pos into an register number */
631 start = pos / regset->size;
632
633 if (start + num_regs > regset->n)
634 return -EIO;
635
636 for (i = 0; i < num_regs; ++i) {
637 unsigned int idx = start + i;
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000638 compat_ulong_t reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000639
640 switch (idx) {
641 case 15:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000642 reg = task_pt_regs(target)->pc;
Will Deacon478fcb22012-03-05 11:49:33 +0000643 break;
644 case 16:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000645 reg = task_pt_regs(target)->pstate;
Will Deacon478fcb22012-03-05 11:49:33 +0000646 break;
647 case 17:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000648 reg = task_pt_regs(target)->orig_x0;
Will Deacon478fcb22012-03-05 11:49:33 +0000649 break;
650 default:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000651 reg = task_pt_regs(target)->regs[idx];
Will Deacon478fcb22012-03-05 11:49:33 +0000652 }
653
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000654 ret = copy_to_user(ubuf, &reg, sizeof(reg));
Will Deacon478fcb22012-03-05 11:49:33 +0000655 if (ret)
656 break;
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000657
658 ubuf += sizeof(reg);
Will Deacon478fcb22012-03-05 11:49:33 +0000659 }
660
661 return ret;
662}
663
664static int compat_gpr_set(struct task_struct *target,
665 const struct user_regset *regset,
666 unsigned int pos, unsigned int count,
667 const void *kbuf, const void __user *ubuf)
668{
669 struct pt_regs newregs;
670 int ret = 0;
671 unsigned int i, start, num_regs;
672
673 /* Calculate the number of AArch32 registers contained in count */
674 num_regs = count / regset->size;
675
676 /* Convert pos into an register number */
677 start = pos / regset->size;
678
679 if (start + num_regs > regset->n)
680 return -EIO;
681
682 newregs = *task_pt_regs(target);
683
684 for (i = 0; i < num_regs; ++i) {
685 unsigned int idx = start + i;
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000686 compat_ulong_t reg;
687
688 ret = copy_from_user(&reg, ubuf, sizeof(reg));
689 if (ret)
690 return ret;
691
692 ubuf += sizeof(reg);
Will Deacon478fcb22012-03-05 11:49:33 +0000693
694 switch (idx) {
695 case 15:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000696 newregs.pc = reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000697 break;
698 case 16:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000699 newregs.pstate = reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000700 break;
701 case 17:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000702 newregs.orig_x0 = reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000703 break;
704 default:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000705 newregs.regs[idx] = reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000706 }
707
Will Deacon478fcb22012-03-05 11:49:33 +0000708 }
709
710 if (valid_user_regs(&newregs.user_regs))
711 *task_pt_regs(target) = newregs;
712 else
713 ret = -EINVAL;
714
Will Deacon478fcb22012-03-05 11:49:33 +0000715 return ret;
716}
717
718static int compat_vfp_get(struct task_struct *target,
719 const struct user_regset *regset,
720 unsigned int pos, unsigned int count,
721 void *kbuf, void __user *ubuf)
722{
723 struct user_fpsimd_state *uregs;
724 compat_ulong_t fpscr;
725 int ret;
726
727 uregs = &target->thread.fpsimd_state.user_fpsimd;
728
729 /*
730 * The VFP registers are packed into the fpsimd_state, so they all sit
731 * nicely together for us. We just need to create the fpscr separately.
732 */
733 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
734 VFP_STATE_SIZE - sizeof(compat_ulong_t));
735
736 if (count && !ret) {
737 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
738 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
739 ret = put_user(fpscr, (compat_ulong_t *)ubuf);
740 }
741
742 return ret;
743}
744
745static int compat_vfp_set(struct task_struct *target,
746 const struct user_regset *regset,
747 unsigned int pos, unsigned int count,
748 const void *kbuf, const void __user *ubuf)
749{
750 struct user_fpsimd_state *uregs;
751 compat_ulong_t fpscr;
752 int ret;
753
754 if (pos + count > VFP_STATE_SIZE)
755 return -EIO;
756
757 uregs = &target->thread.fpsimd_state.user_fpsimd;
758
759 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
760 VFP_STATE_SIZE - sizeof(compat_ulong_t));
761
762 if (count && !ret) {
763 ret = get_user(fpscr, (compat_ulong_t *)ubuf);
764 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
765 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
766 }
767
768 return ret;
769}
770
771static const struct user_regset aarch32_regsets[] = {
772 [REGSET_COMPAT_GPR] = {
773 .core_note_type = NT_PRSTATUS,
774 .n = COMPAT_ELF_NGREG,
775 .size = sizeof(compat_elf_greg_t),
776 .align = sizeof(compat_elf_greg_t),
777 .get = compat_gpr_get,
778 .set = compat_gpr_set
779 },
780 [REGSET_COMPAT_VFP] = {
781 .core_note_type = NT_ARM_VFP,
782 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
783 .size = sizeof(compat_ulong_t),
784 .align = sizeof(compat_ulong_t),
785 .get = compat_vfp_get,
786 .set = compat_vfp_set
787 },
788};
789
790static const struct user_regset_view user_aarch32_view = {
791 .name = "aarch32", .e_machine = EM_ARM,
792 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
793};
794
Will Deacon478fcb22012-03-05 11:49:33 +0000795static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
796 compat_ulong_t __user *ret)
797{
798 compat_ulong_t tmp;
799
800 if (off & 3)
801 return -EIO;
802
Catalin Marinas7606c372012-10-10 15:50:03 +0100803 if (off == COMPAT_PT_TEXT_ADDR)
Will Deacon478fcb22012-03-05 11:49:33 +0000804 tmp = tsk->mm->start_code;
Catalin Marinas7606c372012-10-10 15:50:03 +0100805 else if (off == COMPAT_PT_DATA_ADDR)
Will Deacon478fcb22012-03-05 11:49:33 +0000806 tmp = tsk->mm->start_data;
Catalin Marinas7606c372012-10-10 15:50:03 +0100807 else if (off == COMPAT_PT_TEXT_END_ADDR)
Will Deacon478fcb22012-03-05 11:49:33 +0000808 tmp = tsk->mm->end_code;
809 else if (off < sizeof(compat_elf_gregset_t))
810 return copy_regset_to_user(tsk, &user_aarch32_view,
811 REGSET_COMPAT_GPR, off,
812 sizeof(compat_ulong_t), ret);
813 else if (off >= COMPAT_USER_SZ)
814 return -EIO;
815 else
816 tmp = 0;
817
818 return put_user(tmp, ret);
819}
820
821static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
822 compat_ulong_t val)
823{
824 int ret;
825
826 if (off & 3 || off >= COMPAT_USER_SZ)
827 return -EIO;
828
829 if (off >= sizeof(compat_elf_gregset_t))
830 return 0;
831
832 ret = copy_regset_from_user(tsk, &user_aarch32_view,
833 REGSET_COMPAT_GPR, off,
834 sizeof(compat_ulong_t),
835 &val);
836 return ret;
837}
838
839#ifdef CONFIG_HAVE_HW_BREAKPOINT
840
841/*
842 * Convert a virtual register number into an index for a thread_info
843 * breakpoint array. Breakpoints are identified using positive numbers
844 * whilst watchpoints are negative. The registers are laid out as pairs
845 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
846 * Register 0 is reserved for describing resource information.
847 */
848static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
849{
850 return (abs(num) - 1) >> 1;
851}
852
853static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
854{
855 u8 num_brps, num_wrps, debug_arch, wp_len;
856 u32 reg = 0;
857
858 num_brps = hw_breakpoint_slots(TYPE_INST);
859 num_wrps = hw_breakpoint_slots(TYPE_DATA);
860
861 debug_arch = debug_monitors_arch();
862 wp_len = 8;
863 reg |= debug_arch;
864 reg <<= 8;
865 reg |= wp_len;
866 reg <<= 8;
867 reg |= num_wrps;
868 reg <<= 8;
869 reg |= num_brps;
870
871 *kdata = reg;
872 return 0;
873}
874
875static int compat_ptrace_hbp_get(unsigned int note_type,
876 struct task_struct *tsk,
877 compat_long_t num,
878 u32 *kdata)
879{
880 u64 addr = 0;
881 u32 ctrl = 0;
882
883 int err, idx = compat_ptrace_hbp_num_to_idx(num);;
884
885 if (num & 1) {
886 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
887 *kdata = (u32)addr;
888 } else {
889 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
890 *kdata = ctrl;
891 }
892
893 return err;
894}
895
896static int compat_ptrace_hbp_set(unsigned int note_type,
897 struct task_struct *tsk,
898 compat_long_t num,
899 u32 *kdata)
900{
901 u64 addr;
902 u32 ctrl;
903
904 int err, idx = compat_ptrace_hbp_num_to_idx(num);
905
906 if (num & 1) {
907 addr = *kdata;
908 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
909 } else {
910 ctrl = *kdata;
911 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
912 }
913
914 return err;
915}
916
917static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
918 compat_ulong_t __user *data)
919{
920 int ret;
921 u32 kdata;
922 mm_segment_t old_fs = get_fs();
923
924 set_fs(KERNEL_DS);
925 /* Watchpoint */
926 if (num < 0) {
927 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
928 /* Resource info */
929 } else if (num == 0) {
930 ret = compat_ptrace_hbp_get_resource_info(&kdata);
931 /* Breakpoint */
932 } else {
933 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
934 }
935 set_fs(old_fs);
936
937 if (!ret)
938 ret = put_user(kdata, data);
939
940 return ret;
941}
942
943static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
944 compat_ulong_t __user *data)
945{
946 int ret;
947 u32 kdata = 0;
948 mm_segment_t old_fs = get_fs();
949
950 if (num == 0)
951 return 0;
952
953 ret = get_user(kdata, data);
954 if (ret)
955 return ret;
956
957 set_fs(KERNEL_DS);
958 if (num < 0)
959 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
960 else
961 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
962 set_fs(old_fs);
963
964 return ret;
965}
966#endif /* CONFIG_HAVE_HW_BREAKPOINT */
967
968long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
969 compat_ulong_t caddr, compat_ulong_t cdata)
970{
971 unsigned long addr = caddr;
972 unsigned long data = cdata;
973 void __user *datap = compat_ptr(data);
974 int ret;
975
976 switch (request) {
977 case PTRACE_PEEKUSR:
978 ret = compat_ptrace_read_user(child, addr, datap);
979 break;
980
981 case PTRACE_POKEUSR:
982 ret = compat_ptrace_write_user(child, addr, data);
983 break;
984
Will Deacon27aa55c2012-09-27 11:38:12 +0100985 case COMPAT_PTRACE_GETREGS:
Will Deacon478fcb22012-03-05 11:49:33 +0000986 ret = copy_regset_to_user(child,
987 &user_aarch32_view,
988 REGSET_COMPAT_GPR,
989 0, sizeof(compat_elf_gregset_t),
990 datap);
991 break;
992
Will Deacon27aa55c2012-09-27 11:38:12 +0100993 case COMPAT_PTRACE_SETREGS:
Will Deacon478fcb22012-03-05 11:49:33 +0000994 ret = copy_regset_from_user(child,
995 &user_aarch32_view,
996 REGSET_COMPAT_GPR,
997 0, sizeof(compat_elf_gregset_t),
998 datap);
999 break;
1000
Will Deacon27aa55c2012-09-27 11:38:12 +01001001 case COMPAT_PTRACE_GET_THREAD_AREA:
Will Deacon478fcb22012-03-05 11:49:33 +00001002 ret = put_user((compat_ulong_t)child->thread.tp_value,
1003 (compat_ulong_t __user *)datap);
1004 break;
1005
Will Deacon27aa55c2012-09-27 11:38:12 +01001006 case COMPAT_PTRACE_SET_SYSCALL:
Will Deacon478fcb22012-03-05 11:49:33 +00001007 task_pt_regs(child)->syscallno = data;
1008 ret = 0;
1009 break;
1010
1011 case COMPAT_PTRACE_GETVFPREGS:
1012 ret = copy_regset_to_user(child,
1013 &user_aarch32_view,
1014 REGSET_COMPAT_VFP,
1015 0, VFP_STATE_SIZE,
1016 datap);
1017 break;
1018
1019 case COMPAT_PTRACE_SETVFPREGS:
1020 ret = copy_regset_from_user(child,
1021 &user_aarch32_view,
1022 REGSET_COMPAT_VFP,
1023 0, VFP_STATE_SIZE,
1024 datap);
1025 break;
1026
1027#ifdef CONFIG_HAVE_HW_BREAKPOINT
Will Deacon27aa55c2012-09-27 11:38:12 +01001028 case COMPAT_PTRACE_GETHBPREGS:
Will Deacon478fcb22012-03-05 11:49:33 +00001029 ret = compat_ptrace_gethbpregs(child, addr, datap);
1030 break;
1031
Will Deacon27aa55c2012-09-27 11:38:12 +01001032 case COMPAT_PTRACE_SETHBPREGS:
Will Deacon478fcb22012-03-05 11:49:33 +00001033 ret = compat_ptrace_sethbpregs(child, addr, datap);
1034 break;
1035#endif
1036
1037 default:
1038 ret = compat_ptrace_request(child, request, addr,
1039 data);
1040 break;
1041 }
1042
1043 return ret;
1044}
1045#endif /* CONFIG_COMPAT */
1046
1047const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1048{
1049#ifdef CONFIG_COMPAT
1050 if (is_compat_thread(task_thread_info(task)))
1051 return &user_aarch32_view;
1052#endif
1053 return &user_aarch64_view;
1054}
1055
1056long arch_ptrace(struct task_struct *child, long request,
1057 unsigned long addr, unsigned long data)
1058{
1059 return ptrace_request(child, request, addr, data);
1060}
1061
AKASHI Takahiro31578582014-04-30 10:51:30 +01001062enum ptrace_syscall_dir {
1063 PTRACE_SYSCALL_ENTER = 0,
1064 PTRACE_SYSCALL_EXIT,
1065};
1066
1067static void tracehook_report_syscall(struct pt_regs *regs,
1068 enum ptrace_syscall_dir dir)
Will Deacon478fcb22012-03-05 11:49:33 +00001069{
AKASHI Takahiro31578582014-04-30 10:51:30 +01001070 int regno;
Will Deacon478fcb22012-03-05 11:49:33 +00001071 unsigned long saved_reg;
1072
AKASHI Takahiro31578582014-04-30 10:51:30 +01001073 /*
1074 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
1075 * used to denote syscall entry/exit:
1076 */
1077 regno = (is_compat_task() ? 12 : 7);
1078 saved_reg = regs->regs[regno];
1079 regs->regs[regno] = dir;
Will Deacon478fcb22012-03-05 11:49:33 +00001080
AKASHI Takahiro31578582014-04-30 10:51:30 +01001081 if (dir == PTRACE_SYSCALL_EXIT)
Will Deacon478fcb22012-03-05 11:49:33 +00001082 tracehook_report_syscall_exit(regs, 0);
1083 else if (tracehook_report_syscall_entry(regs))
1084 regs->syscallno = ~0UL;
1085
AKASHI Takahiro31578582014-04-30 10:51:30 +01001086 regs->regs[regno] = saved_reg;
1087}
1088
1089asmlinkage int syscall_trace_enter(struct pt_regs *regs)
1090{
1091 if (test_thread_flag(TIF_SYSCALL_TRACE))
1092 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
Will Deacon478fcb22012-03-05 11:49:33 +00001093
1094 return regs->syscallno;
1095}
AKASHI Takahiro31578582014-04-30 10:51:30 +01001096
1097asmlinkage void syscall_trace_exit(struct pt_regs *regs)
1098{
1099 if (test_thread_flag(TIF_SYSCALL_TRACE))
1100 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1101}