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Lennert Buytenhek91da11f2008-10-07 13:44:02 +00001/*
2 * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
3 * Copyright (c) 2008 Marvell Semiconductor
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#ifndef __MV88E6XXX_H
12#define __MV88E6XXX_H
13
Guenter Roeckb2eb0662015-04-02 04:06:30 +020014/* switch product IDs */
15
16#define ID_6085 0x04a0
17#define ID_6095 0x0950
18
19#define ID_6123 0x1210
20#define ID_6123_A1 0x1212
21#define ID_6123_A2 0x1213
22
23#define ID_6131 0x1060
24#define ID_6131_B2 0x1066
25
26#define ID_6152 0x1a40
27#define ID_6155 0x1a50
28
29#define ID_6161 0x1610
30#define ID_6161_A1 0x1612
31#define ID_6161_A2 0x1613
32
33#define ID_6165 0x1650
34#define ID_6165_A1 0x1652
35#define ID_6165_A2 0x1653
36
37#define ID_6171 0x1710
38#define ID_6172 0x1720
39#define ID_6176 0x1760
40
41#define ID_6182 0x1a60
42#define ID_6185 0x1a70
43
44#define ID_6352 0x3520
45#define ID_6352_A0 0x3521
46#define ID_6352_A1 0x3522
47
48/* Registers */
49
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000050#define REG_PORT(p) (0x10 + (p))
51#define REG_GLOBAL 0x1b
52#define REG_GLOBAL2 0x1c
53
Guenter Roeckfacd95b2015-03-26 18:36:35 -070054/* ATU commands */
55
56#define ATU_BUSY 0x8000
57
Guenter Roeckdefb05b2015-03-26 18:36:38 -070058#define ATU_CMD_LOAD_FID (ATU_BUSY | 0x3000)
59#define ATU_CMD_GETNEXT_FID (ATU_BUSY | 0x4000)
Guenter Roeckfacd95b2015-03-26 18:36:35 -070060#define ATU_CMD_FLUSH_NONSTATIC_FID (ATU_BUSY | 0x6000)
61
62/* port states */
63
64#define PSTATE_MASK 0x03
65#define PSTATE_DISABLED 0x00
66#define PSTATE_BLOCKING 0x01
67#define PSTATE_LEARNING 0x02
68#define PSTATE_FORWARDING 0x03
69
Guenter Roeckdefb05b2015-03-26 18:36:38 -070070/* FDB states */
71
72#define FDB_STATE_MASK 0x0f
73
74#define FDB_STATE_UNUSED 0x00
75#define FDB_STATE_MC_STATIC 0x07 /* static multicast */
76#define FDB_STATE_STATIC 0x0e /* static unicast */
77
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000078struct mv88e6xxx_priv_state {
Barry Grussling3675c8d2013-01-08 16:05:53 +000079 /* When using multi-chip addressing, this mutex protects
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000080 * access to the indirect access registers. (In single-chip
81 * mode, this mutex is effectively useless.)
82 */
83 struct mutex smi_mutex;
84
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000085#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
Barry Grussling3675c8d2013-01-08 16:05:53 +000086 /* Handles automatic disabling and re-enabling of the PHY
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000087 * polling unit.
88 */
89 struct mutex ppu_mutex;
90 int ppu_disabled;
91 struct work_struct ppu_work;
92 struct timer_list ppu_timer;
93#endif
94
Barry Grussling3675c8d2013-01-08 16:05:53 +000095 /* This mutex serialises access to the statistics unit.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000096 * Hold this mutex over snapshot + dump sequences.
97 */
98 struct mutex stats_mutex;
Peter Korsgaardec80bfc2011-04-05 03:03:56 +000099
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700100 /* This mutex serializes phy access for chips with
101 * indirect phy addressing. It is unused for chips
102 * with direct phy access.
103 */
104 struct mutex phy_mutex;
105
Guenter Roeck33b43df2014-10-29 10:45:03 -0700106 /* This mutex serializes eeprom access for chips with
107 * eeprom support.
108 */
109 struct mutex eeprom_mutex;
110
Peter Korsgaardec80bfc2011-04-05 03:03:56 +0000111 int id; /* switch product id */
Guenter Roeckd1988932015-04-02 04:06:31 +0200112 int num_ports; /* number of switch ports */
Guenter Roeckfacd95b2015-03-26 18:36:35 -0700113
114 /* hw bridging */
115
116 u32 fid_mask;
117 u8 fid[DSA_MAX_PORTS];
118 u16 bridge_mask[DSA_MAX_PORTS];
119
120 unsigned long port_state_update_mask;
121 u8 port_state[DSA_MAX_PORTS];
122
123 struct work_struct bridge_work;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000124};
125
126struct mv88e6xxx_hw_stat {
127 char string[ETH_GSTRING_LEN];
128 int sizeof_stat;
129 int reg;
130};
131
Andrew Lunn143a8302015-04-02 04:06:34 +0200132int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active);
Guenter Roeckd827e882015-03-26 18:36:29 -0700133int mv88e6xxx_setup_port_common(struct dsa_switch *ds, int port);
Guenter Roeckacdaffc2015-03-26 18:36:28 -0700134int mv88e6xxx_setup_common(struct dsa_switch *ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000135int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
136int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
137int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
Barry Grussling85686582013-01-08 16:05:56 +0000138 int reg, u16 val);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000139int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
140int mv88e6xxx_config_prio(struct dsa_switch *ds);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000141int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000142int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
Andrew Lunnfd3a0ee2015-04-02 04:06:36 +0200143int mv88e6xxx_phy_read(struct dsa_switch *ds, int port, int regnum);
144int mv88e6xxx_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val);
145int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int port, int regnum);
146int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int port, int regnum,
147 u16 val);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +0000148void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
149int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
150int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
151 int regnum, u16 val);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000152void mv88e6xxx_poll_link(struct dsa_switch *ds);
153void mv88e6xxx_get_strings(struct dsa_switch *ds,
154 int nr_stats, struct mv88e6xxx_hw_stat *stats,
155 int port, uint8_t *data);
156void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
157 int nr_stats, struct mv88e6xxx_hw_stat *stats,
158 int port, uint64_t *data);
Guenter Roecka1ab91f2014-10-29 10:45:05 -0700159int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port);
160void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
161 struct ethtool_regs *regs, void *_p);
Andrew Lunneaa23762014-11-15 22:24:51 +0100162int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp);
Andrew Lunnf3044682015-02-14 19:17:50 +0100163int mv88e6xxx_phy_wait(struct dsa_switch *ds);
164int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds);
165int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds);
166int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, int regnum);
167int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, int regnum,
168 u16 val);
Guenter Roeck11b3b452015-03-06 22:23:51 -0800169int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e);
170int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,
171 struct phy_device *phydev, struct ethtool_eee *e);
Guenter Roeckfacd95b2015-03-26 18:36:35 -0700172int mv88e6xxx_join_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);
173int mv88e6xxx_leave_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);
174int mv88e6xxx_port_stp_update(struct dsa_switch *ds, int port, u8 state);
Guenter Roeckdefb05b2015-03-26 18:36:38 -0700175int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,
176 const unsigned char *addr, u16 vid);
177int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,
178 const unsigned char *addr, u16 vid);
179int mv88e6xxx_port_fdb_getnext(struct dsa_switch *ds, int port,
180 unsigned char *addr, bool *is_static);
Andrew Lunn491435852015-04-02 04:06:35 +0200181int mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, int reg);
182int mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page,
183 int reg, int val);
Ben Hutchings98e67302011-11-25 14:36:19 +0000184extern struct dsa_switch_driver mv88e6131_switch_driver;
185extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700186extern struct dsa_switch_driver mv88e6352_switch_driver;
Andrew Lunn42f27252014-09-12 23:58:44 +0200187extern struct dsa_switch_driver mv88e6171_switch_driver;
Ben Hutchings98e67302011-11-25 14:36:19 +0000188
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000189#define REG_READ(addr, reg) \
190 ({ \
191 int __ret; \
192 \
193 __ret = mv88e6xxx_reg_read(ds, addr, reg); \
194 if (__ret < 0) \
195 return __ret; \
196 __ret; \
197 })
198
199#define REG_WRITE(addr, reg, val) \
200 ({ \
201 int __ret; \
202 \
203 __ret = mv88e6xxx_reg_write(ds, addr, reg, val); \
204 if (__ret < 0) \
205 return __ret; \
206 })
207
208
209
210#endif