Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 1 | /* |
| 2 | * An SPI driver for the Philips PCF2123 RTC |
| 3 | * Copyright 2009 Cyber Switching, Inc. |
| 4 | * |
| 5 | * Author: Chris Verges <chrisv@cyberswitching.com> |
| 6 | * Maintainers: http://www.cyberswitching.com |
| 7 | * |
| 8 | * based on the RS5C348 driver in this same directory. |
| 9 | * |
| 10 | * Thanks to Christian Pellegrin <chripell@fsfe.org> for |
| 11 | * the sysfs contributions to this driver. |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License version 2 as |
| 15 | * published by the Free Software Foundation. |
| 16 | * |
| 17 | * Please note that the CS is active high, so platform data |
| 18 | * should look something like: |
| 19 | * |
| 20 | * static struct spi_board_info ek_spi_devices[] = { |
Sachin Kamat | 369015f | 2013-07-03 15:06:01 -0700 | [diff] [blame] | 21 | * ... |
| 22 | * { |
| 23 | * .modalias = "rtc-pcf2123", |
| 24 | * .chip_select = 1, |
| 25 | * .controller_data = (void *)AT91_PIN_PA10, |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 26 | * .max_speed_hz = 1000 * 1000, |
| 27 | * .mode = SPI_CS_HIGH, |
| 28 | * .bus_num = 0, |
| 29 | * }, |
| 30 | * ... |
| 31 | *}; |
| 32 | * |
| 33 | */ |
| 34 | |
| 35 | #include <linux/bcd.h> |
| 36 | #include <linux/delay.h> |
| 37 | #include <linux/device.h> |
| 38 | #include <linux/errno.h> |
| 39 | #include <linux/init.h> |
| 40 | #include <linux/kernel.h> |
Joshua Clayton | 3fc7007 | 2015-02-13 14:40:29 -0800 | [diff] [blame] | 41 | #include <linux/of.h> |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 42 | #include <linux/string.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 43 | #include <linux/slab.h> |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 44 | #include <linux/rtc.h> |
| 45 | #include <linux/spi/spi.h> |
Paul Gortmaker | 2113852 | 2011-05-27 09:57:25 -0400 | [diff] [blame] | 46 | #include <linux/module.h> |
Ilya Shchepetkov | 5ed12f1 | 2012-08-21 16:16:06 -0700 | [diff] [blame] | 47 | #include <linux/sysfs.h> |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 48 | |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 49 | #define DRV_VERSION "0.6" |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 50 | |
Joshua Clayton | 245cb74 | 2016-01-04 10:31:19 -0800 | [diff] [blame] | 51 | /* REGISTERS */ |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 52 | #define PCF2123_REG_CTRL1 (0x00) /* Control Register 1 */ |
| 53 | #define PCF2123_REG_CTRL2 (0x01) /* Control Register 2 */ |
| 54 | #define PCF2123_REG_SC (0x02) /* datetime */ |
| 55 | #define PCF2123_REG_MN (0x03) |
| 56 | #define PCF2123_REG_HR (0x04) |
| 57 | #define PCF2123_REG_DM (0x05) |
| 58 | #define PCF2123_REG_DW (0x06) |
| 59 | #define PCF2123_REG_MO (0x07) |
| 60 | #define PCF2123_REG_YR (0x08) |
Joshua Clayton | 245cb74 | 2016-01-04 10:31:19 -0800 | [diff] [blame] | 61 | #define PCF2123_REG_ALRM_MN (0x09) /* Alarm Registers */ |
| 62 | #define PCF2123_REG_ALRM_HR (0x0a) |
| 63 | #define PCF2123_REG_ALRM_DM (0x0b) |
| 64 | #define PCF2123_REG_ALRM_DW (0x0c) |
| 65 | #define PCF2123_REG_OFFSET (0x0d) /* Clock Rate Offset Register */ |
| 66 | #define PCF2123_REG_TMR_CLKOUT (0x0e) /* Timer Registers */ |
| 67 | #define PCF2123_REG_CTDWN_TMR (0x0f) |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 68 | |
Joshua Clayton | 245cb74 | 2016-01-04 10:31:19 -0800 | [diff] [blame] | 69 | /* PCF2123_REG_CTRL1 BITS */ |
| 70 | #define CTRL1_CLEAR (0) /* Clear */ |
| 71 | #define CTRL1_CORR_INT BIT(1) /* Correction irq enable */ |
| 72 | #define CTRL1_12_HOUR BIT(2) /* 12 hour time */ |
| 73 | #define CTRL1_SW_RESET (BIT(3) | BIT(4) | BIT(6)) /* Software reset */ |
| 74 | #define CTRL1_STOP BIT(5) /* Stop the clock */ |
| 75 | #define CTRL1_EXT_TEST BIT(7) /* External clock test mode */ |
| 76 | |
| 77 | /* PCF2123_REG_CTRL2 BITS */ |
| 78 | #define CTRL2_TIE BIT(0) /* Countdown timer irq enable */ |
| 79 | #define CTRL2_AIE BIT(1) /* Alarm irq enable */ |
| 80 | #define CTRL2_TF BIT(2) /* Countdown timer flag */ |
| 81 | #define CTRL2_AF BIT(3) /* Alarm flag */ |
| 82 | #define CTRL2_TI_TP BIT(4) /* Irq pin generates pulse */ |
| 83 | #define CTRL2_MSF BIT(5) /* Minute or second irq flag */ |
| 84 | #define CTRL2_SI BIT(6) /* Second irq enable */ |
| 85 | #define CTRL2_MI BIT(7) /* Minute irq enable */ |
| 86 | |
| 87 | /* PCF2123_REG_SC BITS */ |
| 88 | #define OSC_HAS_STOPPED BIT(7) /* Clock has been stopped */ |
| 89 | |
| 90 | /* PCF2123_REG_ALRM_XX BITS */ |
| 91 | #define ALRM_ENABLE BIT(7) /* MN, HR, DM, or DW alarm enable */ |
| 92 | |
| 93 | /* PCF2123_REG_TMR_CLKOUT BITS */ |
| 94 | #define CD_TMR_4096KHZ (0) /* 4096 KHz countdown timer */ |
| 95 | #define CD_TMR_64HZ (1) /* 64 Hz countdown timer */ |
| 96 | #define CD_TMR_1HZ (2) /* 1 Hz countdown timer */ |
| 97 | #define CD_TMR_60th_HZ (3) /* 60th Hz countdown timer */ |
| 98 | #define CD_TMR_TE BIT(3) /* Countdown timer enable */ |
| 99 | |
| 100 | /* PCF2123_REG_OFFSET BITS */ |
| 101 | #define OFFSET_SIGN_BIT BIT(6) /* 2's complement sign bit */ |
| 102 | #define OFFSET_COARSE BIT(7) /* Coarse mode offset */ |
| 103 | |
| 104 | /* READ/WRITE ADDRESS BITS */ |
| 105 | #define PCF2123_WRITE BIT(4) |
| 106 | #define PCF2123_READ (BIT(4) | BIT(7)) |
| 107 | |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 108 | |
| 109 | static struct spi_driver pcf2123_driver; |
| 110 | |
| 111 | struct pcf2123_sysfs_reg { |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 112 | struct device_attribute attr; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 113 | char name[2]; |
| 114 | }; |
| 115 | |
| 116 | struct pcf2123_plat_data { |
| 117 | struct rtc_device *rtc; |
| 118 | struct pcf2123_sysfs_reg regs[16]; |
| 119 | }; |
| 120 | |
| 121 | /* |
| 122 | * Causes a 30 nanosecond delay to ensure that the PCF2123 chip select |
| 123 | * is released properly after an SPI write. This function should be |
| 124 | * called after EVERY read/write call over SPI. |
| 125 | */ |
| 126 | static inline void pcf2123_delay_trec(void) |
| 127 | { |
| 128 | ndelay(30); |
| 129 | } |
| 130 | |
Joshua Clayton | 66c056d | 2016-01-04 10:31:20 -0800 | [diff] [blame] | 131 | static int pcf2123_read(struct device *dev, u8 reg, u8 *rxbuf, size_t size) |
| 132 | { |
| 133 | struct spi_device *spi = to_spi_device(dev); |
| 134 | int ret; |
| 135 | |
| 136 | reg |= PCF2123_READ; |
| 137 | ret = spi_write_then_read(spi, ®, 1, rxbuf, size); |
| 138 | pcf2123_delay_trec(); |
| 139 | |
| 140 | return ret; |
| 141 | } |
| 142 | |
Joshua Clayton | 809b453 | 2016-01-04 10:31:21 -0800 | [diff] [blame] | 143 | static int pcf2123_write(struct device *dev, u8 *txbuf, size_t size) |
| 144 | { |
| 145 | struct spi_device *spi = to_spi_device(dev); |
| 146 | int ret; |
| 147 | |
| 148 | txbuf[0] |= PCF2123_WRITE; |
| 149 | ret = spi_write(spi, txbuf, size); |
| 150 | pcf2123_delay_trec(); |
| 151 | |
| 152 | return ret; |
| 153 | } |
| 154 | |
| 155 | static int pcf2123_write_reg(struct device *dev, u8 reg, u8 val) |
| 156 | { |
| 157 | u8 txbuf[2]; |
| 158 | |
| 159 | txbuf[0] = reg; |
| 160 | txbuf[1] = val; |
| 161 | return pcf2123_write(dev, txbuf, sizeof(txbuf)); |
| 162 | } |
| 163 | |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 164 | static ssize_t pcf2123_show(struct device *dev, struct device_attribute *attr, |
| 165 | char *buffer) |
| 166 | { |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 167 | struct pcf2123_sysfs_reg *r; |
Joshua Clayton | 66c056d | 2016-01-04 10:31:20 -0800 | [diff] [blame] | 168 | u8 rxbuf[1]; |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 169 | unsigned long reg; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 170 | int ret; |
| 171 | |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 172 | r = container_of(attr, struct pcf2123_sysfs_reg, attr); |
| 173 | |
Jingoo Han | 4c5591c | 2013-07-03 15:07:58 -0700 | [diff] [blame] | 174 | ret = kstrtoul(r->name, 16, ®); |
| 175 | if (ret) |
| 176 | return ret; |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 177 | |
Joshua Clayton | 66c056d | 2016-01-04 10:31:20 -0800 | [diff] [blame] | 178 | ret = pcf2123_read(dev, reg, rxbuf, 1); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 179 | if (ret < 0) |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 180 | return -EIO; |
Joshua Clayton | 66c056d | 2016-01-04 10:31:20 -0800 | [diff] [blame] | 181 | |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 182 | return sprintf(buffer, "0x%x\n", rxbuf[0]); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 183 | } |
| 184 | |
| 185 | static ssize_t pcf2123_store(struct device *dev, struct device_attribute *attr, |
| 186 | const char *buffer, size_t count) { |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 187 | struct pcf2123_sysfs_reg *r; |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 188 | unsigned long reg; |
| 189 | unsigned long val; |
| 190 | |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 191 | int ret; |
| 192 | |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 193 | r = container_of(attr, struct pcf2123_sysfs_reg, attr); |
| 194 | |
Jingoo Han | 4c5591c | 2013-07-03 15:07:58 -0700 | [diff] [blame] | 195 | ret = kstrtoul(r->name, 16, ®); |
| 196 | if (ret) |
| 197 | return ret; |
| 198 | |
| 199 | ret = kstrtoul(buffer, 10, &val); |
| 200 | if (ret) |
| 201 | return ret; |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 202 | |
Joshua Clayton | 809b453 | 2016-01-04 10:31:21 -0800 | [diff] [blame] | 203 | pcf2123_write_reg(dev, reg, val); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 204 | if (ret < 0) |
| 205 | return -EIO; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 206 | return count; |
| 207 | } |
| 208 | |
| 209 | static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 210 | { |
Joshua Clayton | 66c056d | 2016-01-04 10:31:20 -0800 | [diff] [blame] | 211 | u8 rxbuf[7]; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 212 | int ret; |
| 213 | |
Joshua Clayton | 66c056d | 2016-01-04 10:31:20 -0800 | [diff] [blame] | 214 | ret = pcf2123_read(dev, PCF2123_REG_SC, rxbuf, sizeof(rxbuf)); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 215 | if (ret < 0) |
| 216 | return ret; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 217 | |
Joshua Clayton | f07fa92 | 2016-01-04 10:31:23 -0800 | [diff] [blame^] | 218 | if (rxbuf[0] & OSC_HAS_STOPPED) { |
| 219 | dev_info(dev, "clock was stopped. Time is not valid\n"); |
| 220 | return -EINVAL; |
| 221 | } |
| 222 | |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 223 | tm->tm_sec = bcd2bin(rxbuf[0] & 0x7F); |
| 224 | tm->tm_min = bcd2bin(rxbuf[1] & 0x7F); |
| 225 | tm->tm_hour = bcd2bin(rxbuf[2] & 0x3F); /* rtc hr 0-23 */ |
| 226 | tm->tm_mday = bcd2bin(rxbuf[3] & 0x3F); |
| 227 | tm->tm_wday = rxbuf[4] & 0x07; |
| 228 | tm->tm_mon = bcd2bin(rxbuf[5] & 0x1F) - 1; /* rtc mn 1-12 */ |
| 229 | tm->tm_year = bcd2bin(rxbuf[6]); |
| 230 | if (tm->tm_year < 70) |
| 231 | tm->tm_year += 100; /* assume we are in 1970...2069 */ |
| 232 | |
| 233 | dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
| 234 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
| 235 | __func__, |
| 236 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
| 237 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
| 238 | |
Andrea Scian | 821f51c | 2015-06-16 11:35:19 +0200 | [diff] [blame] | 239 | return rtc_valid_tm(tm); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 240 | } |
| 241 | |
| 242 | static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 243 | { |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 244 | u8 txbuf[8]; |
| 245 | int ret; |
| 246 | |
| 247 | dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
| 248 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
| 249 | __func__, |
| 250 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
| 251 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
| 252 | |
| 253 | /* Stop the counter first */ |
Joshua Clayton | 809b453 | 2016-01-04 10:31:21 -0800 | [diff] [blame] | 254 | ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_STOP); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 255 | if (ret < 0) |
| 256 | return ret; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 257 | |
| 258 | /* Set the new time */ |
Joshua Clayton | 809b453 | 2016-01-04 10:31:21 -0800 | [diff] [blame] | 259 | txbuf[0] = PCF2123_REG_SC; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 260 | txbuf[1] = bin2bcd(tm->tm_sec & 0x7F); |
| 261 | txbuf[2] = bin2bcd(tm->tm_min & 0x7F); |
| 262 | txbuf[3] = bin2bcd(tm->tm_hour & 0x3F); |
| 263 | txbuf[4] = bin2bcd(tm->tm_mday & 0x3F); |
| 264 | txbuf[5] = tm->tm_wday & 0x07; |
| 265 | txbuf[6] = bin2bcd((tm->tm_mon + 1) & 0x1F); /* rtc mn 1-12 */ |
| 266 | txbuf[7] = bin2bcd(tm->tm_year < 100 ? tm->tm_year : tm->tm_year - 100); |
| 267 | |
Joshua Clayton | 809b453 | 2016-01-04 10:31:21 -0800 | [diff] [blame] | 268 | ret = pcf2123_write(dev, txbuf, sizeof(txbuf)); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 269 | if (ret < 0) |
| 270 | return ret; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 271 | |
| 272 | /* Start the counter */ |
Joshua Clayton | 809b453 | 2016-01-04 10:31:21 -0800 | [diff] [blame] | 273 | ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_CLEAR); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 274 | if (ret < 0) |
| 275 | return ret; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 276 | |
| 277 | return 0; |
| 278 | } |
| 279 | |
Joshua Clayton | 1e094b9 | 2016-01-04 10:31:22 -0800 | [diff] [blame] | 280 | static int pcf2123_reset(struct device *dev) |
| 281 | { |
| 282 | int ret; |
| 283 | u8 rxbuf[2]; |
| 284 | |
| 285 | ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_SW_RESET); |
| 286 | if (ret < 0) |
| 287 | return ret; |
| 288 | |
| 289 | /* Stop the counter */ |
| 290 | dev_dbg(dev, "stopping RTC\n"); |
| 291 | ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_STOP); |
| 292 | if (ret < 0) |
| 293 | return ret; |
| 294 | |
| 295 | /* See if the counter was actually stopped */ |
| 296 | dev_dbg(dev, "checking for presence of RTC\n"); |
| 297 | ret = pcf2123_read(dev, PCF2123_REG_CTRL1, rxbuf, sizeof(rxbuf)); |
| 298 | if (ret < 0) |
| 299 | return ret; |
| 300 | |
| 301 | dev_dbg(dev, "received data from RTC (0x%02X 0x%02X)\n", |
| 302 | rxbuf[0], rxbuf[1]); |
| 303 | if (!(rxbuf[0] & CTRL1_STOP)) |
| 304 | return -ENODEV; |
| 305 | |
| 306 | /* Start the counter */ |
| 307 | ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_CLEAR); |
| 308 | if (ret < 0) |
| 309 | return ret; |
| 310 | |
| 311 | return 0; |
| 312 | } |
| 313 | |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 314 | static const struct rtc_class_ops pcf2123_rtc_ops = { |
| 315 | .read_time = pcf2123_rtc_read_time, |
| 316 | .set_time = pcf2123_rtc_set_time, |
| 317 | }; |
| 318 | |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 319 | static int pcf2123_probe(struct spi_device *spi) |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 320 | { |
| 321 | struct rtc_device *rtc; |
Joshua Clayton | f07fa92 | 2016-01-04 10:31:23 -0800 | [diff] [blame^] | 322 | struct rtc_time tm; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 323 | struct pcf2123_plat_data *pdata; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 324 | int ret, i; |
| 325 | |
Jingoo Han | dd48ccc | 2013-04-29 16:20:47 -0700 | [diff] [blame] | 326 | pdata = devm_kzalloc(&spi->dev, sizeof(struct pcf2123_plat_data), |
| 327 | GFP_KERNEL); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 328 | if (!pdata) |
| 329 | return -ENOMEM; |
| 330 | spi->dev.platform_data = pdata; |
| 331 | |
Joshua Clayton | f07fa92 | 2016-01-04 10:31:23 -0800 | [diff] [blame^] | 332 | ret = pcf2123_rtc_read_time(&spi->dev, &tm); |
Joshua Clayton | 1e094b9 | 2016-01-04 10:31:22 -0800 | [diff] [blame] | 333 | if (ret < 0) { |
Joshua Clayton | f07fa92 | 2016-01-04 10:31:23 -0800 | [diff] [blame^] | 334 | ret = pcf2123_reset(&spi->dev); |
| 335 | if (ret < 0) { |
| 336 | dev_err(&spi->dev, "chip not found\n"); |
| 337 | goto kfree_exit; |
| 338 | } |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 339 | } |
| 340 | |
| 341 | dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n"); |
| 342 | dev_info(&spi->dev, "spiclk %u KHz.\n", |
| 343 | (spi->max_speed_hz + 500) / 1000); |
| 344 | |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 345 | /* Finalize the initialization */ |
Jingoo Han | dd48ccc | 2013-04-29 16:20:47 -0700 | [diff] [blame] | 346 | rtc = devm_rtc_device_register(&spi->dev, pcf2123_driver.driver.name, |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 347 | &pcf2123_rtc_ops, THIS_MODULE); |
| 348 | |
| 349 | if (IS_ERR(rtc)) { |
| 350 | dev_err(&spi->dev, "failed to register.\n"); |
| 351 | ret = PTR_ERR(rtc); |
| 352 | goto kfree_exit; |
| 353 | } |
| 354 | |
| 355 | pdata->rtc = rtc; |
| 356 | |
| 357 | for (i = 0; i < 16; i++) { |
Ilya Shchepetkov | 5ed12f1 | 2012-08-21 16:16:06 -0700 | [diff] [blame] | 358 | sysfs_attr_init(&pdata->regs[i].attr.attr); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 359 | sprintf(pdata->regs[i].name, "%1x", i); |
| 360 | pdata->regs[i].attr.attr.mode = S_IRUGO | S_IWUSR; |
| 361 | pdata->regs[i].attr.attr.name = pdata->regs[i].name; |
| 362 | pdata->regs[i].attr.show = pcf2123_show; |
| 363 | pdata->regs[i].attr.store = pcf2123_store; |
| 364 | ret = device_create_file(&spi->dev, &pdata->regs[i].attr); |
| 365 | if (ret) { |
| 366 | dev_err(&spi->dev, "Unable to create sysfs %s\n", |
| 367 | pdata->regs[i].name); |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 368 | goto sysfs_exit; |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 369 | } |
| 370 | } |
| 371 | |
| 372 | return 0; |
Chris Verges | f3d2570a | 2009-09-22 16:46:22 -0700 | [diff] [blame] | 373 | |
| 374 | sysfs_exit: |
| 375 | for (i--; i >= 0; i--) |
| 376 | device_remove_file(&spi->dev, &pdata->regs[i].attr); |
| 377 | |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 378 | kfree_exit: |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 379 | spi->dev.platform_data = NULL; |
| 380 | return ret; |
| 381 | } |
| 382 | |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 383 | static int pcf2123_remove(struct spi_device *spi) |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 384 | { |
Jingoo Han | ffc75bb | 2013-11-12 15:10:50 -0800 | [diff] [blame] | 385 | struct pcf2123_plat_data *pdata = dev_get_platdata(&spi->dev); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 386 | int i; |
| 387 | |
| 388 | if (pdata) { |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 389 | for (i = 0; i < 16; i++) |
| 390 | if (pdata->regs[i].name[0]) |
| 391 | device_remove_file(&spi->dev, |
| 392 | &pdata->regs[i].attr); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 393 | } |
| 394 | |
| 395 | return 0; |
| 396 | } |
| 397 | |
Joshua Clayton | 3fc7007 | 2015-02-13 14:40:29 -0800 | [diff] [blame] | 398 | #ifdef CONFIG_OF |
| 399 | static const struct of_device_id pcf2123_dt_ids[] = { |
| 400 | { .compatible = "nxp,rtc-pcf2123", }, |
| 401 | { /* sentinel */ } |
| 402 | }; |
| 403 | MODULE_DEVICE_TABLE(of, pcf2123_dt_ids); |
| 404 | #endif |
| 405 | |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 406 | static struct spi_driver pcf2123_driver = { |
| 407 | .driver = { |
| 408 | .name = "rtc-pcf2123", |
Joshua Clayton | 3fc7007 | 2015-02-13 14:40:29 -0800 | [diff] [blame] | 409 | .of_match_table = of_match_ptr(pcf2123_dt_ids), |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 410 | }, |
| 411 | .probe = pcf2123_probe, |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 412 | .remove = pcf2123_remove, |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 413 | }; |
| 414 | |
Axel Lin | 109e941 | 2012-03-23 15:02:30 -0700 | [diff] [blame] | 415 | module_spi_driver(pcf2123_driver); |
Chris Verges | 7f3923a | 2009-09-22 16:46:20 -0700 | [diff] [blame] | 416 | |
| 417 | MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>"); |
| 418 | MODULE_DESCRIPTION("NXP PCF2123 RTC driver"); |
| 419 | MODULE_LICENSE("GPL"); |
| 420 | MODULE_VERSION(DRV_VERSION); |