blob: 536ffa897c6c20ef07b4819779d2401b083c5684 [file] [log] [blame]
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
Paul Mackerras14cf11a2005-09-26 16:04:21 +100016#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/types.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100022#include <linux/mman.h>
23#include <linux/mm.h>
Johannes Berg543b9fd2007-05-03 22:31:38 +100024#include <linux/suspend.h>
Tony Breedsad7f7162008-02-05 16:16:48 +110025#include <linux/hrtimer.h>
Stephen Rothwelld1dead52005-09-29 00:35:31 +100026#ifdef CONFIG_PPC64
Paul Mackerras14cf11a2005-09-26 16:04:21 +100027#include <linux/time.h>
28#include <linux/hardirq.h>
Stephen Rothwelld1dead52005-09-29 00:35:31 +100029#endif
Christoph Lameterd4d298f2008-04-29 01:04:08 -070030#include <linux/kbuild.h>
Stephen Rothwelld1dead52005-09-29 00:35:31 +100031
Paul Mackerras14cf11a2005-09-26 16:04:21 +100032#include <asm/io.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <asm/processor.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100036#include <asm/cputable.h>
37#include <asm/thread_info.h>
Paul Mackerras033ef332005-10-26 17:05:24 +100038#include <asm/rtas.h>
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +110039#include <asm/vdso_datapage.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100040#ifdef CONFIG_PPC64
41#include <asm/paca.h>
42#include <asm/lppaca.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100043#include <asm/cache.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100044#include <asm/compat.h>
Michael Neuling11a27ad2006-08-09 17:00:30 +100045#include <asm/mmu.h>
Olof Johanssonf04da0bc2006-09-13 13:32:39 -050046#include <asm/hvcall.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100047#endif
Stephen Rothwell3eb9cf02008-04-10 16:39:18 +100048#ifdef CONFIG_PPC_ISERIES
49#include <asm/iseries/alpaca.h>
50#endif
Benjamin Herrenschmidted79ba92011-09-19 17:45:04 +000051#ifdef CONFIG_PPC_POWERNV
52#include <asm/opal.h>
53#endif
Alexander Graf989044e2010-08-30 12:01:56 +020054#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
Hollis Blanchard366d4b92009-01-03 16:23:08 -060055#include <linux/kvm_host.h>
Alexander Graf06046752010-04-16 00:11:44 +020056#endif
Alexander Graf989044e2010-08-30 12:01:56 +020057#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
58#include <asm/kvm_book3s.h>
Hollis Blancharddb93f572008-11-05 09:36:18 -060059#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100060
Benjamin Herrenschmidt57e2a992009-07-28 11:59:34 +100061#ifdef CONFIG_PPC32
Kumar Galafca622c2008-04-30 05:23:21 -050062#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
63#include "head_booke.h"
64#endif
Benjamin Herrenschmidt57e2a992009-07-28 11:59:34 +100065#endif
Kumar Galafca622c2008-04-30 05:23:21 -050066
Kumar Gala55fd7662009-10-16 18:48:40 -050067#if defined(CONFIG_PPC_FSL_BOOK3E)
Trent Piepho19f54652008-12-08 19:34:55 -080068#include "../mm/mmu_decl.h"
69#endif
70
Paul Mackerras14cf11a2005-09-26 16:04:21 +100071int main(void)
72{
Paul Mackerras14cf11a2005-09-26 16:04:21 +100073 DEFINE(THREAD, offsetof(struct task_struct, thread));
Paul Mackerras14cf11a2005-09-26 16:04:21 +100074 DEFINE(MM, offsetof(struct task_struct, mm));
Benjamin Herrenschmidt5e696612008-12-18 19:13:24 +000075 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
Stephen Rothwelld1dead52005-09-29 00:35:31 +100076#ifdef CONFIG_PPC64
Stephen Rothwelld1dead52005-09-29 00:35:31 +100077 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
Paul Mackerras9c1e1052009-08-17 15:17:54 +100078 DEFINE(SIGSEGV, SIGSEGV);
79 DEFINE(NMI_MASK, NMI_MASK);
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +000080 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
Stephen Rothwelld1dead52005-09-29 00:35:31 +100081#else
Roman Zippelf7e42172007-05-09 02:35:17 -070082 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
Stephen Rothwelld1dead52005-09-29 00:35:31 +100083#endif /* CONFIG_PPC64 */
84
Paul Mackerras14cf11a2005-09-26 16:04:21 +100085 DEFINE(KSP, offsetof(struct thread_struct, ksp));
Kumar Gala85218822008-04-28 16:21:22 +100086 DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
Paul Mackerras14cf11a2005-09-26 16:04:21 +100087 DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
Ashish Kalra1325a682011-04-22 16:48:27 -050088#ifdef CONFIG_BOOKE
89 DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
90#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100091 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
92 DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
93 DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
Paul Mackerras14cf11a2005-09-26 16:04:21 +100094#ifdef CONFIG_ALTIVEC
95 DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
96 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
97 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
98 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
99#endif /* CONFIG_ALTIVEC */
Michael Neulingc6e67712008-06-25 14:07:18 +1000100#ifdef CONFIG_VSX
101 DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
102 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
103#endif /* CONFIG_VSX */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000104#ifdef CONFIG_PPC64
105 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
106#else /* CONFIG_PPC64 */
107 DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000108#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
109 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000110#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000111#ifdef CONFIG_SPE
112 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
113 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
114 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
115 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
116#endif /* CONFIG_SPE */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000117#endif /* CONFIG_PPC64 */
Alexander Graf97e49252010-04-16 00:11:51 +0200118#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
119 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
120#endif
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000121
122 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
Paul Mackerrasf39224a2006-04-18 21:49:11 +1000123 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000124 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000125 DEFINE(TI_TASK, offsetof(struct thread_info, task));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000126 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000127
128#ifdef CONFIG_PPC64
129 DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
130 DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
131 DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
132 DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
133 DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
134 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000135 /* paca */
136 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
Paul Mackerras9e368f22011-06-29 00:40:08 +0000137 DEFINE(PACA_LOCK_TOKEN, offsetof(struct paca_struct, lock_token));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000138 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
139 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
140 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
141 DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
142 DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000143 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
144 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
145 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
Paul Mackerras1f6a93e2008-08-30 11:40:24 +1000146 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
147 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
Paul Mackerrasd04c56f2006-10-04 16:47:49 +1000148 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
149 DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000150 DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
Benjamin Herrenschmidtd0f13e32007-05-08 16:27:27 +1000151#ifdef CONFIG_PPC_MM_SLICES
152 DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
153 context.low_slices_psize));
154 DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
155 context.high_slices_psize));
156 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000157#endif /* CONFIG_PPC_MM_SLICES */
Benjamin Herrenschmidtdce66702009-07-23 23:15:42 +0000158
159#ifdef CONFIG_PPC_BOOK3E
160 DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
161 DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
162 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
163 DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
164 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
165 DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
166 DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
167 DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
168 DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
169 DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
170#endif /* CONFIG_PPC_BOOK3E */
171
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000172#ifdef CONFIG_PPC_STD_MMU_64
173 DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
174 DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
175 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
176 DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
177 DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
178#ifdef CONFIG_PPC_MM_SLICES
Benjamin Herrenschmidtd0f13e32007-05-08 16:27:27 +1000179 DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
180#else
181 DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
Benjamin Herrenschmidtd0f13e32007-05-08 16:27:27 +1000182#endif /* CONFIG_PPC_MM_SLICES */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000183 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
184 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
185 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
David Gibson3356bb9f72006-01-13 10:26:42 +1100186 DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
Michael Neuling2f6093c2006-08-07 16:19:19 +1000187 DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
Michael Neuling11a27ad2006-08-09 17:00:30 +1000188 DEFINE(SLBSHADOW_STACKVSID,
189 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
190 DEFINE(SLBSHADOW_STACKESID,
191 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000192 DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000193 DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
194 DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));
195 DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));
196 DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000197 DEFINE(LPPACA_PMCINUSE, offsetof(struct lppaca, pmcregs_in_use));
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000198 DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));
Paul Mackerrasa8606e22011-06-29 00:22:05 +0000199 DEFINE(LPPACA_YIELDCOUNT, offsetof(struct lppaca, yield_count));
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000200 DEFINE(PACA_DTL_RIDX, offsetof(struct paca_struct, dtl_ridx));
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000201#endif /* CONFIG_PPC_STD_MMU_64 */
202 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
203 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
Michael Neuling1fc711f2010-05-13 19:40:11 +0000204 DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000205 DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));
206 DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000207 DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
208 DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000209 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
Paul Mackerras033ef332005-10-26 17:05:24 +1000210#endif /* CONFIG_PPC64 */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000211
212 /* RTAS */
213 DEFINE(RTASBASE, offsetof(struct rtas_t, base));
214 DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000215
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000216 /* Interrupt register frame */
Kumar Gala91120cc2008-04-24 06:33:49 +1000217 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000218 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
Alexander Graf218d1692010-04-16 00:11:55 +0200219#ifdef CONFIG_PPC64
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000220 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
221 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
222 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
Mike Kravetz57852a82006-09-06 16:23:12 -0700223
224 /* hcall statistics */
225 DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
226 DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
227 DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
228 DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000229#endif /* CONFIG_PPC64 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000230 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
231 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
232 DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
233 DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
234 DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
235 DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
236 DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
237 DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
238 DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
239 DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
240 DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
241 DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
242 DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
243 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000244#ifndef CONFIG_PPC64
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000245 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
246 DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
247 DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
248 DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
249 DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
250 DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
251 DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
252 DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
253 DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
254 DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
255 DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
256 DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
257 DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
258 DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
259 DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
260 DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
261 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
262 DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000263#endif /* CONFIG_PPC64 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000264 /*
265 * Note: these symbols include _ because they overlap with special
266 * register names
267 */
268 DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
269 DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
270 DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
271 DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
272 DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000273 DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
274 DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
275 DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000276 DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
277 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
Paul Mackerrasd73e0c92005-10-28 22:45:25 +1000278 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000279#ifndef CONFIG_PPC64
280 DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
281 /*
282 * The PowerPC 400-class & Book-E processors have neither the DAR
283 * nor the DSISR SPRs. Hence, we overload them to hold the similar
284 * DEAR and ESR SPRs for such processors. For critical interrupts
285 * we use them to hold SRR0 and SRR1.
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000286 */
287 DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
288 DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000289#else /* CONFIG_PPC64 */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000290 DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
291
292 /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
293 DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
294 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
295#endif /* CONFIG_PPC64 */
296
Benjamin Herrenschmidt57e2a992009-07-28 11:59:34 +1000297#if defined(CONFIG_PPC32)
Kumar Galafca622c2008-04-30 05:23:21 -0500298#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
299 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
300 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
301 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
302 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
303 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
304 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
305 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
306 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
307 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
308 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
309 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
310 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
311 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
312 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
313 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
314 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
315#endif
Benjamin Herrenschmidt57e2a992009-07-28 11:59:34 +1000316#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000317 DEFINE(CLONE_VM, CLONE_VM);
318 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000319
320#ifndef CONFIG_PPC64
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000321 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000322#endif /* ! CONFIG_PPC64 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000323
324 /* About the CPU features table */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000325 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
326 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
Olof Johanssonf39b7a52006-08-11 00:07:08 -0500327 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000328
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000329 DEFINE(pbe_address, offsetof(struct pbe, address));
330 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
331 DEFINE(pbe_next, offsetof(struct pbe, next));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000332
Johannes Berg543b9fd2007-05-03 22:31:38 +1000333#ifndef CONFIG_PPC64
Paul Mackerrasfd582ec2005-10-11 22:08:12 +1000334 DEFINE(TASK_SIZE, TASK_SIZE);
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000335 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100336#endif /* ! CONFIG_PPC64 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000337
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100338 /* datapage offsets for use by vdso */
339 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
340 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
341 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
342 DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
343 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
344 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
345 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
346 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
347 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
348 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
Paul Mackerras597bc5c2008-10-27 23:56:03 +0000349 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
Paul Mackerras8fd63a92010-06-20 19:03:08 +0000350 DEFINE(STAMP_SEC_FRAC, offsetof(struct vdso_data, stamp_sec_fraction));
Olof Johanssonfbe48172007-11-20 12:24:45 +1100351 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
352 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
353 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
354 DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100355#ifdef CONFIG_PPC64
356 DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000357 DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
358 DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
359 DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
360 DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
Benjamin Herrenschmidt0c37ec22005-11-14 14:55:58 +1100361 DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
362 DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100363 DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
364 DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
365#else
366 DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
367 DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
Benjamin Herrenschmidt0c37ec22005-11-14 14:55:58 +1100368 DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
369 DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100370#endif
371 /* timeval/timezone offsets for use by vdso */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000372 DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
373 DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100374
375 /* Other bits used by the vdso */
376 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
377 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
378 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
Tony Breeds151db1f2008-02-08 09:24:52 +1100379 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100380
David Woodhouse007d88d2007-01-01 18:45:34 +0000381#ifdef CONFIG_BUG
382 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
383#endif
Stephen Rothwell16a15a32007-08-20 14:58:36 +1000384
385#ifdef CONFIG_PPC_ISERIES
386 /* the assembler miscalculates the VSID values */
387 DEFINE(PAGE_OFFSET_ESID, GET_ESID(PAGE_OFFSET));
388 DEFINE(PAGE_OFFSET_VSID, KERNEL_VSID(PAGE_OFFSET));
389 DEFINE(VMALLOC_START_ESID, GET_ESID(VMALLOC_START));
390 DEFINE(VMALLOC_START_VSID, KERNEL_VSID(VMALLOC_START));
Stephen Rothwell3eb9cf02008-04-10 16:39:18 +1000391
392 /* alpaca */
393 DEFINE(ALPACA_SIZE, sizeof(struct alpaca));
Stephen Rothwell16a15a32007-08-20 14:58:36 +1000394#endif
Stephen Rothwellee7a76d2007-09-18 17:22:59 +1000395
Stephen Rothwellee7a76d2007-09-18 17:22:59 +1000396 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
Becky Bruce4ee70842008-09-24 11:01:24 -0500397 DEFINE(PTE_SIZE, sizeof(pte_t));
Kumar Galabee86f142007-12-06 13:11:04 -0600398
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500399#ifdef CONFIG_KVM
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500400 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
401 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500402 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
Scott Woodeab17672011-04-27 17:24:10 -0500403 DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000404 DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fpr));
405 DEFINE(VCPU_FPSCR, offsetof(struct kvm_vcpu, arch.fpscr));
406#ifdef CONFIG_ALTIVEC
407 DEFINE(VCPU_VRS, offsetof(struct kvm_vcpu, arch.vr));
408 DEFINE(VCPU_VSCR, offsetof(struct kvm_vcpu, arch.vscr));
409#endif
410#ifdef CONFIG_VSX
411 DEFINE(VCPU_VSRS, offsetof(struct kvm_vcpu, arch.vsr));
412#endif
413 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
414 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
415 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
416 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
417 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
418#ifdef CONFIG_KVM_BOOK3S_64_HV
419 DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.shregs.msr));
420 DEFINE(VCPU_SRR0, offsetof(struct kvm_vcpu, arch.shregs.srr0));
421 DEFINE(VCPU_SRR1, offsetof(struct kvm_vcpu, arch.shregs.srr1));
422 DEFINE(VCPU_SPRG0, offsetof(struct kvm_vcpu, arch.shregs.sprg0));
423 DEFINE(VCPU_SPRG1, offsetof(struct kvm_vcpu, arch.shregs.sprg1));
424 DEFINE(VCPU_SPRG2, offsetof(struct kvm_vcpu, arch.shregs.sprg2));
425 DEFINE(VCPU_SPRG3, offsetof(struct kvm_vcpu, arch.shregs.sprg3));
426#endif
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500427 DEFINE(VCPU_SPRG4, offsetof(struct kvm_vcpu, arch.sprg4));
428 DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5));
429 DEFINE(VCPU_SPRG6, offsetof(struct kvm_vcpu, arch.sprg6));
430 DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7));
Hollis Blanchard49dd2c42008-07-25 13:54:53 -0500431 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500432 DEFINE(VCPU_SHADOW_PID1, offsetof(struct kvm_vcpu, arch.shadow_pid1));
Alexander Graf96bc4512010-07-29 14:47:42 +0200433 DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
Alexander Graf666e7252010-07-29 14:47:43 +0200434 DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
Scott Woodecee2732011-06-14 18:34:29 -0500435 DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500436
Alexander Graf00c3a372010-04-16 00:11:42 +0200437 /* book3s */
Paul Mackerrasde56a942011-06-29 00:21:34 +0000438#ifdef CONFIG_KVM_BOOK3S_64_HV
439 DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));
440 DEFINE(KVM_SDR1, offsetof(struct kvm, arch.sdr1));
441 DEFINE(KVM_HOST_LPID, offsetof(struct kvm, arch.host_lpid));
442 DEFINE(KVM_HOST_LPCR, offsetof(struct kvm, arch.host_lpcr));
443 DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1));
444 DEFINE(KVM_TLBIE_LOCK, offsetof(struct kvm, arch.tlbie_lock));
445 DEFINE(KVM_ONLINE_CPUS, offsetof(struct kvm, online_vcpus.counter));
446 DEFINE(KVM_LAST_VCPU, offsetof(struct kvm, arch.last_vcpu));
Paul Mackerrasaa04b4c2011-06-29 00:25:44 +0000447 DEFINE(KVM_LPCR, offsetof(struct kvm, arch.lpcr));
448 DEFINE(KVM_RMOR, offsetof(struct kvm, arch.rmor));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000449 DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));
450 DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
451#endif
Alexander Graf00c3a372010-04-16 00:11:42 +0200452#ifdef CONFIG_PPC_BOOK3S
Paul Mackerrasde56a942011-06-29 00:21:34 +0000453 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
454 DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
Alexander Graf62908902009-10-30 05:47:18 +0000455 DEFINE(VCPU_HOST_RETIP, offsetof(struct kvm_vcpu, arch.host_retip));
Alexander Graf62908902009-10-30 05:47:18 +0000456 DEFINE(VCPU_HOST_MSR, offsetof(struct kvm_vcpu, arch.host_msr));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000457 DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
458 DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
459 DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));
460 DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));
461 DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
462 DEFINE(VCPU_CTRL, offsetof(struct kvm_vcpu, arch.ctrl));
463 DEFINE(VCPU_DABR, offsetof(struct kvm_vcpu, arch.dabr));
Alexander Graf62908902009-10-30 05:47:18 +0000464 DEFINE(VCPU_TRAMPOLINE_LOWMEM, offsetof(struct kvm_vcpu, arch.trampoline_lowmem));
465 DEFINE(VCPU_TRAMPOLINE_ENTER, offsetof(struct kvm_vcpu, arch.trampoline_enter));
466 DEFINE(VCPU_HIGHMEM_HANDLER, offsetof(struct kvm_vcpu, arch.highmem_handler));
Alexander Graf021ec9c2010-01-08 02:58:06 +0100467 DEFINE(VCPU_RMCALL, offsetof(struct kvm_vcpu, arch.rmcall));
Alexander Graf62908902009-10-30 05:47:18 +0000468 DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000469 DEFINE(VCPU_DEC, offsetof(struct kvm_vcpu, arch.dec));
470 DEFINE(VCPU_DEC_EXPIRES, offsetof(struct kvm_vcpu, arch.dec_expires));
Paul Mackerrasaa04b4c2011-06-29 00:25:44 +0000471 DEFINE(VCPU_PENDING_EXC, offsetof(struct kvm_vcpu, arch.pending_exceptions));
Paul Mackerrasa8606e22011-06-29 00:22:05 +0000472 DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000473 DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
474 DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
475 DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
476 DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
477 DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
478 DEFINE(VCPU_LAST_CPU, offsetof(struct kvm_vcpu, arch.last_cpu));
479 DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr));
480 DEFINE(VCPU_FAULT_DAR, offsetof(struct kvm_vcpu, arch.fault_dar));
481 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
482 DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
Paul Mackerras371fefd2011-06-29 00:23:08 +0000483 DEFINE(VCPU_PTID, offsetof(struct kvm_vcpu, arch.ptid));
484 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count));
485 DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
486 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000487 DEFINE(VCPU_SVCPU, offsetof(struct kvmppc_vcpu_book3s, shadow_vcpu) -
488 offsetof(struct kvmppc_vcpu_book3s, vcpu));
489 DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
490 DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
491 DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000492
493#ifdef CONFIG_PPC_BOOK3S_64
Paul Mackerrasde56a942011-06-29 00:21:34 +0000494#ifdef CONFIG_KVM_BOOK3S_PR
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000495# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
Paul Mackerrasde56a942011-06-29 00:21:34 +0000496#else
497# define SVCPU_FIELD(x, f)
498#endif
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000499# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
500#else /* 32-bit */
501# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
502# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
Alexander Graf06046752010-04-16 00:11:44 +0200503#endif
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000504
505 SVCPU_FIELD(SVCPU_CR, cr);
506 SVCPU_FIELD(SVCPU_XER, xer);
507 SVCPU_FIELD(SVCPU_CTR, ctr);
508 SVCPU_FIELD(SVCPU_LR, lr);
509 SVCPU_FIELD(SVCPU_PC, pc);
510 SVCPU_FIELD(SVCPU_R0, gpr[0]);
511 SVCPU_FIELD(SVCPU_R1, gpr[1]);
512 SVCPU_FIELD(SVCPU_R2, gpr[2]);
513 SVCPU_FIELD(SVCPU_R3, gpr[3]);
514 SVCPU_FIELD(SVCPU_R4, gpr[4]);
515 SVCPU_FIELD(SVCPU_R5, gpr[5]);
516 SVCPU_FIELD(SVCPU_R6, gpr[6]);
517 SVCPU_FIELD(SVCPU_R7, gpr[7]);
518 SVCPU_FIELD(SVCPU_R8, gpr[8]);
519 SVCPU_FIELD(SVCPU_R9, gpr[9]);
520 SVCPU_FIELD(SVCPU_R10, gpr[10]);
521 SVCPU_FIELD(SVCPU_R11, gpr[11]);
522 SVCPU_FIELD(SVCPU_R12, gpr[12]);
523 SVCPU_FIELD(SVCPU_R13, gpr[13]);
524 SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
525 SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
526 SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
527 SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
528#ifdef CONFIG_PPC_BOOK3S_32
529 SVCPU_FIELD(SVCPU_SR, sr);
530#endif
531#ifdef CONFIG_PPC64
532 SVCPU_FIELD(SVCPU_SLB, slb);
533 SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
534#endif
535
536 HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
537 HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
Paul Mackerrasde56a942011-06-29 00:21:34 +0000538 HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000539 HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
540 HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
541 HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
542 HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
543
Paul Mackerrasde56a942011-06-29 00:21:34 +0000544#ifdef CONFIG_KVM_BOOK3S_64_HV
545 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
Paul Mackerras371fefd2011-06-29 00:23:08 +0000546 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
547 HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
Paul Mackerrasde56a942011-06-29 00:21:34 +0000548 HSTATE_FIELD(HSTATE_MMCR, host_mmcr);
549 HSTATE_FIELD(HSTATE_PMC, host_pmc);
550 HSTATE_FIELD(HSTATE_PURR, host_purr);
551 HSTATE_FIELD(HSTATE_SPURR, host_spurr);
552 HSTATE_FIELD(HSTATE_DSCR, host_dscr);
553 HSTATE_FIELD(HSTATE_DABR, dabr);
554 HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
555#endif /* CONFIG_KVM_BOOK3S_64_HV */
556
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000557#else /* CONFIG_PPC_BOOK3S */
Alexander Graf7e57cba2010-01-08 02:58:03 +0100558 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
559 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
Alexander Graf06046752010-04-16 00:11:44 +0200560 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
561 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
562 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
563 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
564 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
565 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
Alexander Graf00c3a372010-04-16 00:11:42 +0200566#endif /* CONFIG_PPC_BOOK3S */
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000567#endif /* CONFIG_KVM */
Alexander Grafd17051c2010-07-29 14:47:57 +0200568
569#ifdef CONFIG_KVM_GUEST
570 DEFINE(KVM_MAGIC_SCRATCH1, offsetof(struct kvm_vcpu_arch_shared,
571 scratch1));
572 DEFINE(KVM_MAGIC_SCRATCH2, offsetof(struct kvm_vcpu_arch_shared,
573 scratch2));
574 DEFINE(KVM_MAGIC_SCRATCH3, offsetof(struct kvm_vcpu_arch_shared,
575 scratch3));
576 DEFINE(KVM_MAGIC_INT, offsetof(struct kvm_vcpu_arch_shared,
577 int_pending));
578 DEFINE(KVM_MAGIC_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
579 DEFINE(KVM_MAGIC_CRITICAL, offsetof(struct kvm_vcpu_arch_shared,
580 critical));
Alexander Grafcbe487f2010-08-03 10:39:35 +0200581 DEFINE(KVM_MAGIC_SR, offsetof(struct kvm_vcpu_arch_shared, sr));
Alexander Grafd17051c2010-07-29 14:47:57 +0200582#endif
583
Ilya Yanokca9153a2008-12-11 04:55:41 +0300584#ifdef CONFIG_44x
585 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
586 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
587#endif
Kumar Gala55fd7662009-10-16 18:48:40 -0500588#ifdef CONFIG_PPC_FSL_BOOK3E
Kumar Gala78f62232010-05-13 14:38:21 -0500589 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
590 DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
591 DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
592 DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
593 DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
594 DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
595#endif
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500596
Scott Wood4cd35f62011-06-14 18:34:31 -0500597#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
598 DEFINE(VCPU_EVR, offsetof(struct kvm_vcpu, arch.evr[0]));
599 DEFINE(VCPU_ACC, offsetof(struct kvm_vcpu, arch.acc));
600 DEFINE(VCPU_SPEFSCR, offsetof(struct kvm_vcpu, arch.spefscr));
601 DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));
602#endif
603
Hollis Blanchard73e75b42008-12-02 15:51:57 -0600604#ifdef CONFIG_KVM_EXIT_TIMING
605 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
606 arch.timing_exit.tv32.tbu));
607 DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
608 arch.timing_exit.tv32.tbl));
609 DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
610 arch.timing_last_enter.tv32.tbu));
611 DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
612 arch.timing_last_enter.tv32.tbl));
613#endif
614
Benjamin Herrenschmidted79ba92011-09-19 17:45:04 +0000615#ifdef CONFIG_PPC_POWERNV
616 DEFINE(OPAL_MC_GPR3, offsetof(struct opal_machine_check_event, gpr3));
617 DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
618 DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
619 DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
620#endif
621
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000622 return 0;
623}