blob: 83cdf6ab0d1fbc82d601f9290f775e04360ce460 [file] [log] [blame]
Ralf Baechlee01402b2005-07-14 15:57:16 +00001/*
2 * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved.
3 *
4 */
5
6#ifndef _RTLX_H
7#define _RTLX_H_
8
9#define LX_NODE_BASE 10
10
11#define MIPSCPU_INT_BASE 16
12#define MIPS_CPU_RTLX_IRQ 0
13
14#define RTLX_VERSION 1
15#define RTLX_xID 0x12345600
16#define RTLX_ID (RTLX_xID | RTLX_VERSION)
17#define RTLX_CHANNELS 8
18
19enum rtlx_state {
20 RTLX_STATE_UNUSED = 0,
21 RTLX_STATE_INITIALISED,
22 RTLX_STATE_REMOTE_READY,
23 RTLX_STATE_OPENED
24};
25
26#define RTLX_BUFFER_SIZE 1024
27/* each channel supports read and write.
28 linux (vpe0) reads lx_buffer and writes rt_buffer
29 SP (vpe1) reads rt_buffer and writes lx_buffer
30*/
31typedef struct rtlx_channel {
32 enum rtlx_state rt_state;
33 enum rtlx_state lx_state;
34
35 int buffer_size;
36
37 /* read and write indexes per buffer */
38 int rt_write, rt_read;
39 char *rt_buffer;
40
41 int lx_write, lx_read;
42 char *lx_buffer;
43
44 void *queues;
45
46} rtlx_channel_t;
47
48typedef struct rtlx_info {
49 unsigned long id;
50 enum rtlx_state state;
51
52 struct rtlx_channel channel[RTLX_CHANNELS];
53
54} rtlx_info_t;
55
56#endif