Marc Zyngier | fb9bd7d | 2012-03-05 11:49:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Based on arch/arm/kernel/irq.c |
| 3 | * |
| 4 | * Copyright (C) 1992 Linus Torvalds |
| 5 | * Modifications for ARM processor Copyright (C) 1995-2000 Russell King. |
| 6 | * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation. |
| 7 | * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and |
| 8 | * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>. |
| 9 | * Copyright (C) 2012 ARM Ltd. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 22 | */ |
| 23 | |
| 24 | #include <linux/kernel_stat.h> |
| 25 | #include <linux/irq.h> |
| 26 | #include <linux/smp.h> |
| 27 | #include <linux/init.h> |
Catalin Marinas | e851b58 | 2013-01-14 12:39:31 +0000 | [diff] [blame] | 28 | #include <linux/irqchip.h> |
Marc Zyngier | fb9bd7d | 2012-03-05 11:49:29 +0000 | [diff] [blame] | 29 | #include <linux/seq_file.h> |
| 30 | #include <linux/ratelimit.h> |
| 31 | |
| 32 | unsigned long irq_err_count; |
| 33 | |
| 34 | int arch_show_interrupts(struct seq_file *p, int prec) |
| 35 | { |
| 36 | #ifdef CONFIG_SMP |
| 37 | show_ipi_list(p, prec); |
| 38 | #endif |
| 39 | seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); |
| 40 | return 0; |
| 41 | } |
| 42 | |
| 43 | /* |
| 44 | * handle_IRQ handles all hardware IRQ's. Decoded IRQs should |
| 45 | * not come via this function. Instead, they should provide their |
| 46 | * own 'handler'. Used by platform code implementing C-based 1st |
| 47 | * level decoding. |
| 48 | */ |
| 49 | void handle_IRQ(unsigned int irq, struct pt_regs *regs) |
| 50 | { |
| 51 | struct pt_regs *old_regs = set_irq_regs(regs); |
| 52 | |
| 53 | irq_enter(); |
| 54 | |
| 55 | /* |
| 56 | * Some hardware gives randomly wrong interrupts. Rather |
| 57 | * than crashing, do something sensible. |
| 58 | */ |
| 59 | if (unlikely(irq >= nr_irqs)) { |
| 60 | pr_warn_ratelimited("Bad IRQ%u\n", irq); |
| 61 | ack_bad_irq(irq); |
| 62 | } else { |
| 63 | generic_handle_irq(irq); |
| 64 | } |
| 65 | |
| 66 | irq_exit(); |
| 67 | set_irq_regs(old_regs); |
| 68 | } |
| 69 | |
Catalin Marinas | e851b58 | 2013-01-14 12:39:31 +0000 | [diff] [blame] | 70 | void __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) |
| 71 | { |
| 72 | if (handle_arch_irq) |
| 73 | return; |
| 74 | |
| 75 | handle_arch_irq = handle_irq; |
| 76 | } |
Marc Zyngier | fb9bd7d | 2012-03-05 11:49:29 +0000 | [diff] [blame] | 77 | |
| 78 | void __init init_IRQ(void) |
| 79 | { |
Catalin Marinas | e851b58 | 2013-01-14 12:39:31 +0000 | [diff] [blame] | 80 | irqchip_init(); |
Marc Zyngier | fb9bd7d | 2012-03-05 11:49:29 +0000 | [diff] [blame] | 81 | if (!handle_arch_irq) |
| 82 | panic("No interrupt controller found."); |
| 83 | } |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 84 | |
| 85 | #ifdef CONFIG_HOTPLUG_CPU |
| 86 | static bool migrate_one_irq(struct irq_desc *desc) |
| 87 | { |
| 88 | struct irq_data *d = irq_desc_get_irq_data(desc); |
| 89 | const struct cpumask *affinity = d->affinity; |
| 90 | struct irq_chip *c; |
| 91 | bool ret = false; |
| 92 | |
| 93 | /* |
| 94 | * If this is a per-CPU interrupt, or the affinity does not |
| 95 | * include this CPU, then we have nothing to do. |
| 96 | */ |
| 97 | if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity)) |
| 98 | return false; |
| 99 | |
| 100 | if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { |
| 101 | affinity = cpu_online_mask; |
| 102 | ret = true; |
| 103 | } |
| 104 | |
| 105 | c = irq_data_get_irq_chip(d); |
| 106 | if (!c->irq_set_affinity) |
| 107 | pr_debug("IRQ%u: unable to set affinity\n", d->irq); |
| 108 | else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret) |
| 109 | cpumask_copy(d->affinity, affinity); |
| 110 | |
| 111 | return ret; |
| 112 | } |
| 113 | |
| 114 | /* |
| 115 | * The current CPU has been marked offline. Migrate IRQs off this CPU. |
| 116 | * If the affinity settings do not allow other CPUs, force them onto any |
| 117 | * available CPU. |
| 118 | * |
| 119 | * Note: we must iterate over all IRQs, whether they have an attached |
| 120 | * action structure or not, as we need to get chained interrupts too. |
| 121 | */ |
| 122 | void migrate_irqs(void) |
| 123 | { |
| 124 | unsigned int i; |
| 125 | struct irq_desc *desc; |
| 126 | unsigned long flags; |
| 127 | |
| 128 | local_irq_save(flags); |
| 129 | |
| 130 | for_each_irq_desc(i, desc) { |
| 131 | bool affinity_broken; |
| 132 | |
| 133 | raw_spin_lock(&desc->lock); |
| 134 | affinity_broken = migrate_one_irq(desc); |
| 135 | raw_spin_unlock(&desc->lock); |
| 136 | |
| 137 | if (affinity_broken) |
| 138 | pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n", |
| 139 | i, smp_processor_id()); |
| 140 | } |
| 141 | |
| 142 | local_irq_restore(flags); |
| 143 | } |
| 144 | #endif /* CONFIG_HOTPLUG_CPU */ |