| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Carsten Langgaard, carstenl@mips.com |
| 3 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. |
| 4 | * |
| 5 | * ######################################################################## |
| 6 | * |
| 7 | * This program is free software; you can distribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License (Version 2) as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 14 | * for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along |
| 17 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 18 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
| 19 | * |
| 20 | * ######################################################################## |
| 21 | * |
| 22 | * Defines of the Atlas board specific address-MAP, registers, etc. |
| 23 | * |
| 24 | */ |
| 25 | #ifndef _MIPS_ATLAS_H |
| 26 | #define _MIPS_ATLAS_H |
| 27 | |
| 28 | #include <asm/addrspace.h> |
| 29 | |
| 30 | /* |
| 31 | * Atlas RTC-device indirect register access. |
| 32 | */ |
| 33 | #define ATLAS_RTC_ADR_REG 0x1f000800 |
| 34 | #define ATLAS_RTC_DAT_REG 0x1f000808 |
| 35 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | /* |
| 37 | * Atlas interrupt controller register base. |
| 38 | */ |
| 39 | #define ATLAS_ICTRL_REGS_BASE 0x1f000000 |
| 40 | |
| 41 | /* |
| Ralf Baechle | d35d473 | 2006-04-03 13:17:41 +0100 | [diff] [blame] | 42 | * Atlas registers are memory mapped on 64-bit aligned boundaries and |
| 43 | * only word access are allowed. |
| 44 | */ |
| 45 | struct atlas_ictrl_regs { |
| 46 | volatile unsigned int intraw; |
| 47 | int dummy1; |
| 48 | volatile unsigned int intseten; |
| 49 | int dummy2; |
| 50 | volatile unsigned int intrsten; |
| 51 | int dummy3; |
| 52 | volatile unsigned int intenable; |
| 53 | int dummy4; |
| 54 | volatile unsigned int intstatus; |
| 55 | int dummy5; |
| 56 | }; |
| 57 | |
| 58 | /* |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | * Atlas UART register base. |
| 60 | */ |
| 61 | #define ATLAS_UART_REGS_BASE 0x1f000900 |
| 62 | #define ATLAS_BASE_BAUD ( 3686400 / 16 ) |
| 63 | |
| 64 | /* |
| 65 | * Atlas PSU standby register. |
| 66 | */ |
| 67 | #define ATLAS_PSUSTBY_REG 0x1f000600 |
| 68 | #define ATLAS_GOSTBY 0x4d |
| 69 | |
| 70 | /* |
| 71 | * We make a universal assumption about the way the bootloader (YAMON) |
| 72 | * have located the Philips SAA9730 chip. |
| 73 | * This is not ideal, but is needed for setting up remote debugging as |
| 74 | * soon as possible. |
| 75 | */ |
| 76 | #define ATLAS_SAA9730_REG 0x10800000 |
| 77 | |
| 78 | #define ATLAS_SAA9730_BAUDCLOCK 3692300 |
| 79 | |
| 80 | #endif /* !(_MIPS_ATLAS_H) */ |