James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 1 | /*: |
| 2 | * Hibernate support specific for ARM64 |
| 3 | * |
| 4 | * Derived from work on ARM hibernation support by: |
| 5 | * |
| 6 | * Ubuntu project, hibernation support for mach-dove |
| 7 | * Copyright (C) 2010 Nokia Corporation (Hiroshi Doyu) |
| 8 | * Copyright (C) 2010 Texas Instruments, Inc. (Teerth Reddy et al.) |
| 9 | * https://lkml.org/lkml/2010/6/18/4 |
| 10 | * https://lists.linux-foundation.org/pipermail/linux-pm/2010-June/027422.html |
| 11 | * https://patchwork.kernel.org/patch/96442/ |
| 12 | * |
| 13 | * Copyright (C) 2006 Rafael J. Wysocki <rjw@sisk.pl> |
| 14 | * |
| 15 | * License terms: GNU General Public License (GPL) version 2 |
| 16 | */ |
| 17 | #define pr_fmt(x) "hibernate: " x |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 18 | #include <linux/cpu.h> |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 19 | #include <linux/kvm_host.h> |
| 20 | #include <linux/mm.h> |
| 21 | #include <linux/pm.h> |
| 22 | #include <linux/sched.h> |
| 23 | #include <linux/suspend.h> |
| 24 | #include <linux/utsname.h> |
| 25 | #include <linux/version.h> |
| 26 | |
| 27 | #include <asm/barrier.h> |
| 28 | #include <asm/cacheflush.h> |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 29 | #include <asm/cputype.h> |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 30 | #include <asm/irqflags.h> |
| 31 | #include <asm/memory.h> |
| 32 | #include <asm/mmu_context.h> |
| 33 | #include <asm/pgalloc.h> |
| 34 | #include <asm/pgtable.h> |
| 35 | #include <asm/pgtable-hwdef.h> |
| 36 | #include <asm/sections.h> |
James Morse | d74b4e4 | 2016-06-22 10:06:13 +0100 | [diff] [blame] | 37 | #include <asm/smp.h> |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 38 | #include <asm/smp_plat.h> |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 39 | #include <asm/suspend.h> |
Mark Rutland | 0194e76 | 2016-08-11 14:11:05 +0100 | [diff] [blame] | 40 | #include <asm/sysreg.h> |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 41 | #include <asm/virt.h> |
| 42 | |
| 43 | /* |
| 44 | * Hibernate core relies on this value being 0 on resume, and marks it |
| 45 | * __nosavedata assuming it will keep the resume kernel's '0' value. This |
| 46 | * doesn't happen with either KASLR. |
| 47 | * |
| 48 | * defined as "__visible int in_suspend __nosavedata" in |
| 49 | * kernel/power/hibernate.c |
| 50 | */ |
| 51 | extern int in_suspend; |
| 52 | |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 53 | /* Do we need to reset el2? */ |
| 54 | #define el2_reset_needed() (is_hyp_mode_available() && !is_kernel_in_hyp_mode()) |
| 55 | |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 56 | /* temporary el2 vectors in the __hibernate_exit_text section. */ |
| 57 | extern char hibernate_el2_vectors[]; |
| 58 | |
| 59 | /* hyp-stub vectors, used to restore el2 during resume from hibernate. */ |
| 60 | extern char __hyp_stub_vectors[]; |
| 61 | |
| 62 | /* |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 63 | * The logical cpu number we should resume on, initialised to a non-cpu |
| 64 | * number. |
| 65 | */ |
| 66 | static int sleep_cpu = -EINVAL; |
| 67 | |
| 68 | /* |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 69 | * Values that may not change over hibernate/resume. We put the build number |
| 70 | * and date in here so that we guarantee not to resume with a different |
| 71 | * kernel. |
| 72 | */ |
| 73 | struct arch_hibernate_hdr_invariants { |
| 74 | char uts_version[__NEW_UTS_LEN + 1]; |
| 75 | }; |
| 76 | |
| 77 | /* These values need to be know across a hibernate/restore. */ |
| 78 | static struct arch_hibernate_hdr { |
| 79 | struct arch_hibernate_hdr_invariants invariants; |
| 80 | |
| 81 | /* These are needed to find the relocated kernel if built with kaslr */ |
| 82 | phys_addr_t ttbr1_el1; |
| 83 | void (*reenter_kernel)(void); |
| 84 | |
| 85 | /* |
| 86 | * We need to know where the __hyp_stub_vectors are after restore to |
| 87 | * re-configure el2. |
| 88 | */ |
| 89 | phys_addr_t __hyp_stub_vectors; |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 90 | |
| 91 | u64 sleep_cpu_mpidr; |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 92 | } resume_hdr; |
| 93 | |
| 94 | static inline void arch_hdr_invariants(struct arch_hibernate_hdr_invariants *i) |
| 95 | { |
| 96 | memset(i, 0, sizeof(*i)); |
| 97 | memcpy(i->uts_version, init_utsname()->version, sizeof(i->uts_version)); |
| 98 | } |
| 99 | |
| 100 | int pfn_is_nosave(unsigned long pfn) |
| 101 | { |
Laura Abbott | 4b3b108 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 102 | unsigned long nosave_begin_pfn = sym_to_pfn(&__nosave_begin); |
| 103 | unsigned long nosave_end_pfn = sym_to_pfn(&__nosave_end - 1); |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 104 | |
| 105 | return (pfn >= nosave_begin_pfn) && (pfn <= nosave_end_pfn); |
| 106 | } |
| 107 | |
| 108 | void notrace save_processor_state(void) |
| 109 | { |
| 110 | WARN_ON(num_online_cpus() != 1); |
| 111 | } |
| 112 | |
| 113 | void notrace restore_processor_state(void) |
| 114 | { |
| 115 | } |
| 116 | |
| 117 | int arch_hibernation_header_save(void *addr, unsigned int max_size) |
| 118 | { |
| 119 | struct arch_hibernate_hdr *hdr = addr; |
| 120 | |
| 121 | if (max_size < sizeof(*hdr)) |
| 122 | return -EOVERFLOW; |
| 123 | |
| 124 | arch_hdr_invariants(&hdr->invariants); |
Laura Abbott | 4b3b108 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 125 | hdr->ttbr1_el1 = __pa_symbol(swapper_pg_dir); |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 126 | hdr->reenter_kernel = _cpu_resume; |
| 127 | |
| 128 | /* We can't use __hyp_get_vectors() because kvm may still be loaded */ |
| 129 | if (el2_reset_needed()) |
Laura Abbott | 4b3b108 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 130 | hdr->__hyp_stub_vectors = __pa_symbol(__hyp_stub_vectors); |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 131 | else |
| 132 | hdr->__hyp_stub_vectors = 0; |
| 133 | |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 134 | /* Save the mpidr of the cpu we called cpu_suspend() on... */ |
| 135 | if (sleep_cpu < 0) { |
| 136 | pr_err("Failing to hibernate on an unkown CPU.\n"); |
| 137 | return -ENODEV; |
| 138 | } |
| 139 | hdr->sleep_cpu_mpidr = cpu_logical_map(sleep_cpu); |
| 140 | pr_info("Hibernating on CPU %d [mpidr:0x%llx]\n", sleep_cpu, |
| 141 | hdr->sleep_cpu_mpidr); |
| 142 | |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 143 | return 0; |
| 144 | } |
| 145 | EXPORT_SYMBOL(arch_hibernation_header_save); |
| 146 | |
| 147 | int arch_hibernation_header_restore(void *addr) |
| 148 | { |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 149 | int ret; |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 150 | struct arch_hibernate_hdr_invariants invariants; |
| 151 | struct arch_hibernate_hdr *hdr = addr; |
| 152 | |
| 153 | arch_hdr_invariants(&invariants); |
| 154 | if (memcmp(&hdr->invariants, &invariants, sizeof(invariants))) { |
| 155 | pr_crit("Hibernate image not generated by this kernel!\n"); |
| 156 | return -EINVAL; |
| 157 | } |
| 158 | |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 159 | sleep_cpu = get_logical_index(hdr->sleep_cpu_mpidr); |
| 160 | pr_info("Hibernated on CPU %d [mpidr:0x%llx]\n", sleep_cpu, |
| 161 | hdr->sleep_cpu_mpidr); |
| 162 | if (sleep_cpu < 0) { |
| 163 | pr_crit("Hibernated on a CPU not known to this kernel!\n"); |
| 164 | sleep_cpu = -EINVAL; |
| 165 | return -EINVAL; |
| 166 | } |
| 167 | if (!cpu_online(sleep_cpu)) { |
| 168 | pr_info("Hibernated on a CPU that is offline! Bringing CPU up.\n"); |
| 169 | ret = cpu_up(sleep_cpu); |
| 170 | if (ret) { |
| 171 | pr_err("Failed to bring hibernate-CPU up!\n"); |
| 172 | sleep_cpu = -EINVAL; |
| 173 | return ret; |
| 174 | } |
| 175 | } |
| 176 | |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 177 | resume_hdr = *hdr; |
| 178 | |
| 179 | return 0; |
| 180 | } |
| 181 | EXPORT_SYMBOL(arch_hibernation_header_restore); |
| 182 | |
| 183 | /* |
| 184 | * Copies length bytes, starting at src_start into an new page, |
| 185 | * perform cache maintentance, then maps it at the specified address low |
| 186 | * address as executable. |
| 187 | * |
| 188 | * This is used by hibernate to copy the code it needs to execute when |
| 189 | * overwriting the kernel text. This function generates a new set of page |
| 190 | * tables, which it loads into ttbr0. |
| 191 | * |
| 192 | * Length is provided as we probably only want 4K of data, even on a 64K |
| 193 | * page system. |
| 194 | */ |
| 195 | static int create_safe_exec_page(void *src_start, size_t length, |
| 196 | unsigned long dst_addr, |
| 197 | phys_addr_t *phys_dst_addr, |
| 198 | void *(*allocator)(gfp_t mask), |
| 199 | gfp_t mask) |
| 200 | { |
| 201 | int rc = 0; |
| 202 | pgd_t *pgd; |
| 203 | pud_t *pud; |
| 204 | pmd_t *pmd; |
| 205 | pte_t *pte; |
| 206 | unsigned long dst = (unsigned long)allocator(mask); |
| 207 | |
| 208 | if (!dst) { |
| 209 | rc = -ENOMEM; |
| 210 | goto out; |
| 211 | } |
| 212 | |
| 213 | memcpy((void *)dst, src_start, length); |
| 214 | flush_icache_range(dst, dst + length); |
| 215 | |
| 216 | pgd = pgd_offset_raw(allocator(mask), dst_addr); |
| 217 | if (pgd_none(*pgd)) { |
| 218 | pud = allocator(mask); |
| 219 | if (!pud) { |
| 220 | rc = -ENOMEM; |
| 221 | goto out; |
| 222 | } |
| 223 | pgd_populate(&init_mm, pgd, pud); |
| 224 | } |
| 225 | |
| 226 | pud = pud_offset(pgd, dst_addr); |
| 227 | if (pud_none(*pud)) { |
| 228 | pmd = allocator(mask); |
| 229 | if (!pmd) { |
| 230 | rc = -ENOMEM; |
| 231 | goto out; |
| 232 | } |
| 233 | pud_populate(&init_mm, pud, pmd); |
| 234 | } |
| 235 | |
| 236 | pmd = pmd_offset(pud, dst_addr); |
| 237 | if (pmd_none(*pmd)) { |
| 238 | pte = allocator(mask); |
| 239 | if (!pte) { |
| 240 | rc = -ENOMEM; |
| 241 | goto out; |
| 242 | } |
| 243 | pmd_populate_kernel(&init_mm, pmd, pte); |
| 244 | } |
| 245 | |
| 246 | pte = pte_offset_kernel(pmd, dst_addr); |
| 247 | set_pte(pte, __pte(virt_to_phys((void *)dst) | |
| 248 | pgprot_val(PAGE_KERNEL_EXEC))); |
| 249 | |
Mark Rutland | 0194e76 | 2016-08-11 14:11:05 +0100 | [diff] [blame] | 250 | /* |
| 251 | * Load our new page tables. A strict BBM approach requires that we |
| 252 | * ensure that TLBs are free of any entries that may overlap with the |
| 253 | * global mappings we are about to install. |
| 254 | * |
| 255 | * For a real hibernate/resume cycle TTBR0 currently points to a zero |
| 256 | * page, but TLBs may contain stale ASID-tagged entries (e.g. for EFI |
| 257 | * runtime services), while for a userspace-driven test_resume cycle it |
| 258 | * points to userspace page tables (and we must point it at a zero page |
| 259 | * ourselves). Elsewhere we only (un)install the idmap with preemption |
| 260 | * disabled, so T0SZ should be as required regardless. |
| 261 | */ |
| 262 | cpu_set_reserved_ttbr0(); |
| 263 | local_flush_tlb_all(); |
| 264 | write_sysreg(virt_to_phys(pgd), ttbr0_el1); |
| 265 | isb(); |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 266 | |
| 267 | *phys_dst_addr = virt_to_phys((void *)dst); |
| 268 | |
| 269 | out: |
| 270 | return rc; |
| 271 | } |
| 272 | |
James Morse | 5ebe3a4 | 2016-08-24 18:27:30 +0100 | [diff] [blame] | 273 | #define dcache_clean_range(start, end) __flush_dcache_area(start, (end - start)) |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 274 | |
| 275 | int swsusp_arch_suspend(void) |
| 276 | { |
| 277 | int ret = 0; |
| 278 | unsigned long flags; |
| 279 | struct sleep_stack_data state; |
| 280 | |
James Morse | d74b4e4 | 2016-06-22 10:06:13 +0100 | [diff] [blame] | 281 | if (cpus_are_stuck_in_kernel()) { |
| 282 | pr_err("Can't hibernate: no mechanism to offline secondary CPUs.\n"); |
| 283 | return -EBUSY; |
| 284 | } |
| 285 | |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 286 | local_dbg_save(flags); |
| 287 | |
| 288 | if (__cpu_suspend_enter(&state)) { |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 289 | sleep_cpu = smp_processor_id(); |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 290 | ret = swsusp_save(); |
| 291 | } else { |
James Morse | 5ebe3a4 | 2016-08-24 18:27:30 +0100 | [diff] [blame] | 292 | /* Clean kernel core startup/idle code to PoC*/ |
| 293 | dcache_clean_range(__mmuoff_data_start, __mmuoff_data_end); |
| 294 | dcache_clean_range(__idmap_text_start, __idmap_text_end); |
| 295 | |
| 296 | /* Clean kvm setup code to PoC? */ |
| 297 | if (el2_reset_needed()) |
| 298 | dcache_clean_range(__hyp_idmap_text_start, __hyp_idmap_text_end); |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 299 | |
| 300 | /* |
| 301 | * Tell the hibernation core that we've just restored |
| 302 | * the memory |
| 303 | */ |
| 304 | in_suspend = 0; |
| 305 | |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 306 | sleep_cpu = -EINVAL; |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 307 | __cpu_suspend_exit(); |
| 308 | } |
| 309 | |
| 310 | local_dbg_restore(flags); |
| 311 | |
| 312 | return ret; |
| 313 | } |
| 314 | |
James Morse | 5ebe3a4 | 2016-08-24 18:27:30 +0100 | [diff] [blame] | 315 | static void _copy_pte(pte_t *dst_pte, pte_t *src_pte, unsigned long addr) |
| 316 | { |
| 317 | pte_t pte = *src_pte; |
| 318 | |
| 319 | if (pte_valid(pte)) { |
| 320 | /* |
| 321 | * Resume will overwrite areas that may be marked |
| 322 | * read only (code, rodata). Clear the RDONLY bit from |
| 323 | * the temporary mappings we use during restore. |
| 324 | */ |
| 325 | set_pte(dst_pte, pte_clear_rdonly(pte)); |
| 326 | } else if (debug_pagealloc_enabled() && !pte_none(pte)) { |
| 327 | /* |
| 328 | * debug_pagealloc will removed the PTE_VALID bit if |
| 329 | * the page isn't in use by the resume kernel. It may have |
| 330 | * been in use by the original kernel, in which case we need |
| 331 | * to put it back in our copy to do the restore. |
| 332 | * |
| 333 | * Before marking this entry valid, check the pfn should |
| 334 | * be mapped. |
| 335 | */ |
| 336 | BUG_ON(!pfn_valid(pte_pfn(pte))); |
| 337 | |
| 338 | set_pte(dst_pte, pte_mkpresent(pte_clear_rdonly(pte))); |
| 339 | } |
| 340 | } |
| 341 | |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 342 | static int copy_pte(pmd_t *dst_pmd, pmd_t *src_pmd, unsigned long start, |
| 343 | unsigned long end) |
| 344 | { |
| 345 | pte_t *src_pte; |
| 346 | pte_t *dst_pte; |
| 347 | unsigned long addr = start; |
| 348 | |
| 349 | dst_pte = (pte_t *)get_safe_page(GFP_ATOMIC); |
| 350 | if (!dst_pte) |
| 351 | return -ENOMEM; |
| 352 | pmd_populate_kernel(&init_mm, dst_pmd, dst_pte); |
| 353 | dst_pte = pte_offset_kernel(dst_pmd, start); |
| 354 | |
| 355 | src_pte = pte_offset_kernel(src_pmd, start); |
| 356 | do { |
James Morse | 5ebe3a4 | 2016-08-24 18:27:30 +0100 | [diff] [blame] | 357 | _copy_pte(dst_pte, src_pte, addr); |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 358 | } while (dst_pte++, src_pte++, addr += PAGE_SIZE, addr != end); |
| 359 | |
| 360 | return 0; |
| 361 | } |
| 362 | |
| 363 | static int copy_pmd(pud_t *dst_pud, pud_t *src_pud, unsigned long start, |
| 364 | unsigned long end) |
| 365 | { |
| 366 | pmd_t *src_pmd; |
| 367 | pmd_t *dst_pmd; |
| 368 | unsigned long next; |
| 369 | unsigned long addr = start; |
| 370 | |
| 371 | if (pud_none(*dst_pud)) { |
| 372 | dst_pmd = (pmd_t *)get_safe_page(GFP_ATOMIC); |
| 373 | if (!dst_pmd) |
| 374 | return -ENOMEM; |
| 375 | pud_populate(&init_mm, dst_pud, dst_pmd); |
| 376 | } |
| 377 | dst_pmd = pmd_offset(dst_pud, start); |
| 378 | |
| 379 | src_pmd = pmd_offset(src_pud, start); |
| 380 | do { |
| 381 | next = pmd_addr_end(addr, end); |
| 382 | if (pmd_none(*src_pmd)) |
| 383 | continue; |
| 384 | if (pmd_table(*src_pmd)) { |
| 385 | if (copy_pte(dst_pmd, src_pmd, addr, next)) |
| 386 | return -ENOMEM; |
| 387 | } else { |
| 388 | set_pmd(dst_pmd, |
| 389 | __pmd(pmd_val(*src_pmd) & ~PMD_SECT_RDONLY)); |
| 390 | } |
| 391 | } while (dst_pmd++, src_pmd++, addr = next, addr != end); |
| 392 | |
| 393 | return 0; |
| 394 | } |
| 395 | |
| 396 | static int copy_pud(pgd_t *dst_pgd, pgd_t *src_pgd, unsigned long start, |
| 397 | unsigned long end) |
| 398 | { |
| 399 | pud_t *dst_pud; |
| 400 | pud_t *src_pud; |
| 401 | unsigned long next; |
| 402 | unsigned long addr = start; |
| 403 | |
| 404 | if (pgd_none(*dst_pgd)) { |
| 405 | dst_pud = (pud_t *)get_safe_page(GFP_ATOMIC); |
| 406 | if (!dst_pud) |
| 407 | return -ENOMEM; |
| 408 | pgd_populate(&init_mm, dst_pgd, dst_pud); |
| 409 | } |
| 410 | dst_pud = pud_offset(dst_pgd, start); |
| 411 | |
| 412 | src_pud = pud_offset(src_pgd, start); |
| 413 | do { |
| 414 | next = pud_addr_end(addr, end); |
| 415 | if (pud_none(*src_pud)) |
| 416 | continue; |
| 417 | if (pud_table(*(src_pud))) { |
| 418 | if (copy_pmd(dst_pud, src_pud, addr, next)) |
| 419 | return -ENOMEM; |
| 420 | } else { |
| 421 | set_pud(dst_pud, |
| 422 | __pud(pud_val(*src_pud) & ~PMD_SECT_RDONLY)); |
| 423 | } |
| 424 | } while (dst_pud++, src_pud++, addr = next, addr != end); |
| 425 | |
| 426 | return 0; |
| 427 | } |
| 428 | |
| 429 | static int copy_page_tables(pgd_t *dst_pgd, unsigned long start, |
| 430 | unsigned long end) |
| 431 | { |
| 432 | unsigned long next; |
| 433 | unsigned long addr = start; |
| 434 | pgd_t *src_pgd = pgd_offset_k(start); |
| 435 | |
| 436 | dst_pgd = pgd_offset_raw(dst_pgd, start); |
| 437 | do { |
| 438 | next = pgd_addr_end(addr, end); |
| 439 | if (pgd_none(*src_pgd)) |
| 440 | continue; |
| 441 | if (copy_pud(dst_pgd, src_pgd, addr, next)) |
| 442 | return -ENOMEM; |
| 443 | } while (dst_pgd++, src_pgd++, addr = next, addr != end); |
| 444 | |
| 445 | return 0; |
| 446 | } |
| 447 | |
| 448 | /* |
| 449 | * Setup then Resume from the hibernate image using swsusp_arch_suspend_exit(). |
| 450 | * |
| 451 | * Memory allocated by get_safe_page() will be dealt with by the hibernate code, |
| 452 | * we don't need to free it here. |
| 453 | */ |
| 454 | int swsusp_arch_resume(void) |
| 455 | { |
| 456 | int rc = 0; |
| 457 | void *zero_page; |
| 458 | size_t exit_size; |
| 459 | pgd_t *tmp_pg_dir; |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 460 | phys_addr_t phys_hibernate_exit; |
| 461 | void __noreturn (*hibernate_exit)(phys_addr_t, phys_addr_t, void *, |
| 462 | void *, phys_addr_t, phys_addr_t); |
| 463 | |
| 464 | /* |
Mark Rutland | dfbca61 | 2016-08-11 14:11:06 +0100 | [diff] [blame] | 465 | * Restoring the memory image will overwrite the ttbr1 page tables. |
| 466 | * Create a second copy of just the linear map, and use this when |
| 467 | * restoring. |
| 468 | */ |
| 469 | tmp_pg_dir = (pgd_t *)get_safe_page(GFP_ATOMIC); |
| 470 | if (!tmp_pg_dir) { |
| 471 | pr_err("Failed to allocate memory for temporary page tables."); |
| 472 | rc = -ENOMEM; |
| 473 | goto out; |
| 474 | } |
| 475 | rc = copy_page_tables(tmp_pg_dir, PAGE_OFFSET, 0); |
| 476 | if (rc) |
| 477 | goto out; |
| 478 | |
| 479 | /* |
Mark Rutland | dfbca61 | 2016-08-11 14:11:06 +0100 | [diff] [blame] | 480 | * We need a zero page that is zero before & after resume in order to |
| 481 | * to break before make on the ttbr1 page tables. |
| 482 | */ |
| 483 | zero_page = (void *)get_safe_page(GFP_ATOMIC); |
| 484 | if (!zero_page) { |
| 485 | pr_err("Failed to allocate zero page."); |
| 486 | rc = -ENOMEM; |
| 487 | goto out; |
| 488 | } |
| 489 | |
| 490 | /* |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 491 | * Locate the exit code in the bottom-but-one page, so that *NULL |
| 492 | * still has disastrous affects. |
| 493 | */ |
| 494 | hibernate_exit = (void *)PAGE_SIZE; |
| 495 | exit_size = __hibernate_exit_text_end - __hibernate_exit_text_start; |
| 496 | /* |
| 497 | * Copy swsusp_arch_suspend_exit() to a safe page. This will generate |
| 498 | * a new set of ttbr0 page tables and load them. |
| 499 | */ |
| 500 | rc = create_safe_exec_page(__hibernate_exit_text_start, exit_size, |
| 501 | (unsigned long)hibernate_exit, |
| 502 | &phys_hibernate_exit, |
| 503 | (void *)get_safe_page, GFP_ATOMIC); |
| 504 | if (rc) { |
| 505 | pr_err("Failed to create safe executable page for hibernate_exit code."); |
| 506 | goto out; |
| 507 | } |
| 508 | |
| 509 | /* |
| 510 | * The hibernate exit text contains a set of el2 vectors, that will |
| 511 | * be executed at el2 with the mmu off in order to reload hyp-stub. |
| 512 | */ |
| 513 | __flush_dcache_area(hibernate_exit, exit_size); |
| 514 | |
| 515 | /* |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 516 | * KASLR will cause the el2 vectors to be in a different location in |
| 517 | * the resumed kernel. Load hibernate's temporary copy into el2. |
| 518 | * |
| 519 | * We can skip this step if we booted at EL1, or are running with VHE. |
| 520 | */ |
| 521 | if (el2_reset_needed()) { |
| 522 | phys_addr_t el2_vectors = phys_hibernate_exit; /* base */ |
| 523 | el2_vectors += hibernate_el2_vectors - |
| 524 | __hibernate_exit_text_start; /* offset */ |
| 525 | |
| 526 | __hyp_set_vectors(el2_vectors); |
| 527 | } |
| 528 | |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 529 | hibernate_exit(virt_to_phys(tmp_pg_dir), resume_hdr.ttbr1_el1, |
Laura Abbott | 4b3b108 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 530 | resume_hdr.reenter_kernel, restore_pblist, |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 531 | resume_hdr.__hyp_stub_vectors, virt_to_phys(zero_page)); |
| 532 | |
| 533 | out: |
| 534 | return rc; |
| 535 | } |
James Morse | 1fe492c | 2016-04-27 17:47:13 +0100 | [diff] [blame] | 536 | |
James Morse | 8ec058f | 2016-08-17 13:50:26 +0100 | [diff] [blame] | 537 | int hibernate_resume_nonboot_cpu_disable(void) |
| 538 | { |
| 539 | if (sleep_cpu < 0) { |
| 540 | pr_err("Failing to resume from hibernate on an unkown CPU.\n"); |
| 541 | return -ENODEV; |
| 542 | } |
| 543 | |
| 544 | return freeze_secondary_cpus(sleep_cpu); |
| 545 | } |