Blame - arch/arm/kernel/head-nommu.S - SHIFTPHONES/android_kernel_shift_sdm845

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Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	1	/*
				2	* linux/arch/arm/kernel/head-nommu.S
				3	*
				4	* Copyright (C) 1994-2002 Russell King
				5	* Copyright (C) 2003-2006 Hyok S. Choi
				6	*
				7	* This program is free software; you can redistribute it and/or modify
				8	* it under the terms of the GNU General Public License version 2 as
				9	* published by the Free Software Foundation.
				10	*
				11	* Common kernel startup code (non-paged MM)
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	12	*
				13	*/
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	14	#include <linux/linkage.h>
				15	#include <linux/init.h>
				16
				17	#include <asm/assembler.h>
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	18	#include <asm/ptrace.h>
Uwe Zeisberger	2eb9d31	2006-05-05 15:11:14 +0100	[diff] [blame]	19	#include <asm/asm-offsets.h>
Russell King	15d07dc	2012-03-28 18:30:01 +0100	[diff] [blame]	20	#include <asm/cp15.h>
Hyok S. Choi	3b920ce	2006-04-24 09:45:35 +0100	[diff] [blame]	21	#include <asm/thread_info.h>
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	22
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	23	/*
				24	* Kernel startup entry point.
				25	* ---------------------------
				26	*
				27	* This is normally called from the decompressor code. The requirements
				28	* are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
				29	* r1 = machine nr.
				30	*
				31	* See linux/arch/arm/tools/mach-types for the complete list of machine
				32	* numbers for r1.
				33	*
				34	*/
Dave Martin	540b573	2011-07-13 15:53:30 +0100	[diff] [blame]	35
Tim Abbott	2abc1c5	2009-10-02 16:32:46 -0400	[diff] [blame]	36	__HEAD
Uwe Kleine-König	bc7dea0	2011-12-09 20:52:10 +0100	[diff] [blame^]	37
				38	#ifdef CONFIG_CPU_THUMBONLY
				39	.thumb
				40	ENTRY(stext)
				41	#else
				42	.arm
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	43	ENTRY(stext)
Dave Martin	540b573	2011-07-13 15:53:30 +0100	[diff] [blame]	44
				45	THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM.
				46	THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
				47	THUMB( .thumb ) @ switch to Thumb now.
				48	THUMB(1: )
Uwe Kleine-König	bc7dea0	2011-12-09 20:52:10 +0100	[diff] [blame^]	49	#endif
Dave Martin	540b573	2011-07-13 15:53:30 +0100	[diff] [blame]	50
Catalin Marinas	b86040a	2009-07-24 12:32:54 +0100	[diff] [blame]	51	setmode PSR_F_BIT \| PSR_I_BIT \| SVC_MODE, r9 @ ensure svc mode
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	52	@ and irqs disabled
Hyok S. Choi	f12d0d7	2006-09-26 17:36:37 +0900	[diff] [blame]	53	#ifndef CONFIG_CPU_CP15
				54	ldr r9, =CONFIG_PROCESSOR_ID
				55	#else
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	56	mrc p15, 0, r9, c0, c0 @ get processor id
Hyok S. Choi	f12d0d7	2006-09-26 17:36:37 +0900	[diff] [blame]	57	#endif
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	58	bl __lookup_processor_type @ r5=procinfo r9=cpuid
				59	movs r10, r5 @ invalid processor (r5=0)?
				60	beq __error_p @ yes, error 'p'
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	61
Catalin Marinas	b86040a	2009-07-24 12:32:54 +0100	[diff] [blame]	62	adr lr, BSYM(__after_proc_init) @ return (PIC) address
				63	ARM( add pc, r10, #PROCINFO_INITFUNC )
				64	THUMB( add r12, r10, #PROCINFO_INITFUNC )
				65	THUMB( mov pc, r12 )
Catalin Marinas	93ed397	2008-08-28 11:22:32 +0100	[diff] [blame]	66	ENDPROC(stext)
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	67
				68	/*
				69	* Set the Control Register and Read the process ID.
				70	*/
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	71	__after_proc_init:
Hyok S. Choi	f12d0d7	2006-09-26 17:36:37 +0900	[diff] [blame]	72	#ifdef CONFIG_CPU_CP15
Catalin Marinas	05efde9	2009-07-24 12:34:59 +0100	[diff] [blame]	73	/*
				74	* CP15 system control register value returned in r0 from
				75	* the CPU init function.
				76	*/
Armando Visconti	76e0920	2012-12-04 10:34:39 +0100	[diff] [blame]	77	#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	78	orr r0, r0, #CR_A
				79	#else
				80	bic r0, r0, #CR_A
				81	#endif
				82	#ifdef CONFIG_CPU_DCACHE_DISABLE
				83	bic r0, r0, #CR_C
				84	#endif
				85	#ifdef CONFIG_CPU_BPREDICT_DISABLE
				86	bic r0, r0, #CR_Z
				87	#endif
				88	#ifdef CONFIG_CPU_ICACHE_DISABLE
				89	bic r0, r0, #CR_I
				90	#endif
Hyok S. Choi	6afd6fa	2006-09-28 21:46:34 +0900	[diff] [blame]	91	#ifdef CONFIG_CPU_HIGH_VECTOR
				92	orr r0, r0, #CR_V
				93	#else
				94	bic r0, r0, #CR_V
				95	#endif
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	96	mcr p15, 0, r0, c1, c0, 0 @ write control reg
Hyok S. Choi	f12d0d7	2006-09-26 17:36:37 +0900	[diff] [blame]	97	#endif /* CONFIG_CPU_CP15 */
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	98
Russell King	f131a08	2010-10-01 15:42:02 +0100	[diff] [blame]	99	b __mmap_switched @ clear the BSS and jump
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	100	@ to start_kernel
Catalin Marinas	93ed397	2008-08-28 11:22:32 +0100	[diff] [blame]	101	ENDPROC(__after_proc_init)
Hyok S. Choi	3b920ce	2006-04-24 09:45:35 +0100	[diff] [blame]	102	.ltorg
Hyok S. Choi	75d9083	2006-03-27 14:58:25 +0100	[diff] [blame]	103
				104	#include "head-common.S"