Russell King | bce495d | 2005-04-26 15:21:02 +0100 | [diff] [blame] | 1 | #include <linux/init.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | #include <linux/linkage.h> |
| 3 | |
| 4 | #include <asm/assembler.h> |
Sam Ravnborg | e6ae744 | 2005-09-09 21:08:59 +0200 | [diff] [blame] | 5 | #include <asm/asm-offsets.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | #include <asm/errno.h> |
Russell King | bce495d | 2005-04-26 15:21:02 +0100 | [diff] [blame] | 7 | #include <asm/thread_info.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | |
| 9 | @ Bad Abort numbers |
| 10 | @ ----------------- |
| 11 | @ |
| 12 | #define BAD_PREFETCH 0 |
| 13 | #define BAD_DATA 1 |
| 14 | #define BAD_ADDREXCPTN 2 |
| 15 | #define BAD_IRQ 3 |
| 16 | #define BAD_UNDEFINSTR 4 |
| 17 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | @ |
Russell King | 925c8a1 | 2005-04-26 15:18:59 +0100 | [diff] [blame] | 19 | @ Most of the stack format comes from struct pt_regs, but with |
| 20 | @ the addition of 8 bytes for storing syscall args 5 and 6. |
Nicolas Pitre | 2dede2d | 2006-01-14 16:18:08 +0000 | [diff] [blame] | 21 | @ This _must_ remain a multiple of 8 for EABI. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | @ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | #define S_OFF 8 |
| 24 | |
Russell King | 925c8a1 | 2005-04-26 15:18:59 +0100 | [diff] [blame] | 25 | /* |
| 26 | * The SWI code relies on the fact that R0 is at the bottom of the stack |
| 27 | * (due to slow/fast restore user regs). |
| 28 | */ |
| 29 | #if S_R0 != 0 |
| 30 | #error "Please fix" |
| 31 | #endif |
| 32 | |
Russell King | bce495d | 2005-04-26 15:21:02 +0100 | [diff] [blame] | 33 | .macro zero_fp |
| 34 | #ifdef CONFIG_FRAME_POINTER |
| 35 | mov fp, #0 |
| 36 | #endif |
| 37 | .endm |
| 38 | |
Russell King | 49f680e | 2005-05-31 18:02:00 +0100 | [diff] [blame] | 39 | .macro alignment_trap, rtemp |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | #ifdef CONFIG_ALIGNMENT_TRAP |
Russell King | 49f680e | 2005-05-31 18:02:00 +0100 | [diff] [blame] | 41 | ldr \rtemp, .LCcralign |
| 42 | ldr \rtemp, [\rtemp] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | mcr p15, 0, \rtemp, c1, c0 |
| 44 | #endif |
| 45 | .endm |
| 46 | |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 47 | @ |
| 48 | @ Store/load the USER SP and LR registers by switching to the SYS |
| 49 | @ mode. Useful in Thumb-2 mode where "stm/ldm rd, {sp, lr}^" is not |
| 50 | @ available. Should only be called from SVC mode |
| 51 | @ |
| 52 | .macro store_user_sp_lr, rd, rtemp, offset = 0 |
| 53 | mrs \rtemp, cpsr |
| 54 | eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE) |
| 55 | msr cpsr_c, \rtemp @ switch to the SYS mode |
| 56 | |
| 57 | str sp, [\rd, #\offset] @ save sp_usr |
| 58 | str lr, [\rd, #\offset + 4] @ save lr_usr |
| 59 | |
| 60 | eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE) |
| 61 | msr cpsr_c, \rtemp @ switch back to the SVC mode |
| 62 | .endm |
| 63 | |
| 64 | .macro load_user_sp_lr, rd, rtemp, offset = 0 |
| 65 | mrs \rtemp, cpsr |
| 66 | eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE) |
| 67 | msr cpsr_c, \rtemp @ switch to the SYS mode |
| 68 | |
| 69 | ldr sp, [\rd, #\offset] @ load sp_usr |
| 70 | ldr lr, [\rd, #\offset + 4] @ load lr_usr |
| 71 | |
| 72 | eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE) |
| 73 | msr cpsr_c, \rtemp @ switch back to the SVC mode |
| 74 | .endm |
| 75 | |
| 76 | #ifndef CONFIG_THUMB2_KERNEL |
| 77 | .macro svc_exit, rpsr |
| 78 | msr spsr_cxsf, \rpsr |
Russell King | 7db44c7 | 2011-01-17 15:35:37 +0000 | [diff] [blame] | 79 | #if defined(CONFIG_CPU_V6) |
Catalin Marinas | 200b812 | 2009-09-18 23:27:05 +0100 | [diff] [blame] | 80 | ldr r0, [sp] |
| 81 | strex r1, r2, [sp] @ clear the exclusive monitor |
| 82 | ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr |
Russell King | 7db44c7 | 2011-01-17 15:35:37 +0000 | [diff] [blame] | 83 | #elif defined(CONFIG_CPU_32v6K) |
| 84 | clrex @ clear the exclusive monitor |
| 85 | ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr |
Nicolas Pitre | 9e6ec39 | 2009-09-25 16:28:02 -0400 | [diff] [blame] | 86 | #else |
| 87 | ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr |
Catalin Marinas | 200b812 | 2009-09-18 23:27:05 +0100 | [diff] [blame] | 88 | #endif |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 89 | .endm |
| 90 | |
| 91 | .macro restore_user_regs, fast = 0, offset = 0 |
| 92 | ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr |
| 93 | ldr lr, [sp, #\offset + S_PC]! @ get pc |
| 94 | msr spsr_cxsf, r1 @ save in spsr_svc |
Russell King | 7db44c7 | 2011-01-17 15:35:37 +0000 | [diff] [blame] | 95 | #if defined(CONFIG_CPU_V6) |
Catalin Marinas | 200b812 | 2009-09-18 23:27:05 +0100 | [diff] [blame] | 96 | strex r1, r2, [sp] @ clear the exclusive monitor |
Russell King | 7db44c7 | 2011-01-17 15:35:37 +0000 | [diff] [blame] | 97 | #elif defined(CONFIG_CPU_32v6K) |
| 98 | clrex @ clear the exclusive monitor |
Catalin Marinas | 200b812 | 2009-09-18 23:27:05 +0100 | [diff] [blame] | 99 | #endif |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 100 | .if \fast |
| 101 | ldmdb sp, {r1 - lr}^ @ get calling r1 - lr |
| 102 | .else |
| 103 | ldmdb sp, {r0 - lr}^ @ get calling r0 - lr |
| 104 | .endif |
Anders Grafström | 8e4971f | 2010-03-15 16:04:14 +0100 | [diff] [blame] | 105 | mov r0, r0 @ ARMv5T and earlier require a nop |
| 106 | @ after ldm {}^ |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 107 | add sp, sp, #S_FRAME_SIZE - S_PC |
| 108 | movs pc, lr @ return & move spsr_svc into cpsr |
| 109 | .endm |
| 110 | |
| 111 | .macro get_thread_info, rd |
| 112 | mov \rd, sp, lsr #13 |
| 113 | mov \rd, \rd, lsl #13 |
| 114 | .endm |
Catalin Marinas | a771fe6 | 2009-10-12 17:31:20 +0100 | [diff] [blame] | 115 | |
| 116 | @ |
| 117 | @ 32-bit wide "mov pc, reg" |
| 118 | @ |
| 119 | .macro movw_pc, reg |
| 120 | mov pc, \reg |
| 121 | .endm |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 122 | #else /* CONFIG_THUMB2_KERNEL */ |
| 123 | .macro svc_exit, rpsr |
Jon Medhurst | 5948106 | 2011-03-18 17:32:44 +0000 | [diff] [blame] | 124 | ldr lr, [sp, #S_SP] @ top of the stack |
| 125 | ldrd r0, r1, [sp, #S_LR] @ calling lr and pc |
Catalin Marinas | 200b812 | 2009-09-18 23:27:05 +0100 | [diff] [blame] | 126 | clrex @ clear the exclusive monitor |
Jon Medhurst | 5948106 | 2011-03-18 17:32:44 +0000 | [diff] [blame] | 127 | stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 128 | ldmia sp, {r0 - r12} |
Jon Medhurst | 5948106 | 2011-03-18 17:32:44 +0000 | [diff] [blame] | 129 | mov sp, lr |
| 130 | ldr lr, [sp], #4 |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 131 | rfeia sp! |
| 132 | .endm |
| 133 | |
| 134 | .macro restore_user_regs, fast = 0, offset = 0 |
Catalin Marinas | 200b812 | 2009-09-18 23:27:05 +0100 | [diff] [blame] | 135 | clrex @ clear the exclusive monitor |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 136 | mov r2, sp |
| 137 | load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr |
| 138 | ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr |
| 139 | ldr lr, [sp, #\offset + S_PC] @ get pc |
| 140 | add sp, sp, #\offset + S_SP |
| 141 | msr spsr_cxsf, r1 @ save in spsr_svc |
| 142 | .if \fast |
| 143 | ldmdb sp, {r1 - r12} @ get calling r1 - r12 |
| 144 | .else |
| 145 | ldmdb sp, {r0 - r12} @ get calling r0 - r12 |
| 146 | .endif |
| 147 | add sp, sp, #S_FRAME_SIZE - S_SP |
| 148 | movs pc, lr @ return & move spsr_svc into cpsr |
| 149 | .endm |
| 150 | |
| 151 | .macro get_thread_info, rd |
| 152 | mov \rd, sp |
| 153 | lsr \rd, \rd, #13 |
| 154 | mov \rd, \rd, lsl #13 |
| 155 | .endm |
Catalin Marinas | a771fe6 | 2009-10-12 17:31:20 +0100 | [diff] [blame] | 156 | |
| 157 | @ |
| 158 | @ 32-bit wide "mov pc, reg" |
| 159 | @ |
| 160 | .macro movw_pc, reg |
| 161 | mov pc, \reg |
| 162 | nop |
| 163 | .endm |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 164 | #endif /* !CONFIG_THUMB2_KERNEL */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | |
| 166 | /* |
Kevin Hilman | b008848 | 2013-03-28 22:54:40 +0100 | [diff] [blame^] | 167 | * Context tracking subsystem. Used to instrument transitions |
| 168 | * between user and kernel mode. |
| 169 | */ |
| 170 | .macro ct_user_exit, save = 1 |
| 171 | #ifdef CONFIG_CONTEXT_TRACKING |
| 172 | .if \save |
| 173 | stmdb sp!, {r0-r3, ip, lr} |
| 174 | bl user_exit |
| 175 | ldmia sp!, {r0-r3, ip, lr} |
| 176 | .else |
| 177 | bl user_exit |
| 178 | .endif |
| 179 | #endif |
| 180 | .endm |
| 181 | |
| 182 | .macro ct_user_enter, save = 1 |
| 183 | #ifdef CONFIG_CONTEXT_TRACKING |
| 184 | .if \save |
| 185 | stmdb sp!, {r0-r3, ip, lr} |
| 186 | bl user_enter |
| 187 | ldmia sp!, {r0-r3, ip, lr} |
| 188 | .else |
| 189 | bl user_enter |
| 190 | .endif |
| 191 | #endif |
| 192 | .endm |
| 193 | |
| 194 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | * These are the registers used in the syscall handler, and allow us to |
| 196 | * have in theory up to 7 arguments to a function - r0 to r6. |
| 197 | * |
| 198 | * r7 is reserved for the system call number for thumb mode. |
| 199 | * |
| 200 | * Note that tbl == why is intentional. |
| 201 | * |
| 202 | * We must set at least "tsk" and "why" when calling ret_with_reschedule. |
| 203 | */ |
| 204 | scno .req r7 @ syscall number |
| 205 | tbl .req r8 @ syscall table pointer |
| 206 | why .req r8 @ Linux syscall (!= 0) |
| 207 | tsk .req r9 @ current thread_info |