blob: 4dbc9c9d641b0ff28a14b189101fb956d29cb48d [file] [log] [blame]
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -07001/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
Michael Ellerman7fe37302007-04-18 19:39:21 +100014#include <linux/msi.h>
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070015#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
Eric W. Biederman3a16d712006-10-04 02:16:37 -070021/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010022 * irq_set_chip - set the irq chip for an irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070023 * @irq: irq number
24 * @chip: pointer to irq chip description structure
25 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010026int irq_set_chip(unsigned int irq, struct irq_chip *chip)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070027{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070028 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +010029 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070030
Thomas Gleixner02725e72011-02-12 10:37:36 +010031 if (!desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070032 return -EINVAL;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070033
34 if (!chip)
35 chip = &no_irq_chip;
36
Thomas Gleixner6b8ff312010-10-01 12:58:38 +020037 desc->irq_data.chip = chip;
Thomas Gleixner02725e72011-02-12 10:37:36 +010038 irq_put_desc_unlock(desc, flags);
David Daneyd72274e2011-03-25 12:38:48 -070039 /*
40 * For !CONFIG_SPARSE_IRQ make the irq show up in
41 * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
42 * already marked, and this call is harmless.
43 */
44 irq_reserve_irq(irq);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070045 return 0;
46}
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010047EXPORT_SYMBOL(irq_set_chip);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070048
49/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010050 * irq_set_type - set the irq trigger type for an irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070051 * @irq: irq number
David Brownell0c5d1eb2008-10-01 14:46:18 -070052 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070053 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010054int irq_set_irq_type(unsigned int irq, unsigned int type)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070055{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070056 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +010057 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
Thomas Gleixner02725e72011-02-12 10:37:36 +010058 int ret = 0;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070059
Thomas Gleixner02725e72011-02-12 10:37:36 +010060 if (!desc)
61 return -EINVAL;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070062
David Brownellf2b662d2008-12-01 14:31:38 -080063 type &= IRQ_TYPE_SENSE_MASK;
Russell Kinga09b6592012-03-05 15:07:25 -080064 ret = __irq_set_trigger(desc, irq, type);
Thomas Gleixner02725e72011-02-12 10:37:36 +010065 irq_put_desc_busunlock(desc, flags);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070066 return ret;
67}
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010068EXPORT_SYMBOL(irq_set_irq_type);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070069
70/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010071 * irq_set_handler_data - set irq handler data for an irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070072 * @irq: Interrupt number
73 * @data: Pointer to interrupt specific data
74 *
75 * Set the hardware irq controller data for an irq
76 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010077int irq_set_handler_data(unsigned int irq, void *data)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070078{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070079 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +010080 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070081
Thomas Gleixner02725e72011-02-12 10:37:36 +010082 if (!desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070083 return -EINVAL;
Thomas Gleixner6b8ff312010-10-01 12:58:38 +020084 desc->irq_data.handler_data = data;
Thomas Gleixner02725e72011-02-12 10:37:36 +010085 irq_put_desc_unlock(desc, flags);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070086 return 0;
87}
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010088EXPORT_SYMBOL(irq_set_handler_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070089
90/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010091 * irq_set_msi_desc - set MSI descriptor data for an irq
Eric W. Biederman5b912c12007-01-28 12:52:03 -070092 * @irq: Interrupt number
Randy Dunlap472900b2007-02-16 01:28:25 -080093 * @entry: Pointer to MSI descriptor data
Eric W. Biederman5b912c12007-01-28 12:52:03 -070094 *
Liuweni24b26d42009-11-04 20:11:05 +080095 * Set the MSI descriptor entry for an irq
Eric W. Biederman5b912c12007-01-28 12:52:03 -070096 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010097int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
Eric W. Biederman5b912c12007-01-28 12:52:03 -070098{
Eric W. Biederman5b912c12007-01-28 12:52:03 -070099 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100100 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700101
Thomas Gleixner02725e72011-02-12 10:37:36 +0100102 if (!desc)
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700103 return -EINVAL;
Thomas Gleixner6b8ff312010-10-01 12:58:38 +0200104 desc->irq_data.msi_desc = entry;
Michael Ellerman7fe37302007-04-18 19:39:21 +1000105 if (entry)
106 entry->irq = irq;
Thomas Gleixner02725e72011-02-12 10:37:36 +0100107 irq_put_desc_unlock(desc, flags);
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700108 return 0;
109}
110
111/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +0100112 * irq_set_chip_data - set irq chip data for an irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700113 * @irq: Interrupt number
114 * @data: Pointer to chip specific data
115 *
116 * Set the hardware irq chip data for an irq
117 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +0100118int irq_set_chip_data(unsigned int irq, void *data)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700119{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700120 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100121 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700122
Thomas Gleixner02725e72011-02-12 10:37:36 +0100123 if (!desc)
Yinghai Lu7d94f7c2008-08-19 20:50:14 -0700124 return -EINVAL;
Thomas Gleixner6b8ff312010-10-01 12:58:38 +0200125 desc->irq_data.chip_data = data;
Thomas Gleixner02725e72011-02-12 10:37:36 +0100126 irq_put_desc_unlock(desc, flags);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700127 return 0;
128}
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +0100129EXPORT_SYMBOL(irq_set_chip_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700130
Thomas Gleixnerf303a6d2010-09-28 17:34:01 +0200131struct irq_data *irq_get_irq_data(unsigned int irq)
132{
133 struct irq_desc *desc = irq_to_desc(irq);
134
135 return desc ? &desc->irq_data : NULL;
136}
137EXPORT_SYMBOL_GPL(irq_get_irq_data);
138
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100139static void irq_state_clr_disabled(struct irq_desc *desc)
140{
Thomas Gleixner801a0e92011-03-27 11:02:49 +0200141 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100142}
143
144static void irq_state_set_disabled(struct irq_desc *desc)
145{
Thomas Gleixner801a0e92011-03-27 11:02:49 +0200146 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100147}
148
Thomas Gleixner6e402622011-02-08 12:36:06 +0100149static void irq_state_clr_masked(struct irq_desc *desc)
150{
Thomas Gleixner32f41252011-03-28 14:10:52 +0200151 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100152}
153
154static void irq_state_set_masked(struct irq_desc *desc)
155{
Thomas Gleixner32f41252011-03-28 14:10:52 +0200156 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100157}
158
Thomas Gleixner46999232011-02-02 21:41:14 +0000159int irq_startup(struct irq_desc *desc)
160{
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100161 irq_state_clr_disabled(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000162 desc->depth = 0;
163
Thomas Gleixner3aae9942011-02-04 10:17:52 +0100164 if (desc->irq_data.chip->irq_startup) {
165 int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100166 irq_state_clr_masked(desc);
Thomas Gleixner3aae9942011-02-04 10:17:52 +0100167 return ret;
168 }
Thomas Gleixner46999232011-02-02 21:41:14 +0000169
Thomas Gleixner87923472011-02-03 12:27:44 +0100170 irq_enable(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000171 return 0;
172}
173
174void irq_shutdown(struct irq_desc *desc)
175{
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100176 irq_state_set_disabled(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000177 desc->depth = 1;
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100178 if (desc->irq_data.chip->irq_shutdown)
179 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
Geert Uytterhoevened585a62011-09-11 13:59:27 +0200180 else if (desc->irq_data.chip->irq_disable)
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100181 desc->irq_data.chip->irq_disable(&desc->irq_data);
182 else
183 desc->irq_data.chip->irq_mask(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100184 irq_state_set_masked(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000185}
186
Thomas Gleixner87923472011-02-03 12:27:44 +0100187void irq_enable(struct irq_desc *desc)
188{
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100189 irq_state_clr_disabled(desc);
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100190 if (desc->irq_data.chip->irq_enable)
191 desc->irq_data.chip->irq_enable(&desc->irq_data);
192 else
193 desc->irq_data.chip->irq_unmask(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100194 irq_state_clr_masked(desc);
Thomas Gleixner87923472011-02-03 12:27:44 +0100195}
196
197void irq_disable(struct irq_desc *desc)
198{
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100199 irq_state_set_disabled(desc);
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100200 if (desc->irq_data.chip->irq_disable) {
201 desc->irq_data.chip->irq_disable(&desc->irq_data);
Thomas Gleixnera61d8252011-02-21 12:54:34 +0100202 irq_state_set_masked(desc);
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100203 }
Thomas Gleixner89d694b2008-02-18 18:25:17 +0100204}
205
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100206void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
207{
208 if (desc->irq_data.chip->irq_enable)
209 desc->irq_data.chip->irq_enable(&desc->irq_data);
210 else
211 desc->irq_data.chip->irq_unmask(&desc->irq_data);
212 cpumask_set_cpu(cpu, desc->percpu_enabled);
213}
214
215void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
216{
217 if (desc->irq_data.chip->irq_disable)
218 desc->irq_data.chip->irq_disable(&desc->irq_data);
219 else
220 desc->irq_data.chip->irq_mask(&desc->irq_data);
221 cpumask_clear_cpu(cpu, desc->percpu_enabled);
222}
223
Thomas Gleixner9205e312010-09-27 12:44:50 +0000224static inline void mask_ack_irq(struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700225{
Thomas Gleixner9205e312010-09-27 12:44:50 +0000226 if (desc->irq_data.chip->irq_mask_ack)
227 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700228 else {
Thomas Gleixnere2c0f8f2010-09-27 12:44:42 +0000229 desc->irq_data.chip->irq_mask(&desc->irq_data);
Thomas Gleixner22a49162010-09-27 12:44:47 +0000230 if (desc->irq_data.chip->irq_ack)
231 desc->irq_data.chip->irq_ack(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700232 }
Thomas Gleixner6e402622011-02-08 12:36:06 +0100233 irq_state_set_masked(desc);
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100234}
235
Thomas Gleixnerd4d5e082011-02-10 13:16:14 +0100236void mask_irq(struct irq_desc *desc)
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100237{
Thomas Gleixnere2c0f8f2010-09-27 12:44:42 +0000238 if (desc->irq_data.chip->irq_mask) {
239 desc->irq_data.chip->irq_mask(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100240 irq_state_set_masked(desc);
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100241 }
242}
243
Thomas Gleixnerd4d5e082011-02-10 13:16:14 +0100244void unmask_irq(struct irq_desc *desc)
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100245{
Thomas Gleixner0eda58b2010-09-27 12:44:44 +0000246 if (desc->irq_data.chip->irq_unmask) {
247 desc->irq_data.chip->irq_unmask(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100248 irq_state_clr_masked(desc);
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100249 }
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700250}
251
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200252/*
253 * handle_nested_irq - Handle a nested irq from a irq thread
254 * @irq: the interrupt number
255 *
256 * Handle interrupts which are nested into a threaded interrupt
257 * handler. The handler function is called inside the calling
258 * threads context.
259 */
260void handle_nested_irq(unsigned int irq)
261{
262 struct irq_desc *desc = irq_to_desc(irq);
263 struct irqaction *action;
264 irqreturn_t action_ret;
265
266 might_sleep();
267
Thomas Gleixner239007b2009-11-17 16:46:45 +0100268 raw_spin_lock_irq(&desc->lock);
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200269
270 kstat_incr_irqs_this_cpu(irq, desc);
271
272 action = desc->action;
Thomas Gleixner32f41252011-03-28 14:10:52 +0200273 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data)))
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200274 goto out_unlock;
275
Thomas Gleixner32f41252011-03-28 14:10:52 +0200276 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
Thomas Gleixner239007b2009-11-17 16:46:45 +0100277 raw_spin_unlock_irq(&desc->lock);
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200278
279 action_ret = action->thread_fn(action->irq, action->dev_id);
280 if (!noirqdebug)
281 note_interrupt(irq, desc, action_ret);
282
Thomas Gleixner239007b2009-11-17 16:46:45 +0100283 raw_spin_lock_irq(&desc->lock);
Thomas Gleixner32f41252011-03-28 14:10:52 +0200284 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200285
286out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100287 raw_spin_unlock_irq(&desc->lock);
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200288}
289EXPORT_SYMBOL_GPL(handle_nested_irq);
290
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100291static bool irq_check_poll(struct irq_desc *desc)
292{
Thomas Gleixner6954b752011-02-07 20:55:35 +0100293 if (!(desc->istate & IRQS_POLL_INPROGRESS))
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100294 return false;
295 return irq_wait_for_poll(desc);
296}
297
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700298/**
299 * handle_simple_irq - Simple and software-decoded IRQs.
300 * @irq: the interrupt number
301 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700302 *
303 * Simple interrupts are either sent from a demultiplexing interrupt
304 * handler or come from hardware, where no interrupt hardware control
305 * is necessary.
306 *
307 * Note: The caller is expected to handle the ack, clear, mask and
308 * unmask issues if necessary.
309 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800310void
David Howells7d12e782006-10-05 14:55:46 +0100311handle_simple_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700312{
Thomas Gleixner239007b2009-11-17 16:46:45 +0100313 raw_spin_lock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700314
Thomas Gleixner32f41252011-03-28 14:10:52 +0200315 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100316 if (!irq_check_poll(desc))
317 goto out_unlock;
318
Thomas Gleixner163ef302011-02-08 11:39:15 +0100319 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200320 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700321
Thomas Gleixner32f41252011-03-28 14:10:52 +0200322 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700323 goto out_unlock;
324
Thomas Gleixner107781e2011-02-07 01:21:02 +0100325 handle_irq_event(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700326
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700327out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100328 raw_spin_unlock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700329}
Jonathan Cameronedf76f82011-05-18 10:39:04 +0100330EXPORT_SYMBOL_GPL(handle_simple_irq);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700331
332/**
333 * handle_level_irq - Level type irq handler
334 * @irq: the interrupt number
335 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700336 *
337 * Level type interrupts are active as long as the hardware line has
338 * the active level. This may require to mask the interrupt and unmask
339 * it after the associated handler has acknowledged the device, so the
340 * interrupt line is back to inactive.
341 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800342void
David Howells7d12e782006-10-05 14:55:46 +0100343handle_level_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700344{
Thomas Gleixner239007b2009-11-17 16:46:45 +0100345 raw_spin_lock(&desc->lock);
Thomas Gleixner9205e312010-09-27 12:44:50 +0000346 mask_ack_irq(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700347
Thomas Gleixner32f41252011-03-28 14:10:52 +0200348 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100349 if (!irq_check_poll(desc))
350 goto out_unlock;
351
Thomas Gleixner163ef302011-02-08 11:39:15 +0100352 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200353 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700354
355 /*
356 * If its disabled or no action available
357 * keep it masked and get out of here
358 */
Thomas Gleixner32f41252011-03-28 14:10:52 +0200359 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
Ingo Molnar86998aa2006-09-19 11:14:34 +0200360 goto out_unlock;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700361
Thomas Gleixner15298662011-02-07 01:22:17 +0100362 handle_irq_event(desc);
Thomas Gleixnerb25c3402009-08-13 12:17:22 +0200363
Thomas Gleixner32f41252011-03-28 14:10:52 +0200364 if (!irqd_irq_disabled(&desc->irq_data) && !(desc->istate & IRQS_ONESHOT))
Thomas Gleixner0eda58b2010-09-27 12:44:44 +0000365 unmask_irq(desc);
Ingo Molnar86998aa2006-09-19 11:14:34 +0200366out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100367 raw_spin_unlock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700368}
Ingo Molnar14819ea2009-01-14 12:34:21 +0100369EXPORT_SYMBOL_GPL(handle_level_irq);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700370
Thomas Gleixner78129572011-02-10 15:14:20 +0100371#ifdef CONFIG_IRQ_PREFLOW_FASTEOI
372static inline void preflow_handler(struct irq_desc *desc)
373{
374 if (desc->preflow_handler)
375 desc->preflow_handler(&desc->irq_data);
376}
377#else
378static inline void preflow_handler(struct irq_desc *desc) { }
379#endif
380
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700381/**
Ingo Molnar47c2a3a2006-06-29 02:25:03 -0700382 * handle_fasteoi_irq - irq handler for transparent controllers
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700383 * @irq: the interrupt number
384 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700385 *
Ingo Molnar47c2a3a2006-06-29 02:25:03 -0700386 * Only a single callback will be issued to the chip: an ->eoi()
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700387 * call when the interrupt has been serviced. This enables support
388 * for modern forms of interrupt handlers, which handle the flow
389 * details in hardware, transparently.
390 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800391void
David Howells7d12e782006-10-05 14:55:46 +0100392handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700393{
Thomas Gleixner239007b2009-11-17 16:46:45 +0100394 raw_spin_lock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700395
Thomas Gleixner32f41252011-03-28 14:10:52 +0200396 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100397 if (!irq_check_poll(desc))
398 goto out;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700399
Thomas Gleixner163ef302011-02-08 11:39:15 +0100400 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200401 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700402
403 /*
404 * If its disabled or no action available
Ingo Molnar76d21602007-02-16 01:28:24 -0800405 * then mask it and get out of here:
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700406 */
Thomas Gleixner32f41252011-03-28 14:10:52 +0200407 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
Thomas Gleixner2a0d6fb2011-02-08 12:17:57 +0100408 desc->istate |= IRQS_PENDING;
Thomas Gleixnere2c0f8f2010-09-27 12:44:42 +0000409 mask_irq(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700410 goto out;
Benjamin Herrenschmidt98bb2442006-06-29 02:25:01 -0700411 }
Thomas Gleixnerc69e3752011-03-02 11:49:21 +0100412
413 if (desc->istate & IRQS_ONESHOT)
414 mask_irq(desc);
415
Thomas Gleixner78129572011-02-10 15:14:20 +0100416 preflow_handler(desc);
Thomas Gleixnera7ae4de2011-02-07 01:23:07 +0100417 handle_irq_event(desc);
Thomas Gleixner77694b42011-02-15 10:33:57 +0100418
419out_eoi:
Thomas Gleixner0c5c1552010-09-27 12:44:53 +0000420 desc->irq_data.chip->irq_eoi(&desc->irq_data);
Thomas Gleixner77694b42011-02-15 10:33:57 +0100421out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100422 raw_spin_unlock(&desc->lock);
Thomas Gleixner77694b42011-02-15 10:33:57 +0100423 return;
424out:
425 if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
426 goto out_eoi;
427 goto out_unlock;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700428}
429
430/**
431 * handle_edge_irq - edge type IRQ handler
432 * @irq: the interrupt number
433 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700434 *
435 * Interrupt occures on the falling and/or rising edge of a hardware
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300436 * signal. The occurrence is latched into the irq controller hardware
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700437 * and must be acked in order to be reenabled. After the ack another
438 * interrupt can happen on the same source even before the first one
Uwe Kleine-Königdfff0612010-02-12 21:58:11 +0100439 * is handled by the associated event handler. If this happens it
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700440 * might be necessary to disable (mask) the interrupt depending on the
441 * controller hardware. This requires to reenable the interrupt inside
442 * of the loop which handles the interrupts which have arrived while
443 * the handler was running. If all pending interrupts are handled, the
444 * loop is left.
445 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800446void
David Howells7d12e782006-10-05 14:55:46 +0100447handle_edge_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700448{
Thomas Gleixner239007b2009-11-17 16:46:45 +0100449 raw_spin_lock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700450
Thomas Gleixner163ef302011-02-08 11:39:15 +0100451 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700452 /*
453 * If we're currently running this IRQ, or its disabled,
454 * we shouldn't process the IRQ. Mark it pending, handle
455 * the necessary masking and go out
456 */
Thomas Gleixner32f41252011-03-28 14:10:52 +0200457 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
458 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100459 if (!irq_check_poll(desc)) {
Thomas Gleixner2a0d6fb2011-02-08 12:17:57 +0100460 desc->istate |= IRQS_PENDING;
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100461 mask_ack_irq(desc);
462 goto out_unlock;
463 }
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700464 }
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200465 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700466
467 /* Start handling the irq */
Thomas Gleixner22a49162010-09-27 12:44:47 +0000468 desc->irq_data.chip->irq_ack(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700469
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700470 do {
Thomas Gleixnera60a5dc2011-02-07 01:24:07 +0100471 if (unlikely(!desc->action)) {
Thomas Gleixnere2c0f8f2010-09-27 12:44:42 +0000472 mask_irq(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700473 goto out_unlock;
474 }
475
476 /*
477 * When another irq arrived while we were handling
478 * one, we could have masked the irq.
479 * Renable it, if it was not disabled in meantime.
480 */
Thomas Gleixner2a0d6fb2011-02-08 12:17:57 +0100481 if (unlikely(desc->istate & IRQS_PENDING)) {
Thomas Gleixner32f41252011-03-28 14:10:52 +0200482 if (!irqd_irq_disabled(&desc->irq_data) &&
483 irqd_irq_masked(&desc->irq_data))
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100484 unmask_irq(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700485 }
486
Thomas Gleixnera60a5dc2011-02-07 01:24:07 +0100487 handle_irq_event(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700488
Thomas Gleixner2a0d6fb2011-02-08 12:17:57 +0100489 } while ((desc->istate & IRQS_PENDING) &&
Thomas Gleixner32f41252011-03-28 14:10:52 +0200490 !irqd_irq_disabled(&desc->irq_data));
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700491
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700492out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100493 raw_spin_unlock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700494}
495
Thomas Gleixner0521c8f2011-03-28 16:13:24 +0200496#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
497/**
498 * handle_edge_eoi_irq - edge eoi type IRQ handler
499 * @irq: the interrupt number
500 * @desc: the interrupt description structure for this irq
501 *
502 * Similar as the above handle_edge_irq, but using eoi and w/o the
503 * mask/unmask logic.
504 */
505void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
506{
507 struct irq_chip *chip = irq_desc_get_chip(desc);
508
509 raw_spin_lock(&desc->lock);
510
511 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
512 /*
513 * If we're currently running this IRQ, or its disabled,
514 * we shouldn't process the IRQ. Mark it pending, handle
515 * the necessary masking and go out
516 */
517 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
518 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
519 if (!irq_check_poll(desc)) {
520 desc->istate |= IRQS_PENDING;
521 goto out_eoi;
522 }
523 }
524 kstat_incr_irqs_this_cpu(irq, desc);
525
526 do {
527 if (unlikely(!desc->action))
528 goto out_eoi;
529
530 handle_irq_event(desc);
531
532 } while ((desc->istate & IRQS_PENDING) &&
533 !irqd_irq_disabled(&desc->irq_data));
534
Stephen Rothwellac0e0442011-03-30 10:55:12 +1100535out_eoi:
Thomas Gleixner0521c8f2011-03-28 16:13:24 +0200536 chip->irq_eoi(&desc->irq_data);
537 raw_spin_unlock(&desc->lock);
538}
539#endif
540
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700541/**
Liuweni24b26d42009-11-04 20:11:05 +0800542 * handle_percpu_irq - Per CPU local irq handler
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700543 * @irq: the interrupt number
544 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700545 *
546 * Per CPU interrupts on SMP machines without locking requirements
547 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800548void
David Howells7d12e782006-10-05 14:55:46 +0100549handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700550{
Thomas Gleixner35e857c2011-02-10 12:20:23 +0100551 struct irq_chip *chip = irq_desc_get_chip(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700552
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200553 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700554
Thomas Gleixner849f0612011-02-07 01:25:41 +0100555 if (chip->irq_ack)
556 chip->irq_ack(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700557
Thomas Gleixner849f0612011-02-07 01:25:41 +0100558 handle_irq_event_percpu(desc, desc->action);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700559
Thomas Gleixner849f0612011-02-07 01:25:41 +0100560 if (chip->irq_eoi)
561 chip->irq_eoi(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700562}
563
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100564/**
565 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
566 * @irq: the interrupt number
567 * @desc: the interrupt description structure for this irq
568 *
569 * Per CPU interrupts on SMP machines without locking requirements. Same as
570 * handle_percpu_irq() above but with the following extras:
571 *
572 * action->percpu_dev_id is a pointer to percpu variables which
573 * contain the real device id for the cpu on which this handler is
574 * called
575 */
576void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc)
577{
578 struct irq_chip *chip = irq_desc_get_chip(desc);
579 struct irqaction *action = desc->action;
580 void *dev_id = __this_cpu_ptr(action->percpu_dev_id);
581 irqreturn_t res;
582
583 kstat_incr_irqs_this_cpu(irq, desc);
584
585 if (chip->irq_ack)
586 chip->irq_ack(&desc->irq_data);
587
588 trace_irq_handler_entry(irq, action);
589 res = action->handler(irq, dev_id);
590 trace_irq_handler_exit(irq, action, res);
591
592 if (chip->irq_eoi)
593 chip->irq_eoi(&desc->irq_data);
594}
595
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700596void
Thomas Gleixner3836ca02011-02-14 20:09:19 +0100597__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
Ingo Molnara460e742006-10-17 00:10:03 -0700598 const char *name)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700599{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700600 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100601 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700602
Thomas Gleixner02725e72011-02-12 10:37:36 +0100603 if (!desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700604 return;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700605
Thomas Gleixner091738a2011-02-14 20:16:43 +0100606 if (!handle) {
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700607 handle = handle_bad_irq;
Thomas Gleixner091738a2011-02-14 20:16:43 +0100608 } else {
609 if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
Thomas Gleixner02725e72011-02-12 10:37:36 +0100610 goto out;
Thomas Gleixnerf8b54732006-07-01 22:30:08 +0100611 }
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700612
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700613 /* Uninstall? */
614 if (handle == handle_bad_irq) {
Thomas Gleixner6b8ff312010-10-01 12:58:38 +0200615 if (desc->irq_data.chip != &no_irq_chip)
Thomas Gleixner9205e312010-09-27 12:44:50 +0000616 mask_ack_irq(desc);
Thomas Gleixner801a0e92011-03-27 11:02:49 +0200617 irq_state_set_disabled(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700618 desc->depth = 1;
619 }
620 desc->handle_irq = handle;
Ingo Molnara460e742006-10-17 00:10:03 -0700621 desc->name = name;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700622
623 if (handle != handle_bad_irq && is_chained) {
Thomas Gleixner1ccb4e62011-02-09 14:44:17 +0100624 irq_settings_set_noprobe(desc);
625 irq_settings_set_norequest(desc);
Paul Mundt7f1b1242011-04-07 06:01:44 +0900626 irq_settings_set_nothread(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000627 irq_startup(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700628 }
Thomas Gleixner02725e72011-02-12 10:37:36 +0100629out:
630 irq_put_desc_busunlock(desc, flags);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700631}
Thomas Gleixner3836ca02011-02-14 20:09:19 +0100632EXPORT_SYMBOL_GPL(__irq_set_handler);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700633
634void
Thomas Gleixner3836ca02011-02-14 20:09:19 +0100635irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
Ingo Molnara460e742006-10-17 00:10:03 -0700636 irq_flow_handler_t handle, const char *name)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700637{
Thomas Gleixner35e857c2011-02-10 12:20:23 +0100638 irq_set_chip(irq, chip);
Thomas Gleixner3836ca02011-02-14 20:09:19 +0100639 __irq_set_handler(irq, handle, 0, name);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700640}
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800641
Thomas Gleixner44247182010-09-28 10:40:18 +0200642void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800643{
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800644 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100645 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800646
Thomas Gleixner44247182010-09-28 10:40:18 +0200647 if (!desc)
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800648 return;
Thomas Gleixnera0056772011-02-08 17:11:03 +0100649 irq_settings_clr_and_set(desc, clr, set);
650
Thomas Gleixner876dbd42011-02-08 17:28:12 +0100651 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
Thomas Gleixnere1ef8242011-02-10 22:25:31 +0100652 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
Thomas Gleixnera0056772011-02-08 17:11:03 +0100653 if (irq_settings_has_no_balance_set(desc))
654 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
655 if (irq_settings_is_per_cpu(desc))
656 irqd_set(&desc->irq_data, IRQD_PER_CPU);
Thomas Gleixnere1ef8242011-02-10 22:25:31 +0100657 if (irq_settings_can_move_pcntxt(desc))
658 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
Thomas Gleixner0ef5ca12011-03-28 21:59:37 +0200659 if (irq_settings_is_level(desc))
660 irqd_set(&desc->irq_data, IRQD_LEVEL);
Thomas Gleixnera0056772011-02-08 17:11:03 +0100661
Thomas Gleixner876dbd42011-02-08 17:28:12 +0100662 irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
663
Thomas Gleixner02725e72011-02-12 10:37:36 +0100664 irq_put_desc_unlock(desc, flags);
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800665}
Jonathan Cameronedf76f82011-05-18 10:39:04 +0100666EXPORT_SYMBOL_GPL(irq_modify_status);
David Daney0fdb4b22011-03-25 12:38:49 -0700667
668/**
669 * irq_cpu_online - Invoke all irq_cpu_online functions.
670 *
671 * Iterate through all irqs and invoke the chip.irq_cpu_online()
672 * for each.
673 */
674void irq_cpu_online(void)
675{
676 struct irq_desc *desc;
677 struct irq_chip *chip;
678 unsigned long flags;
679 unsigned int irq;
680
681 for_each_active_irq(irq) {
682 desc = irq_to_desc(irq);
683 if (!desc)
684 continue;
685
686 raw_spin_lock_irqsave(&desc->lock, flags);
687
688 chip = irq_data_get_irq_chip(&desc->irq_data);
Thomas Gleixnerb3d42232011-03-27 16:05:36 +0200689 if (chip && chip->irq_cpu_online &&
690 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
Thomas Gleixner32f41252011-03-28 14:10:52 +0200691 !irqd_irq_disabled(&desc->irq_data)))
David Daney0fdb4b22011-03-25 12:38:49 -0700692 chip->irq_cpu_online(&desc->irq_data);
693
694 raw_spin_unlock_irqrestore(&desc->lock, flags);
695 }
696}
697
698/**
699 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
700 *
701 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
702 * for each.
703 */
704void irq_cpu_offline(void)
705{
706 struct irq_desc *desc;
707 struct irq_chip *chip;
708 unsigned long flags;
709 unsigned int irq;
710
711 for_each_active_irq(irq) {
712 desc = irq_to_desc(irq);
713 if (!desc)
714 continue;
715
716 raw_spin_lock_irqsave(&desc->lock, flags);
717
718 chip = irq_data_get_irq_chip(&desc->irq_data);
Thomas Gleixnerb3d42232011-03-27 16:05:36 +0200719 if (chip && chip->irq_cpu_offline &&
720 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
Thomas Gleixner32f41252011-03-28 14:10:52 +0200721 !irqd_irq_disabled(&desc->irq_data)))
David Daney0fdb4b22011-03-25 12:38:49 -0700722 chip->irq_cpu_offline(&desc->irq_data);
723
724 raw_spin_unlock_irqrestore(&desc->lock, flags);
725 }
726}