blob: 48cd30d8eb5ab167a91a8946e73c6da67c1785f2 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * stradis.c - stradis 4:2:2 mpeg decoder driver
3 *
4 * Stradis 4:2:2 MPEG-2 Decoder Driver
5 * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/delay.h>
24#include <linux/errno.h>
25#include <linux/fs.h>
26#include <linux/kernel.h>
27#include <linux/major.h>
28#include <linux/slab.h>
29#include <linux/mm.h>
30#include <linux/init.h>
31#include <linux/poll.h>
32#include <linux/pci.h>
33#include <linux/signal.h>
34#include <asm/io.h>
35#include <linux/ioport.h>
36#include <asm/pgtable.h>
37#include <asm/page.h>
38#include <linux/sched.h>
39#include <asm/types.h>
40#include <linux/types.h>
41#include <linux/interrupt.h>
42#include <asm/uaccess.h>
43#include <linux/vmalloc.h>
44#include <linux/videodev.h>
45
46#include "saa7146.h"
47#include "saa7146reg.h"
48#include "ibmmpeg2.h"
49#include "saa7121.h"
50#include "cs8420.h"
51
52#define DEBUG(x) /* debug driver */
53#undef IDEBUG /* debug irq handler */
54#undef MDEBUG /* debug memory management */
55
56#define SAA7146_MAX 6
57
58static struct saa7146 saa7146s[SAA7146_MAX];
59
60static int saa_num = 0; /* number of SAA7146s in use */
61
62static int video_nr = -1;
63module_param(video_nr, int, 0);
64MODULE_LICENSE("GPL");
65
66
67#define nDebNormal 0x00480000
68#define nDebNoInc 0x00480000
69#define nDebVideo 0xd0480000
70#define nDebAudio 0xd0400000
71#define nDebDMA 0x02c80000
72
73#define oDebNormal 0x13c80000
74#define oDebNoInc 0x13c80000
75#define oDebVideo 0xd1080000
76#define oDebAudio 0xd1080000
77#define oDebDMA 0x03080000
78
79#define NewCard (saa->boardcfg[3])
80#define ChipControl (saa->boardcfg[1])
81#define NTSCFirstActive (saa->boardcfg[4])
82#define PALFirstActive (saa->boardcfg[5])
83#define NTSCLastActive (saa->boardcfg[54])
84#define PALLastActive (saa->boardcfg[55])
85#define Have2MB (saa->boardcfg[18] & 0x40)
86#define HaveCS8420 (saa->boardcfg[18] & 0x04)
87#define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
88#define HaveCS3310 (saa->boardcfg[18] & 0x01)
89#define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
90#define HaveCS4341 (saa->boardcfg[40] == 2)
91#define SDIType (saa->boardcfg[27])
92#define CurrentMode (saa->boardcfg[2])
93
94#define debNormal (NewCard ? nDebNormal : oDebNormal)
95#define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
96#define debVideo (NewCard ? nDebVideo : oDebVideo)
97#define debAudio (NewCard ? nDebAudio : oDebAudio)
98#define debDMA (NewCard ? nDebDMA : oDebDMA)
99
100#ifdef USE_RESCUE_EEPROM_SDM275
101static unsigned char rescue_eeprom[64] = {
1020x00,0x01,0x04,0x13,0x26,0x0f,0x10,0x00,0x00,0x00,0x43,0x63,0x22,0x01,0x29,0x15,0x73,0x00,0x1f, 'd', 'e', 'c', 'x', 'l', 'd', 'v', 'a',0x02,0x00,0x01,0x00,0xcc,0xa4,0x63,0x09,0xe2,0x10,0x00,0x0a,0x00,0x02,0x02, 'd', 'e', 'c', 'x', 'l', 'a',0x00,0x00,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
103};
104#endif
105
106/* ----------------------------------------------------------------------- */
107/* Hardware I2C functions */
108static void I2CWipe(struct saa7146 *saa)
109{
110 int i;
111 /* set i2c to ~=100kHz, abort transfer, clear busy */
112 saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
113 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
114 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
115 /* wait for i2c registers to be programmed */
116 for (i = 0; i < 1000 &&
117 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
118 schedule();
119 saawrite(0x600, SAA7146_I2C_STATUS);
120 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
121 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
122 /* wait for i2c registers to be programmed */
123 for (i = 0; i < 1000 &&
124 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
125 schedule();
126 saawrite(0x600, SAA7146_I2C_STATUS);
127 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
128 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
129 /* wait for i2c registers to be programmed */
130 for (i = 0; i < 1000 &&
131 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
132 schedule();
133}
134
135/* read I2C */
136static int I2CRead(struct saa7146 *saa, unsigned char addr,
137 unsigned char subaddr, int dosub)
138{
139 int i;
140
141 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
142 I2CWipe(saa);
143 for (i = 0; i < 1000 &&
144 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
145 schedule();
146 if (i == 1000)
147 I2CWipe(saa);
148 if (dosub)
149 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
150 ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
151 else
152 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
153 0xf1, SAA7146_I2C_TRANSFER);
154 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
155 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
156 /* wait for i2c registers to be programmed */
157 for (i = 0; i < 1000 &&
158 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
159 schedule();
160 /* wait for valid data */
161 for (i = 0; i < 1000 &&
162 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
163 schedule();
164 if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
165 return -1;
166 if (i == 1000)
167 printk("i2c setup read timeout\n");
168 saawrite(0x41, SAA7146_I2C_TRANSFER);
169 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
170 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
171 /* wait for i2c registers to be programmed */
172 for (i = 0; i < 1000 &&
173 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
174 schedule();
175 /* wait for valid data */
176 for (i = 0; i < 1000 &&
177 (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
178 schedule();
179 if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
180 return -1;
181 if (i == 1000)
182 printk("i2c read timeout\n");
183 return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
184}
185
186/* set both to write both bytes, reset it to write only b1 */
187
188static int I2CWrite(struct saa7146 *saa, unsigned char addr, unsigned char b1,
189 unsigned char b2, int both)
190{
191 int i;
192 u32 data;
193
194 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
195 I2CWipe(saa);
196 for (i = 0; i < 1000 &&
197 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
198 schedule();
199 if (i == 1000)
200 I2CWipe(saa);
201 data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
202 if (both)
203 data |= ((b2 & 0xff) << 8) | 0xe5;
204 else
205 data |= 0xd1;
206 saawrite(data, SAA7146_I2C_TRANSFER);
207 saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
208 SAA7146_MC2);
209 return 0;
210}
211
212static void attach_inform(struct saa7146 *saa, int id)
213{
214 int i;
215
216 DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr, id));
217 if (id == 0xa0) { /* we have rev2 or later board, fill in info */
218 for (i = 0; i < 64; i++)
219 saa->boardcfg[i] = I2CRead(saa, 0xa0, i, 1);
220#ifdef USE_RESCUE_EEPROM_SDM275
221 if (saa->boardcfg[0] != 0) {
222 printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE BEEN IGNORED\n", saa->nr);
223 for (i = 0; i < 64; i++)
224 saa->boardcfg[i] = rescue_eeprom[i];
225 }
226#endif
227 printk("stradis%d: config =", saa->nr);
228 for (i = 0; i < 51; i++) {
229 printk(" %02x",saa->boardcfg[i]);
230 }
231 printk("\n");
232 }
233}
234
235static void I2CBusScan(struct saa7146 *saa)
236{
237 int i;
238 for (i = 0; i < 0xff; i += 2)
239 if ((I2CRead(saa, i, 0, 0)) >= 0)
240 attach_inform(saa, i);
241}
242
243static int debiwait_maxwait = 0;
244
245static int wait_for_debi_done(struct saa7146 *saa)
246{
247 int i;
248
249 /* wait for registers to be programmed */
250 for (i = 0; i < 100000 &&
251 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
252 saaread(SAA7146_MC2);
253 /* wait for transfer to complete */
254 for (i = 0; i < 500000 &&
255 (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
256 saaread(SAA7146_MC2);
257 if (i > debiwait_maxwait)
258 printk("wait-for-debi-done maxwait: %d\n",
259 debiwait_maxwait = i);
260
261 if (i == 500000)
262 return -1;
263 return 0;
264}
265
266static int debiwrite(struct saa7146 *saa, u32 config, int addr,
267 u32 val, int count)
268{
269 u32 cmd;
270 if (count <= 0 || count > 32764)
271 return -1;
272 if (wait_for_debi_done(saa) < 0)
273 return -1;
274 saawrite(config, SAA7146_DEBI_CONFIG);
275 if (count <= 4) /* immediate transfer */
276 saawrite(val, SAA7146_DEBI_AD);
277 else /* block transfer */
278 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
279 saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
280 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
281 SAA7146_MC2);
282 return 0;
283}
284
285static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
286{
287 u32 result = 0;
288
289 if (count > 32764 || count <= 0)
290 return 0;
291 if (wait_for_debi_done(saa) < 0)
292 return 0;
293 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
294 saawrite((count << 17) | 0x10000 | (addr & 0xffff),
295 SAA7146_DEBI_COMMAND);
296 saawrite(config, SAA7146_DEBI_CONFIG);
297 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
298 SAA7146_MC2);
299 if (count > 4) /* not an immediate transfer */
300 return count;
301 wait_for_debi_done(saa);
302 result = saaread(SAA7146_DEBI_AD);
303 if (count == 1)
304 result &= 0xff;
305 if (count == 2)
306 result &= 0xffff;
307 if (count == 3)
308 result &= 0xffffff;
309 return result;
310}
311
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312static void do_irq_send_data(struct saa7146 *saa)
313{
314 int split, audbytes, vidbytes;
315
316 saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
317 /* if special feature mode in effect, disable audio sending */
318 if (saa->playmode != VID_PLAY_NORMAL)
319 saa->audtail = saa->audhead = 0;
320 if (saa->audhead <= saa->audtail)
321 audbytes = saa->audtail - saa->audhead;
322 else
323 audbytes = 65536 - (saa->audhead - saa->audtail);
324 if (saa->vidhead <= saa->vidtail)
325 vidbytes = saa->vidtail - saa->vidhead;
326 else
327 vidbytes = 524288 - (saa->vidhead - saa->vidtail);
328 if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
329 saawrite(0, SAA7146_IER);
330 return;
331 }
332 /* if at least 1 block audio waiting and audio fifo isn't full */
333 if (audbytes >= 2048 && (debiread(saa, debNormal,
334 IBM_MP2_AUD_FIFO, 2) & 0xff) < 60) {
335 if (saa->audhead > saa->audtail)
336 split = 65536 - saa->audhead;
337 else
338 split = 0;
339 audbytes = 2048;
340 if (split > 0 && split < 2048) {
341 memcpy(saa->dmadebi, saa->audbuf + saa->audhead,
342 split);
343 saa->audhead = 0;
344 audbytes -= split;
345 } else
346 split = 0;
347 memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
348 audbytes);
349 saa->audhead += audbytes;
350 saa->audhead &= 0xffff;
351 debiwrite(saa, debAudio, (NewCard? IBM_MP2_AUD_FIFO :
352 IBM_MP2_AUD_FIFOW), 0, 2048);
353 wake_up_interruptible(&saa->audq);
354 /* if at least 1 block video waiting and video fifo isn't full */
355 } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
356 IBM_MP2_FIFO, 2)) < 16384) {
357 if (saa->vidhead > saa->vidtail)
358 split = 524288 - saa->vidhead;
359 else
360 split = 0;
361 vidbytes = 30720;
362 if (split > 0 && split < 30720) {
363 memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead,
364 split);
365 saa->vidhead = 0;
366 vidbytes -= split;
367 } else
368 split = 0;
369 memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
370 vidbytes);
371 saa->vidhead += vidbytes;
372 saa->vidhead &= 0x7ffff;
373 debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
374 IBM_MP2_FIFOW), 0, 30720);
375 wake_up_interruptible(&saa->vidq);
376 }
377 saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
378}
379
380static void send_osd_data(struct saa7146 *saa)
381{
382 int size = saa->osdtail - saa->osdhead;
383 if (size > 30720)
384 size = 30720;
385 /* ensure some multiple of 8 bytes is transferred */
386 size = 8 * ((size + 8)>>3);
387 if (size) {
388 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
389 (saa->osdhead>>3), 2);
390 memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
391 saa->osdhead += size;
392 /* block transfer of next 8 bytes to ~32k bytes */
393 debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
394 }
395 if (saa->osdhead >= saa->osdtail) {
396 saa->osdhead = saa->osdtail = 0;
397 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
398 }
399}
400
401static irqreturn_t saa7146_irq(int irq, void *dev_id, struct pt_regs *regs)
402{
403 struct saa7146 *saa = (struct saa7146 *) dev_id;
404 u32 stat, astat;
405 int count;
406 int handled = 0;
407
408 count = 0;
409 while (1) {
410 /* get/clear interrupt status bits */
411 stat = saaread(SAA7146_ISR);
412 astat = stat & saaread(SAA7146_IER);
413 if (!astat)
414 break;
415 handled = 1;
416 saawrite(astat, SAA7146_ISR);
417 if (astat & SAA7146_PSR_DEBI_S) {
418 do_irq_send_data(saa);
419 }
420 if (astat & SAA7146_PSR_PIN1) {
421 int istat;
422 /* the following read will trigger DEBI_S */
423 istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
424 if (istat & 1) {
425 saawrite(0, SAA7146_IER);
426 send_osd_data(saa);
427 saawrite(SAA7146_PSR_DEBI_S |
428 SAA7146_PSR_PIN1, SAA7146_IER);
429 }
430 if (istat & 0x20) { /* Video Start */
431 saa->vidinfo.frame_count++;
432 }
433 if (istat & 0x400) { /* Picture Start */
434 /* update temporal reference */
435 }
436 if (istat & 0x200) { /* Picture Resolution Change */
437 /* read new resolution */
438 }
439 if (istat & 0x100) { /* New User Data found */
440 /* read new user data */
441 }
442 if (istat & 0x1000) { /* new GOP/SMPTE */
443 /* read new SMPTE */
444 }
445 if (istat & 0x8000) { /* Sequence Start Code */
446 /* reset frame counter, load sizes */
447 saa->vidinfo.frame_count = 0;
448 saa->vidinfo.h_size = 704;
449 saa->vidinfo.v_size = 480;
450#if 0
451 if (saa->endmarkhead != saa->endmarktail) {
452 saa->audhead =
453 saa->endmark[saa->endmarkhead];
454 saa->endmarkhead++;
455 if (saa->endmarkhead >= MAX_MARKS)
456 saa->endmarkhead = 0;
457 }
458#endif
459 }
460 if (istat & 0x4000) { /* Sequence Error Code */
461 if (saa->endmarkhead != saa->endmarktail) {
462 saa->audhead =
463 saa->endmark[saa->endmarkhead];
464 saa->endmarkhead++;
465 if (saa->endmarkhead >= MAX_MARKS)
466 saa->endmarkhead = 0;
467 }
468 }
469 }
470#ifdef IDEBUG
471 if (astat & SAA7146_PSR_PPEF) {
472 IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
473 }
474 if (astat & SAA7146_PSR_PABO) {
475 IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
476 }
477 if (astat & SAA7146_PSR_PPED) {
478 IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
479 }
480 if (astat & SAA7146_PSR_RPS_I1) {
481 IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
482 }
483 if (astat & SAA7146_PSR_RPS_I0) {
484 IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
485 }
486 if (astat & SAA7146_PSR_RPS_LATE1) {
487 IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
488 }
489 if (astat & SAA7146_PSR_RPS_LATE0) {
490 IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
491 }
492 if (astat & SAA7146_PSR_RPS_E1) {
493 IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
494 }
495 if (astat & SAA7146_PSR_RPS_E0) {
496 IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
497 }
498 if (astat & SAA7146_PSR_RPS_TO1) {
499 IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
500 }
501 if (astat & SAA7146_PSR_RPS_TO0) {
502 IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
503 }
504 if (astat & SAA7146_PSR_UPLD) {
505 IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
506 }
507 if (astat & SAA7146_PSR_DEBI_E) {
508 IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
509 }
510 if (astat & SAA7146_PSR_I2C_S) {
511 IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
512 }
513 if (astat & SAA7146_PSR_I2C_E) {
514 IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
515 }
516 if (astat & SAA7146_PSR_A2_IN) {
517 IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
518 }
519 if (astat & SAA7146_PSR_A2_OUT) {
520 IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
521 }
522 if (astat & SAA7146_PSR_A1_IN) {
523 IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
524 }
525 if (astat & SAA7146_PSR_A1_OUT) {
526 IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
527 }
528 if (astat & SAA7146_PSR_AFOU) {
529 IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
530 }
531 if (astat & SAA7146_PSR_V_PE) {
532 IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
533 }
534 if (astat & SAA7146_PSR_VFOU) {
535 IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
536 }
537 if (astat & SAA7146_PSR_FIDA) {
538 IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
539 }
540 if (astat & SAA7146_PSR_FIDB) {
541 IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
542 }
543 if (astat & SAA7146_PSR_PIN3) {
544 IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
545 }
546 if (astat & SAA7146_PSR_PIN2) {
547 IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
548 }
549 if (astat & SAA7146_PSR_PIN0) {
550 IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
551 }
552 if (astat & SAA7146_PSR_ECS) {
553 IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
554 }
555 if (astat & SAA7146_PSR_EC3S) {
556 IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
557 }
558 if (astat & SAA7146_PSR_EC0S) {
559 IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
560 }
561#endif
562 count++;
563 if (count > 15)
564 printk(KERN_WARNING "stradis%d: irq loop %d\n",
565 saa->nr, count);
566 if (count > 20) {
567 saawrite(0, SAA7146_IER);
568 printk(KERN_ERR
569 "stradis%d: IRQ loop cleared\n", saa->nr);
570 }
571 }
572 return IRQ_RETVAL(handled);
573}
574
575static int ibm_send_command(struct saa7146 *saa,
576 int command, int data, int chain)
577{
578 int i;
579
580 if (chain)
581 debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1) | 1, 2);
582 else
583 debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
584 debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
585 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
586 for (i = 0; i < 100 &&
587 (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
588 schedule();
589 if (i == 100)
590 return -1;
591 return 0;
592}
593
594static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
595{
596 I2CWrite(saa, 0x22, 0x03, left > 94 ? 94 : left, 2);
597 I2CWrite(saa, 0x22, 0x04, right > 94 ? 94 : right, 2);
598}
599
600static void initialize_cs4341(struct saa7146 *saa)
601{
602 int i;
603 for (i = 0; i < 200; i++) {
604 /* auto mute off, power on, no de-emphasis */
605 /* I2S data up to 24-bit 64xFs internal SCLK */
606 I2CWrite(saa, 0x22, 0x01, 0x11, 2);
607 /* ATAPI mixer settings */
608 I2CWrite(saa, 0x22, 0x02, 0x49, 2);
609 /* attenuation left 3db */
610 I2CWrite(saa, 0x22, 0x03, 0x00, 2);
611 /* attenuation right 3db */
612 I2CWrite(saa, 0x22, 0x04, 0x00, 2);
613 I2CWrite(saa, 0x22, 0x01, 0x10, 2);
614 if (I2CRead(saa, 0x22, 0x02, 1) == 0x49)
615 break;
616 schedule();
617 }
618 printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
619 return;
620}
621
622static void initialize_cs8420(struct saa7146 *saa, int pro)
623{
624 int i;
625 u8 *sequence;
626 if (pro)
627 sequence = mode8420pro;
628 else
629 sequence = mode8420con;
630 for (i = 0; i < INIT8420LEN; i++)
631 I2CWrite(saa, 0x20, init8420[i * 2],
632 init8420[i * 2 + 1], 2);
633 for (i = 0; i < MODE8420LEN; i++)
634 I2CWrite(saa, 0x20, sequence[i * 2],
635 sequence[i * 2 + 1], 2);
636 printk("stradis%d: CS8420 initialized\n", saa->nr);
637}
638
639static void initialize_saa7121(struct saa7146 *saa, int dopal)
640{
641 int i, mod;
642 u8 *sequence;
643 if (dopal)
644 sequence = init7121pal;
645 else
646 sequence = init7121ntsc;
647 mod = saaread(SAA7146_PSR) & 0x08;
648 /* initialize PAL/NTSC video encoder */
649 for (i = 0; i < INIT7121LEN; i++) {
650 if (NewCard) { /* handle new card encoder differences */
651 if (sequence[i*2] == 0x3a)
652 I2CWrite(saa, 0x88, 0x3a, 0x13, 2);
653 else if (sequence[i*2] == 0x6b)
654 I2CWrite(saa, 0x88, 0x6b, 0x20, 2);
655 else if (sequence[i*2] == 0x6c)
656 I2CWrite(saa, 0x88, 0x6c,
657 dopal ? 0x09 : 0xf5, 2);
658 else if (sequence[i*2] == 0x6d)
659 I2CWrite(saa, 0x88, 0x6d,
660 dopal ? 0x20 : 0x00, 2);
661 else if (sequence[i*2] == 0x7a)
662 I2CWrite(saa, 0x88, 0x7a,
663 dopal ? (PALFirstActive - 1) :
664 (NTSCFirstActive - 4), 2);
665 else if (sequence[i*2] == 0x7b)
666 I2CWrite(saa, 0x88, 0x7b,
667 dopal ? PALLastActive :
668 NTSCLastActive, 2);
669 else I2CWrite(saa, 0x88, sequence[i * 2],
670 sequence[i * 2 + 1], 2);
671 } else {
672 if (sequence[i*2] == 0x6b && mod)
673 I2CWrite(saa, 0x88, 0x6b,
674 (sequence[i * 2 + 1] ^ 0x09), 2);
675 else if (sequence[i*2] == 0x7a)
676 I2CWrite(saa, 0x88, 0x7a,
677 dopal ? (PALFirstActive - 1) :
678 (NTSCFirstActive - 4), 2);
679 else if (sequence[i*2] == 0x7b)
680 I2CWrite(saa, 0x88, 0x7b,
681 dopal ? PALLastActive :
682 NTSCLastActive, 2);
683 else
684 I2CWrite(saa, 0x88, sequence[i * 2],
685 sequence[i * 2 + 1], 2);
686 }
687 }
688}
689
690static void set_genlock_offset(struct saa7146 *saa, int noffset)
691{
692 int nCode;
693 int PixelsPerLine = 858;
694 if (CurrentMode == VIDEO_MODE_PAL)
695 PixelsPerLine = 864;
696 if (noffset > 500)
697 noffset = 500;
698 else if (noffset < -500)
699 noffset = -500;
700 nCode = noffset + 0x100;
701 if (nCode == 1)
702 nCode = 0x401;
703 else if (nCode < 1) nCode = 0x400 + PixelsPerLine + nCode;
704 debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
705}
706
707static void set_out_format(struct saa7146 *saa, int mode)
708{
709 initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
710 saa->boardcfg[2] = mode;
711 /* do not adjust analog video parameters here, use saa7121 init */
712 /* you will affect the SDI output on the new card */
713 if (mode == VIDEO_MODE_PAL) { /* PAL */
714 debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
715 mdelay(50);
716 saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
717 if (NewCard) {
718 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
719 0xe100, 2);
720 mdelay(50);
721 }
722 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
723 NewCard ? 0xe500: 0x6500, 2);
724 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
725 (1 << 8) |
726 (NewCard ? PALFirstActive : PALFirstActive-6), 2);
727 } else { /* NTSC */
728 debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
729 mdelay(50);
730 saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
731 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
732 NewCard ? 0xe100: 0x6100, 2);
733 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
734 (1 << 8) |
735 (NewCard ? NTSCFirstActive : NTSCFirstActive-6), 2);
736 }
737}
738
739
740/* Intialize bitmangler to map from a byte value to the mangled word that
741 * must be output to program the Xilinx part through the DEBI port.
742 * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
743 * transfer FPGA code, init IBM chip, transfer IBM microcode
744 * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
745 */
746static u16 bitmangler[256];
747
748static int initialize_fpga(struct video_code *bitdata)
749{
750 int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
751 u16 *dmabuf;
752 u8 *newdma;
753 struct saa7146 *saa;
754
755 /* verify fpga code */
756 for (startindex = 0; startindex < bitdata->datasize; startindex++)
757 if (bitdata->data[startindex] == 255)
758 break;
759 if (startindex == bitdata->datasize) {
760 printk(KERN_INFO "stradis: bad fpga code\n");
761 return -1;
762 }
763 /* initialize all detected cards */
764 for (num = 0; num < saa_num; num++) {
765 saa = &saa7146s[num];
766 if (saa->boardcfg[0] > 20)
767 continue; /* card was programmed */
768 loadtwo = (saa->boardcfg[18] & 0x10);
769 if (!NewCard) /* we have an old board */
770 for (i = 0; i < 256; i++)
771 bitmangler[i] = ((i & 0x01) << 15) |
772 ((i & 0x02) << 6) | ((i & 0x04) << 4) |
773 ((i & 0x08) << 9) | ((i & 0x10) << 7) |
774 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
775 ((i & 0x80) >> 7);
776 else /* else we have a new board */
777 for (i = 0; i < 256; i++)
778 bitmangler[i] = ((i & 0x01) << 7) |
779 ((i & 0x02) << 5) | ((i & 0x04) << 3) |
780 ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
781 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
782 ((i & 0x80) >> 7);
783
784 dmabuf = (u16 *) saa->dmadebi;
785 newdma = (u8 *) saa->dmadebi;
786 if (NewCard) { /* SDM2xxx */
787 if (!strncmp(bitdata->loadwhat, "decoder2", 8))
788 continue; /* fpga not for this card */
789 if (!strncmp(&saa->boardcfg[42],
790 bitdata->loadwhat, 8)) {
791 loadfile = 1;
792 } else if (loadtwo && !strncmp(&saa->boardcfg[19],
793 bitdata->loadwhat, 8)) {
794 loadfile = 2;
795 } else if (!saa->boardcfg[42] && /* special */
796 !strncmp("decxl", bitdata->loadwhat, 8)) {
797 loadfile = 1;
798 } else
799 continue; /* fpga not for this card */
800 if (loadfile != 1 && loadfile != 2) {
801 continue; /* skip to next card */
802 }
803 if (saa->boardcfg[0] && loadfile == 1 )
804 continue; /* skip to next card */
805 if (saa->boardcfg[0] != 1 && loadfile == 2)
806 continue; /* skip to next card */
807 saa->boardcfg[0]++; /* mark fpga handled */
808 printk("stradis%d: loading %s\n", saa->nr,
809 bitdata->loadwhat);
810 if (loadtwo && loadfile == 2)
811 goto send_fpga_stuff;
812 /* turn on the Audio interface to set PROG low */
813 saawrite(0x00400040, SAA7146_GPIO_CTRL);
814 saaread(SAA7146_PSR); /* ensure posted write */
815 /* wait for everyone to reset */
816 mdelay(10);
817 saawrite(0x00400000, SAA7146_GPIO_CTRL);
818 } else { /* original card */
819 if (strncmp(bitdata->loadwhat, "decoder2", 8))
820 continue; /* fpga not for this card */
821 /* Pull the Xilinx PROG signal WS3 low */
822 saawrite(0x02000200, SAA7146_MC1);
823 /* Turn on the Audio interface so can set PROG low */
824 saawrite(0x000000c0, SAA7146_ACON1);
825 /* Pull the Xilinx INIT signal (GPIO2) low */
826 saawrite(0x00400000, SAA7146_GPIO_CTRL);
827 /* Make sure everybody resets */
828 saaread(SAA7146_PSR); /* ensure posted write */
829 mdelay(10);
830 /* Release the Xilinx PROG signal */
831 saawrite(0x00000000, SAA7146_ACON1);
832 /* Turn off the Audio interface */
833 saawrite(0x02000000, SAA7146_MC1);
834 }
835 /* Release Xilinx INIT signal (WS2) */
836 saawrite(0x00000000, SAA7146_GPIO_CTRL);
837 /* Wait for the INIT to go High */
838 for (i = 0; i < 10000 &&
839 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
840 schedule();
841 if (i == 1000) {
842 printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
843 return -1;
844 }
845send_fpga_stuff:
846 if (NewCard) {
847 for (i = startindex; i < bitdata->datasize; i++)
848 newdma[i - startindex] =
849 bitmangler[bitdata->data[i]];
850 debiwrite(saa, 0x01420000, 0, 0,
851 ((bitdata->datasize - startindex) + 5));
852 if (loadtwo) {
853 if (loadfile == 1) {
854 printk("stradis%d: "
855 "awaiting 2nd FPGA bitfile\n",
856 saa->nr);
857 continue; /* skip to next card */
858 }
859
860 }
861 } else {
862 for (i = startindex; i < bitdata->datasize; i++)
863 dmabuf[i - startindex] =
864 bitmangler[bitdata->data[i]];
865 debiwrite(saa, 0x014a0000, 0, 0,
866 ((bitdata->datasize - startindex) + 5) * 2);
867 }
868 for (i = 0; i < 1000 &&
869 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
870 schedule();
871 if (i == 1000) {
872 printk(KERN_INFO "stradis%d: FPGA load failed\n",
873 saa->nr);
874 failure++;
875 continue;
876 }
877 if (!NewCard) {
878 /* Pull the Xilinx INIT signal (GPIO2) low */
879 saawrite(0x00400000, SAA7146_GPIO_CTRL);
880 saaread(SAA7146_PSR); /* ensure posted write */
881 mdelay(2);
882 saawrite(0x00000000, SAA7146_GPIO_CTRL);
883 mdelay(2);
884 }
885 printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
886 saa->boardcfg[0] = 26; /* mark fpga programmed */
887 /* set VXCO to its lowest frequency */
888 debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
889 if (NewCard) {
890 /* mute CS3310 */
891 if (HaveCS3310)
892 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
893 0, 2);
894 /* set VXCO to PWM mode, release reset, blank on */
895 debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
896 mdelay(10);
897 /* unmute CS3310 */
898 if (HaveCS3310)
899 debiwrite(saa, debNormal, XILINX_CTL0,
900 0x2020, 2);
901 }
902 /* set source Black */
903 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
904 saa->boardcfg[4] = 22; /* set NTSC First Active Line */
905 saa->boardcfg[5] = 23; /* set PAL First Active Line */
906 saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
907 saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
908 set_out_format(saa, VIDEO_MODE_NTSC);
909 mdelay(50);
910 /* begin IBM chip init */
911 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
912 saaread(SAA7146_PSR); /* wait for reset */
913 mdelay(5);
914 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
915 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
916 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
917 debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
918 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
919 if (NewCard) {
920 mdelay(5);
921 /* set i2s rate converter to 48KHz */
922 debiwrite(saa, debNormal, 0x80c0, 6, 2);
923 /* we must init CS8420 first since rev b pulls i2s */
924 /* master clock low and CS4341 needs i2s master to */
925 /* run the i2c port. */
926 if (HaveCS8420) {
927 /* 0=consumer, 1=pro */
928 initialize_cs8420(saa, 0);
929 }
930 mdelay(5);
931 if (HaveCS4341)
932 initialize_cs4341(saa);
933 }
934 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
935 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
936 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
937 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
938 if (NewCard)
939 set_genlock_offset(saa, 0);
940 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
941#if 0
942 /* enable genlock */
943 debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
944#else
945 /* disable genlock */
946 debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
947#endif
948 }
949 return failure;
950}
951
952static int do_ibm_reset(struct saa7146 *saa)
953{
954 /* failure if decoder not previously programmed */
955 if (saa->boardcfg[0] < 37)
956 return -EIO;
957 /* mute CS3310 */
958 if (HaveCS3310)
959 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
960 /* disable interrupts */
961 saawrite(0, SAA7146_IER);
962 saa->audhead = saa->audtail = 0;
963 saa->vidhead = saa->vidtail = 0;
964 /* tristate debi bus, disable debi transfers */
965 saawrite(0x00880000, SAA7146_MC1);
966 /* ensure posted write */
967 saaread(SAA7146_MC1);
968 mdelay(50);
969 /* re-enable debi transfers */
970 saawrite(0x00880088, SAA7146_MC1);
971 /* set source Black */
972 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
973 /* begin IBM chip init */
974 set_out_format(saa, CurrentMode);
975 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
976 saaread(SAA7146_PSR); /* wait for reset */
977 mdelay(5);
978 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
979 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
980 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
981 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
982 if (NewCard) {
983 mdelay(5);
984 /* set i2s rate converter to 48KHz */
985 debiwrite(saa, debNormal, 0x80c0, 6, 2);
986 /* we must init CS8420 first since rev b pulls i2s */
987 /* master clock low and CS4341 needs i2s master to */
988 /* run the i2c port. */
989 if (HaveCS8420) {
990 /* 0=consumer, 1=pro */
991 initialize_cs8420(saa, 1);
992 }
993 mdelay(5);
994 if (HaveCS4341)
995 initialize_cs4341(saa);
996 }
997 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
998 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
999 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1000 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1001 if (NewCard)
1002 set_genlock_offset(saa, 0);
1003 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1004 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1005 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1006 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1007 (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
1008 printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
1009 }
1010 if (HaveCS3310) {
1011 int i = CS3310MaxLvl;
1012 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1013 }
1014 /* start video decoder */
1015 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1016 /* 256k vid, 3520 bytes aud */
1017 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
1018 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1019 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1020 /* enable buffer threshold irq */
1021 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1022 /* clear pending interrupts */
1023 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1024 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1025 return 0;
1026}
1027
1028/* load the decoder microcode */
1029static int initialize_ibmmpeg2(struct video_code *microcode)
1030{
1031 int i, num;
1032 struct saa7146 *saa;
1033
1034 for (num = 0; num < saa_num; num++) {
1035 saa = &saa7146s[num];
1036 /* check that FPGA is loaded */
1037 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
1038 if ((i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2)) !=
1039 0xa55a) {
1040 printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
1041 saa->nr, i);
1042#if 0
1043 return -1;
1044#endif
1045 }
1046 if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
1047 if (saa->boardcfg[0] > 27)
1048 continue; /* skip to next card */
1049 /* load video control store */
1050 saa->boardcfg[1] = 0x13; /* no-sync default */
1051 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1052 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1053 for (i = 0; i < microcode->datasize / 2; i++)
1054 debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
1055 (microcode->data[i * 2] << 8) |
1056 microcode->data[i * 2 + 1], 2);
1057 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1058 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1059 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1060 ChipControl, 2);
1061 saa->boardcfg[0] = 28;
1062 }
1063 if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
1064 if (saa->boardcfg[0] > 35)
1065 continue; /* skip to next card */
1066 /* load audio control store */
1067 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1068 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1069 for (i = 0; i < microcode->datasize; i++)
1070 debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
1071 microcode->data[i], 1);
1072 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1073 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1074 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1075 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1076 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1077 0xe000, 1)) {
1078 printk(KERN_ERR
1079 "stradis%d: IBM config failed\n",
1080 saa->nr);
1081 return -1;
1082 }
1083 /* set PWM to center value */
1084 if (NewCard) {
1085 debiwrite(saa, debNormal, XILINX_PWM,
1086 saa->boardcfg[14] +
1087 (saa->boardcfg[13]<<8), 2);
1088 } else
1089 debiwrite(saa, debNormal, XILINX_PWM,
1090 0x46, 2);
1091 if (HaveCS3310) {
1092 i = CS3310MaxLvl;
1093 debiwrite(saa, debNormal,
1094 XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1095 }
1096 printk(KERN_INFO
1097 "stradis%d: IBM MPEGCD%d Initialized\n",
1098 saa->nr, 18 + (debiread(saa, debNormal,
1099 IBM_MP2_CHIP_CONTROL, 2) >> 12));
1100 /* start video decoder */
1101 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1102 ChipControl, 2);
1103 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD,
1104 0x4037, 2); /* 256k vid, 3520 bytes aud */
1105 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1106 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1107 /* enable buffer threshold irq */
1108 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1109 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1110 /* enable gpio irq */
1111 saawrite(0x00002000, SAA7146_GPIO_CTRL);
1112 /* enable decoder output to HPS */
1113 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1114 saa->boardcfg[0] = 37;
1115 }
1116 }
1117 return 0;
1118}
1119
1120static u32 palette2fmt[] =
1121{ /* some of these YUV translations are wrong */
1122 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
1123 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
1124 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
1125};
1126static int bpp2fmt[4] =
1127{
1128 VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
1129 VIDEO_PALETTE_RGB32
1130};
1131
1132/* I wish I could find a formula to calculate these... */
1133static u32 h_prescale[64] =
1134{
1135 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
1136 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
1137 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
1138 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
1139 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
1140 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
1141 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
1142 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
1143 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
1144 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
1145 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
1146};
1147static u32 v_gain[64] =
1148{
1149 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
1150 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
1151 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
1152 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1153 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1154 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1155 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1156 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1157 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1158 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1159 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1160};
1161
1162
1163static void saa7146_set_winsize(struct saa7146 *saa)
1164{
1165 u32 format;
1166 int offset, yacl, ysci;
1167 saa->win.color_fmt = format =
1168 (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
1169 palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
1170 offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
1171 saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
1172 saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
1173 saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
1174 saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
1175 SAA7146_PROT_ADDR1);
1176 saawrite(0, SAA7146_PAGE1);
1177 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1178 offset = (704 / (saa->win.width - 1)) & 0x3f;
1179 saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
1180 offset = (720896 / saa->win.width) / (offset + 1);
1181 saawrite((offset<<12)|0x0c, SAA7146_HPS_H_SCALE);
1182 if (CurrentMode == VIDEO_MODE_NTSC) {
1183 yacl = /*(480 / saa->win.height - 1) & 0x3f*/ 0;
1184 ysci = 1024 - (saa->win.height * 1024 / 480);
1185 } else {
1186 yacl = /*(576 / saa->win.height - 1) & 0x3f*/ 0;
1187 ysci = 1024 - (saa->win.height * 1024 / 576);
1188 }
1189 saawrite((1<<31)|(ysci<<21)|(yacl<<15), SAA7146_HPS_V_SCALE);
1190 saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
1191 saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
1192 SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
1193 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H),
1194 SAA7146_MC2);
1195}
1196
1197/* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
1198 * bitmap is fixed width, 128 bytes (1024 pixels represented)
1199 * arranged most-sigificant-bit-left in 32-bit words
1200 * based on saa7146 clipping hardware, it swaps bytes if LE
1201 * much of this makes up for egcs brain damage -- so if you
1202 * are wondering "why did he do this?" it is because the C
1203 * was adjusted to generate the optimal asm output without
1204 * writing non-portable __asm__ directives.
1205 */
1206
1207static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
1208{
1209 register int startword, endword;
1210 register u32 bitsleft, bitsright;
1211 u32 *temp;
1212 if (x < 0) {
1213 w += x;
1214 x = 0;
1215 }
1216 if (y < 0) {
1217 h += y;
1218 y = 0;
1219 }
1220 if (w <= 0 || h <= 0 || x > 1023 || y > 639)
1221 return; /* throw away bad clips */
1222 if (x + w > 1024)
1223 w = 1024 - x;
1224 if (y + h > 640)
1225 h = 640 - y;
1226 startword = (x >> 5);
1227 endword = ((x + w) >> 5);
1228 bitsleft = (0xffffffff >> (x & 31));
1229 bitsright = (0xffffffff << (~((x + w) - (endword<<5))));
1230 temp = &clipmap[(y<<5) + startword];
1231 w = endword - startword;
1232 if (!w) {
1233 bitsleft |= bitsright;
1234 for (y = 0; y < h; y++) {
1235 *temp |= bitsleft;
1236 temp += 32;
1237 }
1238 } else {
1239 for (y = 0; y < h; y++) {
1240 *temp++ |= bitsleft;
1241 for (x = 1; x < w; x++)
1242 *temp++ = 0xffffffff;
1243 *temp |= bitsright;
1244 temp += (32 - w);
1245 }
1246 }
1247}
1248
1249static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
1250{
1251 int i, width, height;
1252 u32 *clipmap;
1253
1254 clipmap = saa->dmavid2;
1255 if((width=saa->win.width)>1023)
1256 width = 1023; /* sanity check */
1257 if((height=saa->win.height)>640)
1258 height = 639; /* sanity check */
1259 if (ncr > 0) { /* rectangles pased */
1260 /* convert rectangular clips to a bitmap */
1261 memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
1262 for (i = 0; i < ncr; i++)
1263 clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
1264 cr[i].width, cr[i].height);
1265 }
1266 /* clip against viewing window AND screen
1267 so we do not have to rely on the user program
1268 */
1269 clip_draw_rectangle(clipmap,(saa->win.x+width>saa->win.swidth) ?
1270 (saa->win.swidth-saa->win.x) : width, 0, 1024, 768);
1271 clip_draw_rectangle(clipmap,0,(saa->win.y+height>saa->win.sheight) ?
1272 (saa->win.sheight-saa->win.y) : height,1024,768);
1273 if (saa->win.x<0)
1274 clip_draw_rectangle(clipmap, 0, 0, -(saa->win.x), 768);
1275 if (saa->win.y<0)
1276 clip_draw_rectangle(clipmap, 0, 0, 1024, -(saa->win.y));
1277}
1278
1279static int saa_ioctl(struct inode *inode, struct file *file,
1280 unsigned int cmd, unsigned long argl)
1281{
1282 struct saa7146 *saa = file->private_data;
1283 void __user *arg = (void __user *)argl;
1284
1285 switch (cmd) {
1286 case VIDIOCGCAP:
1287 {
1288 struct video_capability b;
1289 strcpy(b.name, saa->video_dev.name);
1290 b.type = VID_TYPE_CAPTURE |
1291 VID_TYPE_OVERLAY |
1292 VID_TYPE_CLIPPING |
1293 VID_TYPE_FRAMERAM |
1294 VID_TYPE_SCALES;
1295 b.channels = 1;
1296 b.audios = 1;
1297 b.maxwidth = 768;
1298 b.maxheight = 576;
1299 b.minwidth = 32;
1300 b.minheight = 32;
1301 if (copy_to_user(arg, &b, sizeof(b)))
1302 return -EFAULT;
1303 return 0;
1304 }
1305 case VIDIOCGPICT:
1306 {
1307 struct video_picture p = saa->picture;
1308 if (saa->win.depth == 8)
1309 p.palette = VIDEO_PALETTE_HI240;
1310 if (saa->win.depth == 15)
1311 p.palette = VIDEO_PALETTE_RGB555;
1312 if (saa->win.depth == 16)
1313 p.palette = VIDEO_PALETTE_RGB565;
1314 if (saa->win.depth == 24)
1315 p.palette = VIDEO_PALETTE_RGB24;
1316 if (saa->win.depth == 32)
1317 p.palette = VIDEO_PALETTE_RGB32;
1318 if (copy_to_user(arg, &p, sizeof(p)))
1319 return -EFAULT;
1320 return 0;
1321 }
1322 case VIDIOCSPICT:
1323 {
1324 struct video_picture p;
1325 u32 format;
1326 if (copy_from_user(&p, arg, sizeof(p)))
1327 return -EFAULT;
1328 if (p.palette < sizeof(palette2fmt) / sizeof(u32)) {
1329 format = palette2fmt[p.palette];
1330 saa->win.color_fmt = format;
1331 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1332 }
1333 saawrite(((p.brightness & 0xff00) << 16) |
1334 ((p.contrast & 0xfe00) << 7) |
1335 ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
1336 saa->picture = p;
1337 /* upload changed registers */
1338 saawrite(((SAA7146_MC2_UPLD_HPS_H |
1339 SAA7146_MC2_UPLD_HPS_V) << 16) |
1340 SAA7146_MC2_UPLD_HPS_H | SAA7146_MC2_UPLD_HPS_V,
1341 SAA7146_MC2);
1342 return 0;
1343 }
1344 case VIDIOCSWIN:
1345 {
1346 struct video_window vw;
1347 struct video_clip *vcp = NULL;
1348
1349 if (copy_from_user(&vw, arg, sizeof(vw)))
1350 return -EFAULT;
1351
1352 if (vw.flags || vw.width < 16 || vw.height < 16) { /* stop capture */
1353 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1354 return -EINVAL;
1355 }
1356 if (saa->win.bpp < 4) { /* 32-bit align start and adjust width */
1357 int i = vw.x;
1358 vw.x = (vw.x + 3) & ~3;
1359 i = vw.x - i;
1360 vw.width -= i;
1361 }
1362 saa->win.x = vw.x;
1363 saa->win.y = vw.y;
1364 saa->win.width = vw.width;
1365 if (saa->win.width > 768)
1366 saa->win.width = 768;
1367 saa->win.height = vw.height;
1368 if (CurrentMode == VIDEO_MODE_NTSC) {
1369 if (saa->win.height > 480)
1370 saa->win.height = 480;
1371 } else {
1372 if (saa->win.height > 576)
1373 saa->win.height = 576;
1374 }
1375
1376 /* stop capture */
1377 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1378 saa7146_set_winsize(saa);
1379
1380 /*
1381 * Do any clips.
1382 */
1383 if (vw.clipcount < 0) {
1384 if (copy_from_user(saa->dmavid2, vw.clips,
1385 VIDEO_CLIPMAP_SIZE))
1386 return -EFAULT;
1387 }
1388 else if (vw.clipcount > 16384) {
1389 return -EINVAL;
1390 } else if (vw.clipcount > 0) {
1391 if ((vcp = vmalloc(sizeof(struct video_clip) *
1392 (vw.clipcount))) == NULL)
1393 return -ENOMEM;
1394 if (copy_from_user(vcp, vw.clips,
1395 sizeof(struct video_clip) *
1396 vw.clipcount)) {
1397 vfree(vcp);
1398 return -EFAULT;
1399 }
1400 } else /* nothing clipped */
1401 memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
1402 make_clip_tab(saa, vcp, vw.clipcount);
1403 if (vw.clipcount > 0)
1404 vfree(vcp);
1405
1406 /* start capture & clip dma if we have an address */
1407 if ((saa->cap & 3) && saa->win.vidadr != 0)
1408 saawrite(((SAA7146_MC1_TR_E_1 |
1409 SAA7146_MC1_TR_E_2) << 16) | 0xffff,
1410 SAA7146_MC1);
1411 return 0;
1412 }
1413 case VIDIOCGWIN:
1414 {
1415 struct video_window vw;
1416 vw.x = saa->win.x;
1417 vw.y = saa->win.y;
1418 vw.width = saa->win.width;
1419 vw.height = saa->win.height;
1420 vw.chromakey = 0;
1421 vw.flags = 0;
1422 if (copy_to_user(arg, &vw, sizeof(vw)))
1423 return -EFAULT;
1424 return 0;
1425 }
1426 case VIDIOCCAPTURE:
1427 {
1428 int v;
1429 if (copy_from_user(&v, arg, sizeof(v)))
1430 return -EFAULT;
1431 if (v == 0) {
1432 saa->cap &= ~1;
1433 saawrite((SAA7146_MC1_TR_E_1 << 16),
1434 SAA7146_MC1);
1435 } else {
1436 if (saa->win.vidadr == 0 || saa->win.width == 0
1437 || saa->win.height == 0)
1438 return -EINVAL;
1439 saa->cap |= 1;
1440 saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
1441 SAA7146_MC1);
1442 }
1443 return 0;
1444 }
1445 case VIDIOCGFBUF:
1446 {
1447 struct video_buffer v;
1448 v.base = (void *) saa->win.vidadr;
1449 v.height = saa->win.sheight;
1450 v.width = saa->win.swidth;
1451 v.depth = saa->win.depth;
1452 v.bytesperline = saa->win.bpl;
1453 if (copy_to_user(arg, &v, sizeof(v)))
1454 return -EFAULT;
1455 return 0;
1456
1457 }
1458 case VIDIOCSFBUF:
1459 {
1460 struct video_buffer v;
1461 if (!capable(CAP_SYS_ADMIN))
1462 return -EPERM;
1463 if (copy_from_user(&v, arg, sizeof(v)))
1464 return -EFAULT;
1465 if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
1466 v.depth != 24 && v.depth != 32 && v.width > 16 &&
1467 v.height > 16 && v.bytesperline > 16)
1468 return -EINVAL;
1469 if (v.base)
1470 saa->win.vidadr = (unsigned long) v.base;
1471 saa->win.sheight = v.height;
1472 saa->win.swidth = v.width;
1473 saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
1474 saa->win.depth = v.depth;
1475 saa->win.bpl = v.bytesperline;
1476
1477 DEBUG(printk("Display at %p is %d by %d, bytedepth %d, bpl %d\n",
1478 v.base, v.width, v.height, saa->win.bpp, saa->win.bpl));
1479 saa7146_set_winsize(saa);
1480 return 0;
1481 }
1482 case VIDIOCKEY:
1483 {
1484 /* Will be handled higher up .. */
1485 return 0;
1486 }
1487
1488 case VIDIOCGAUDIO:
1489 {
1490 struct video_audio v;
1491 v = saa->audio_dev;
1492 v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
1493 v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
1494 strcpy(v.name, "MPEG");
1495 v.mode = VIDEO_SOUND_STEREO;
1496 if (copy_to_user(arg, &v, sizeof(v)))
1497 return -EFAULT;
1498 return 0;
1499 }
1500 case VIDIOCSAUDIO:
1501 {
1502 struct video_audio v;
1503 int i;
1504 if (copy_from_user(&v, arg, sizeof(v)))
1505 return -EFAULT;
1506 i = (~(v.volume>>8))&0xff;
1507 if (!HaveCS4341) {
1508 if (v.flags & VIDEO_AUDIO_MUTE) {
1509 debiwrite(saa, debNormal,
1510 IBM_MP2_FRNT_ATTEN,
1511 0xffff, 2);
1512 }
1513 if (!(v.flags & VIDEO_AUDIO_MUTE))
1514 debiwrite(saa, debNormal,
1515 IBM_MP2_FRNT_ATTEN,
1516 0x0000, 2);
1517 if (v.flags & VIDEO_AUDIO_VOLUME)
1518 debiwrite(saa, debNormal,
1519 IBM_MP2_FRNT_ATTEN,
1520 (i<<8)|i, 2);
1521 } else {
1522 if (v.flags & VIDEO_AUDIO_MUTE)
1523 cs4341_setlevel(saa, 0xff, 0xff);
1524 if (!(v.flags & VIDEO_AUDIO_MUTE))
1525 cs4341_setlevel(saa, 0, 0);
1526 if (v.flags & VIDEO_AUDIO_VOLUME)
1527 cs4341_setlevel(saa, i, i);
1528 }
1529 saa->audio_dev = v;
1530 return 0;
1531 }
1532
1533 case VIDIOCGUNIT:
1534 {
1535 struct video_unit vu;
1536 vu.video = saa->video_dev.minor;
1537 vu.vbi = VIDEO_NO_UNIT;
1538 vu.radio = VIDEO_NO_UNIT;
1539 vu.audio = VIDEO_NO_UNIT;
1540 vu.teletext = VIDEO_NO_UNIT;
1541 if (copy_to_user(arg, &vu, sizeof(vu)))
1542 return -EFAULT;
1543 return 0;
1544 }
1545 case VIDIOCSPLAYMODE:
1546 {
1547 struct video_play_mode pmode;
1548 if (copy_from_user((void *) &pmode, arg,
1549 sizeof(struct video_play_mode)))
1550 return -EFAULT;
1551 switch (pmode.mode) {
1552 case VID_PLAY_VID_OUT_MODE:
1553 if (pmode.p1 != VIDEO_MODE_NTSC &&
1554 pmode.p1 != VIDEO_MODE_PAL)
1555 return -EINVAL;
1556 set_out_format(saa, pmode.p1);
1557 return 0;
1558 case VID_PLAY_GENLOCK:
1559 debiwrite(saa, debNormal,
1560 XILINX_CTL0,
1561 (pmode.p1 ? 0x8000 : 0x8080),
1562 2);
1563 if (NewCard)
1564 set_genlock_offset(saa,
1565 pmode.p2);
1566 return 0;
1567 case VID_PLAY_NORMAL:
1568 debiwrite(saa, debNormal,
1569 IBM_MP2_CHIP_CONTROL,
1570 ChipControl, 2);
1571 ibm_send_command(saa,
1572 IBM_MP2_PLAY, 0, 0);
1573 saa->playmode = pmode.mode;
1574 return 0;
1575 case VID_PLAY_PAUSE:
1576 /* IBM removed the PAUSE command */
1577 /* they say use SINGLE_FRAME now */
1578 case VID_PLAY_SINGLE_FRAME:
1579 ibm_send_command(saa,
1580 IBM_MP2_SINGLE_FRAME,
1581 0, 0);
1582 if (saa->playmode == pmode.mode) {
1583 debiwrite(saa, debNormal,
1584 IBM_MP2_CHIP_CONTROL,
1585 ChipControl, 2);
1586 }
1587 saa->playmode = pmode.mode;
1588 return 0;
1589 case VID_PLAY_FAST_FORWARD:
1590 ibm_send_command(saa,
1591 IBM_MP2_FAST_FORWARD, 0, 0);
1592 saa->playmode = pmode.mode;
1593 return 0;
1594 case VID_PLAY_SLOW_MOTION:
1595 ibm_send_command(saa,
1596 IBM_MP2_SLOW_MOTION,
1597 pmode.p1, 0);
1598 saa->playmode = pmode.mode;
1599 return 0;
1600 case VID_PLAY_IMMEDIATE_NORMAL:
1601 /* ensure transfers resume */
1602 debiwrite(saa, debNormal,
1603 IBM_MP2_CHIP_CONTROL,
1604 ChipControl, 2);
1605 ibm_send_command(saa,
1606 IBM_MP2_IMED_NORM_PLAY, 0, 0);
1607 saa->playmode = VID_PLAY_NORMAL;
1608 return 0;
1609 case VID_PLAY_SWITCH_CHANNELS:
1610 saa->audhead = saa->audtail = 0;
1611 saa->vidhead = saa->vidtail = 0;
1612 ibm_send_command(saa,
1613 IBM_MP2_FREEZE_FRAME, 0, 1);
1614 ibm_send_command(saa,
1615 IBM_MP2_RESET_AUD_RATE, 0, 1);
1616 debiwrite(saa, debNormal,
1617 IBM_MP2_CHIP_CONTROL, 0, 2);
1618 ibm_send_command(saa,
1619 IBM_MP2_CHANNEL_SWITCH, 0, 1);
1620 debiwrite(saa, debNormal,
1621 IBM_MP2_CHIP_CONTROL,
1622 ChipControl, 2);
1623 ibm_send_command(saa,
1624 IBM_MP2_PLAY, 0, 0);
1625 saa->playmode = VID_PLAY_NORMAL;
1626 return 0;
1627 case VID_PLAY_FREEZE_FRAME:
1628 ibm_send_command(saa,
1629 IBM_MP2_FREEZE_FRAME, 0, 0);
1630 saa->playmode = pmode.mode;
1631 return 0;
1632 case VID_PLAY_STILL_MODE:
1633 ibm_send_command(saa,
1634 IBM_MP2_SET_STILL_MODE, 0, 0);
1635 saa->playmode = pmode.mode;
1636 return 0;
1637 case VID_PLAY_MASTER_MODE:
1638 if (pmode.p1 == VID_PLAY_MASTER_NONE)
1639 saa->boardcfg[1] = 0x13;
1640 else if (pmode.p1 ==
1641 VID_PLAY_MASTER_VIDEO)
1642 saa->boardcfg[1] = 0x23;
1643 else if (pmode.p1 ==
1644 VID_PLAY_MASTER_AUDIO)
1645 saa->boardcfg[1] = 0x43;
1646 else
1647 return -EINVAL;
1648 debiwrite(saa, debNormal,
1649 IBM_MP2_CHIP_CONTROL,
1650 ChipControl, 2);
1651 return 0;
1652 case VID_PLAY_ACTIVE_SCANLINES:
1653 if (CurrentMode == VIDEO_MODE_PAL) {
1654 if (pmode.p1 < 1 ||
1655 pmode.p2 > 625)
1656 return -EINVAL;
1657 saa->boardcfg[5] = pmode.p1;
1658 saa->boardcfg[55] = (pmode.p1 +
1659 (pmode.p2/2) - 1) &
1660 0xff;
1661 } else {
1662 if (pmode.p1 < 4 ||
1663 pmode.p2 > 525)
1664 return -EINVAL;
1665 saa->boardcfg[4] = pmode.p1;
1666 saa->boardcfg[54] = (pmode.p1 +
1667 (pmode.p2/2) - 4) &
1668 0xff;
1669 }
1670 set_out_format(saa, CurrentMode);
1671 case VID_PLAY_RESET:
1672 return do_ibm_reset(saa);
1673 case VID_PLAY_END_MARK:
1674 if (saa->endmarktail <
1675 saa->endmarkhead) {
1676 if (saa->endmarkhead -
1677 saa->endmarktail < 2)
1678 return -ENOSPC;
1679 } else if (saa->endmarkhead <=
1680 saa->endmarktail) {
1681 if (saa->endmarktail -
1682 saa->endmarkhead >
1683 (MAX_MARKS - 2))
1684 return -ENOSPC;
1685 } else
1686 return -ENOSPC;
1687 saa->endmark[saa->endmarktail] =
1688 saa->audtail;
1689 saa->endmarktail++;
1690 if (saa->endmarktail >= MAX_MARKS)
1691 saa->endmarktail = 0;
1692 }
1693 return -EINVAL;
1694 }
1695 case VIDIOCSWRITEMODE:
1696 {
1697 int mode;
1698 if (copy_from_user((void *) &mode, arg, sizeof(int)))
1699 return -EFAULT;
1700 if (mode == VID_WRITE_MPEG_AUD ||
1701 mode == VID_WRITE_MPEG_VID ||
1702 mode == VID_WRITE_CC ||
1703 mode == VID_WRITE_TTX ||
1704 mode == VID_WRITE_OSD) {
1705 saa->writemode = mode;
1706 return 0;
1707 }
1708 return -EINVAL;
1709 }
1710 case VIDIOCSMICROCODE:
1711 {
1712 struct video_code ucode;
1713 __u8 *udata;
1714 int i;
1715 if (copy_from_user(&ucode, arg, sizeof(ucode)))
1716 return -EFAULT;
1717 if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
1718 strncmp(ucode.loadwhat, "dec", 3))
1719 return -EINVAL;
1720 if ((udata = vmalloc(ucode.datasize)) == NULL)
1721 return -ENOMEM;
1722 if (copy_from_user(udata, ucode.data, ucode.datasize)) {
1723 vfree(udata);
1724 return -EFAULT;
1725 }
1726 ucode.data = udata;
1727 if (!strncmp(ucode.loadwhat, "decoder.aud", 11)
1728 || !strncmp(ucode.loadwhat, "decoder.vid", 11))
1729 i = initialize_ibmmpeg2(&ucode);
1730 else
1731 i = initialize_fpga(&ucode);
1732 vfree(udata);
1733 if (i)
1734 return -EINVAL;
1735 return 0;
1736
1737 }
1738 case VIDIOCGCHAN: /* this makes xawtv happy */
1739 {
1740 struct video_channel v;
1741 if (copy_from_user(&v, arg, sizeof(v)))
1742 return -EFAULT;
1743 v.flags = VIDEO_VC_AUDIO;
1744 v.tuners = 0;
1745 v.type = VID_TYPE_MPEG_DECODER;
1746 v.norm = CurrentMode;
1747 strcpy(v.name, "MPEG2");
1748 if (copy_to_user(arg, &v, sizeof(v)))
1749 return -EFAULT;
1750 return 0;
1751 }
1752 case VIDIOCSCHAN: /* this makes xawtv happy */
1753 {
1754 struct video_channel v;
1755 if (copy_from_user(&v, arg, sizeof(v)))
1756 return -EFAULT;
1757 /* do nothing */
1758 return 0;
1759 }
1760 default:
1761 return -ENOIOCTLCMD;
1762 }
1763 return 0;
1764}
1765
1766static int saa_mmap(struct file *file, struct vm_area_struct *vma)
1767{
1768 struct saa7146 *saa = file->private_data;
1769 printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
1770 return -EINVAL;
1771}
1772
1773static ssize_t saa_read(struct file *file, char __user *buf,
1774 size_t count, loff_t *ppos)
1775{
1776 return -EINVAL;
1777}
1778
1779static ssize_t saa_write(struct file *file, const char __user *buf,
1780 size_t count, loff_t *ppos)
1781{
1782 struct saa7146 *saa = file->private_data;
1783 unsigned long todo = count;
1784 int blocksize, split;
1785 unsigned long flags;
1786
1787 while (todo > 0) {
1788 if (saa->writemode == VID_WRITE_MPEG_AUD) {
1789 spin_lock_irqsave(&saa->lock, flags);
1790 if (saa->audhead <= saa->audtail)
1791 blocksize = 65536-(saa->audtail - saa->audhead);
1792 else
1793 blocksize = saa->audhead - saa->audtail;
1794 spin_unlock_irqrestore(&saa->lock, flags);
1795 if (blocksize < 16384) {
1796 saawrite(SAA7146_PSR_DEBI_S |
1797 SAA7146_PSR_PIN1, SAA7146_IER);
1798 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1799 /* wait for buffer space to open */
1800 interruptible_sleep_on(&saa->audq);
1801 }
1802 spin_lock_irqsave(&saa->lock, flags);
1803 if (saa->audhead <= saa->audtail) {
1804 blocksize = 65536-(saa->audtail - saa->audhead);
1805 split = 65536 - saa->audtail;
1806 } else {
1807 blocksize = saa->audhead - saa->audtail;
1808 split = 65536;
1809 }
1810 spin_unlock_irqrestore(&saa->lock, flags);
1811 blocksize--;
1812 if (blocksize > todo)
1813 blocksize = todo;
1814 /* double check that we really have space */
1815 if (!blocksize)
1816 return -ENOSPC;
1817 if (split < blocksize) {
1818 if (copy_from_user(saa->audbuf +
1819 saa->audtail, buf, split))
1820 return -EFAULT;
1821 buf += split;
1822 todo -= split;
1823 blocksize -= split;
1824 saa->audtail = 0;
1825 }
1826 if (copy_from_user(saa->audbuf + saa->audtail, buf,
1827 blocksize))
1828 return -EFAULT;
1829 saa->audtail += blocksize;
1830 todo -= blocksize;
1831 buf += blocksize;
1832 saa->audtail &= 0xffff;
1833 } else if (saa->writemode == VID_WRITE_MPEG_VID) {
1834 spin_lock_irqsave(&saa->lock, flags);
1835 if (saa->vidhead <= saa->vidtail)
1836 blocksize=524288-(saa->vidtail - saa->vidhead);
1837 else
1838 blocksize = saa->vidhead - saa->vidtail;
1839 spin_unlock_irqrestore(&saa->lock, flags);
1840 if (blocksize < 65536) {
1841 saawrite(SAA7146_PSR_DEBI_S |
1842 SAA7146_PSR_PIN1, SAA7146_IER);
1843 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1844 /* wait for buffer space to open */
1845 interruptible_sleep_on(&saa->vidq);
1846 }
1847 spin_lock_irqsave(&saa->lock, flags);
1848 if (saa->vidhead <= saa->vidtail) {
1849 blocksize=524288-(saa->vidtail - saa->vidhead);
1850 split = 524288 - saa->vidtail;
1851 } else {
1852 blocksize = saa->vidhead - saa->vidtail;
1853 split = 524288;
1854 }
1855 spin_unlock_irqrestore(&saa->lock, flags);
1856 blocksize--;
1857 if (blocksize > todo)
1858 blocksize = todo;
1859 /* double check that we really have space */
1860 if (!blocksize)
1861 return -ENOSPC;
1862 if (split < blocksize) {
1863 if (copy_from_user(saa->vidbuf +
1864 saa->vidtail, buf, split))
1865 return -EFAULT;
1866 buf += split;
1867 todo -= split;
1868 blocksize -= split;
1869 saa->vidtail = 0;
1870 }
1871 if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
1872 blocksize))
1873 return -EFAULT;
1874 saa->vidtail += blocksize;
1875 todo -= blocksize;
1876 buf += blocksize;
1877 saa->vidtail &= 0x7ffff;
1878 } else if (saa->writemode == VID_WRITE_OSD) {
1879 if (count > 131072)
1880 return -ENOSPC;
1881 if (copy_from_user(saa->osdbuf, buf, count))
1882 return -EFAULT;
1883 buf += count;
1884 saa->osdhead = 0;
1885 saa->osdtail = count;
1886 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
1887 debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
1888 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
1889 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
1890 debiread(saa, debNormal,
1891 IBM_MP2_DISP_MODE, 2) | 1, 2);
1892 /* trigger osd data transfer */
1893 saawrite(SAA7146_PSR_DEBI_S |
1894 SAA7146_PSR_PIN1, SAA7146_IER);
1895 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1896 }
1897 }
1898 return count;
1899}
1900
1901static int saa_open(struct inode *inode, struct file *file)
1902{
Jiri Slaby91fb8352006-01-11 19:41:21 -02001903 struct video_device *vdev = video_devdata(file);
1904 struct saa7146 *saa = container_of(vdev, struct saa7146, video_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001905
Linus Torvalds1da177e2005-04-16 15:20:36 -07001906 file->private_data = saa;
1907
Linus Torvalds1da177e2005-04-16 15:20:36 -07001908 saa->user++;
1909 if (saa->user > 1)
1910 return 0; /* device open already, don't reset */
1911 saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
1912 return 0;
1913}
1914
1915static int saa_release(struct inode *inode, struct file *file)
1916{
1917 struct saa7146 *saa = file->private_data;
1918 saa->user--;
Jiri Slaby91fb8352006-01-11 19:41:21 -02001919
Linus Torvalds1da177e2005-04-16 15:20:36 -07001920 if (saa->user > 0) /* still someone using device */
1921 return 0;
1922 saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
1923 return 0;
1924}
1925
1926static struct file_operations saa_fops =
1927{
1928 .owner = THIS_MODULE,
1929 .open = saa_open,
1930 .release = saa_release,
1931 .ioctl = saa_ioctl,
Arnd Bergmann0d0fbf82006-01-09 15:24:57 -02001932 .compat_ioctl = v4l_compat_ioctl32,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001933 .read = saa_read,
1934 .llseek = no_llseek,
1935 .write = saa_write,
1936 .mmap = saa_mmap,
1937};
1938
1939/* template for video_device-structure */
1940static struct video_device saa_template =
1941{
1942 .name = "SAA7146A",
1943 .type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY,
1944 .hardware = VID_HARDWARE_SAA7146,
1945 .fops = &saa_fops,
1946 .minor = -1,
1947};
1948
Jiri Slaby9ae82292006-01-11 19:41:13 -02001949static int __devinit configure_saa7146(struct pci_dev *pdev, int num)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001950{
Jiri Slaby91fb8352006-01-11 19:41:21 -02001951 int retval;
1952 struct saa7146 *saa = pci_get_drvdata(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001953
1954 saa->endmarkhead = saa->endmarktail = 0;
1955 saa->win.x = saa->win.y = 0;
1956 saa->win.width = saa->win.cropwidth = 720;
1957 saa->win.height = saa->win.cropheight = 480;
1958 saa->win.cropx = saa->win.cropy = 0;
1959 saa->win.bpp = 2;
1960 saa->win.depth = 16;
1961 saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
1962 saa->win.bpl = 1024 * saa->win.bpp;
1963 saa->win.swidth = 1024;
1964 saa->win.sheight = 768;
1965 saa->picture.brightness = 32768;
1966 saa->picture.contrast = 38768;
1967 saa->picture.colour = 32768;
1968 saa->cap = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001969 saa->nr = num;
1970 saa->playmode = VID_PLAY_NORMAL;
1971 memset(saa->boardcfg, 0, 64); /* clear board config area */
1972 saa->saa7146_mem = NULL;
1973 saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
1974 saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
1975 saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
1976 saa->pagea1out = saa->pagea2in = saa->pagea2out =
1977 saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
1978 saa->pageRPS2 = NULL;
1979 saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
1980 saa->audhead = saa->vidtail = 0;
1981
1982 init_waitqueue_head(&saa->i2cq);
1983 init_waitqueue_head(&saa->audq);
1984 init_waitqueue_head(&saa->debiq);
1985 init_waitqueue_head(&saa->vidq);
1986 spin_lock_init(&saa->lock);
1987
Jiri Slaby91fb8352006-01-11 19:41:21 -02001988 retval = pci_enable_device(pdev);
1989 if (retval) {
1990 dev_err(&pdev->dev, "%d: pci_enable_device failed!\n", num);
1991 goto err;
1992 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001993
Jiri Slaby9ae82292006-01-11 19:41:13 -02001994 saa->id = pdev->device;
1995 saa->irq = pdev->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001996 saa->video_dev.minor = -1;
Jiri Slaby9ae82292006-01-11 19:41:13 -02001997 saa->saa7146_adr = pci_resource_start(pdev, 0);
1998 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &saa->revision);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001999
2000 saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
Jiri Slaby91fb8352006-01-11 19:41:21 -02002001 if (saa->saa7146_mem == NULL) {
2002 dev_err(&pdev->dev, "%d: ioremap failed!\n", num);
2003 retval = -EIO;
2004 goto err;
2005 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002006
2007 memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
2008 saawrite(0, SAA7146_IER); /* turn off all interrupts */
Jiri Slaby91fb8352006-01-11 19:41:21 -02002009
2010 retval = request_irq(saa->irq, saa7146_irq, SA_SHIRQ | SA_INTERRUPT,
2011 "stradis", saa);
2012 if (retval == -EINVAL)
Jiri Slaby9ae82292006-01-11 19:41:13 -02002013 dev_err(&pdev->dev, "%d: Bad irq number or handler\n", num);
Jiri Slaby91fb8352006-01-11 19:41:21 -02002014 else if (retval == -EBUSY)
Jiri Slaby9ae82292006-01-11 19:41:13 -02002015 dev_err(&pdev->dev, "%d: IRQ %ld busy, change your PnP config "
2016 "in BIOS\n", num, saa->irq);
Jiri Slaby91fb8352006-01-11 19:41:21 -02002017 if (retval < 0)
2018 goto errio;
2019
Jiri Slaby9ae82292006-01-11 19:41:13 -02002020 pci_set_master(pdev);
Jiri Slaby91fb8352006-01-11 19:41:21 -02002021 retval = video_register_device(&saa->video_dev, VFL_TYPE_GRABBER,
2022 video_nr);
2023 if (retval < 0) {
2024 dev_err(&pdev->dev, "%d: error in registering video device!\n",
2025 num);
2026 goto errio;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002027 }
Jiri Slaby91fb8352006-01-11 19:41:21 -02002028
Linus Torvalds1da177e2005-04-16 15:20:36 -07002029 return 0;
Jiri Slaby91fb8352006-01-11 19:41:21 -02002030errio:
2031 iounmap(saa->saa7146_mem);
2032err:
2033 return retval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002034}
2035
Jiri Slaby91fb8352006-01-11 19:41:21 -02002036static int __devinit init_saa7146(struct pci_dev *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002037{
Jiri Slaby91fb8352006-01-11 19:41:21 -02002038 struct saa7146 *saa = pci_get_drvdata(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002039
Jiri Slaby9ae82292006-01-11 19:41:13 -02002040 memset(saa, 0, sizeof(*saa));
Linus Torvalds1da177e2005-04-16 15:20:36 -07002041 saa->user = 0;
2042 /* reset the saa7146 */
2043 saawrite(0xffff0000, SAA7146_MC1);
2044 mdelay(5);
2045 /* enable debi and i2c transfers and pins */
2046 saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
2047 SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
2048 /* ensure proper state of chip */
2049 saawrite(0x00000000, SAA7146_PAGE1);
2050 saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
2051 saawrite(0x00000000, SAA7146_PAGE2);
2052 saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
2053 saawrite(0x00000000, SAA7146_DD1_INIT);
2054 saawrite(0x00000000, SAA7146_DD1_STREAM_B);
2055 saawrite(0x00000000, SAA7146_DD1_STREAM_A);
2056 saawrite(0x00000000, SAA7146_BRS_CTRL);
2057 saawrite(0x80400040, SAA7146_BCS_CTRL);
2058 saawrite(0x0000e000 /*| (1<<29)*/, SAA7146_HPS_CTRL);
2059 saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
2060 saawrite(0x00000000, SAA7146_ACON1);
2061 saawrite(0x00000000, SAA7146_ACON2);
2062 saawrite(0x00000600, SAA7146_I2C_STATUS);
2063 saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
2064 SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
2065 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
2066 SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
2067 SAA7146_MC2);
2068 /* setup arbitration control registers */
2069 saawrite(0x1412121a, SAA7146_PCI_BT_V1);
2070
2071 /* allocate 32k dma buffer + 4k for page table */
2072 if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
Jiri Slaby91fb8352006-01-11 19:41:21 -02002073 dev_err(&pdev->dev, "%d: debi kmalloc failed\n", saa->nr);
2074 goto err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002075 }
2076#if 0
2077 saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
2078 saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
2079 for (i = 0; i < 12; i++) /* setup mmu page table */
2080 saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
2081#endif
2082 saa->audhead = saa->vidhead = saa->osdhead = 0;
2083 saa->audtail = saa->vidtail = saa->osdtail = 0;
Jiri Slaby91fb8352006-01-11 19:41:21 -02002084 if (saa->vidbuf == NULL && (saa->vidbuf = vmalloc(524288)) == NULL) {
2085 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
2086 goto err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002087 }
Jiri Slaby91fb8352006-01-11 19:41:21 -02002088 if (saa->audbuf == NULL && (saa->audbuf = vmalloc(65536)) == NULL) {
2089 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
2090 goto errvid;
2091 }
2092 if (saa->osdbuf == NULL && (saa->osdbuf = vmalloc(131072)) == NULL) {
2093 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
2094 goto erraud;
2095 }
2096 /* allocate 81920 byte buffer for clipping */
2097 if ((saa->dmavid2 = kzalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
2098 dev_err(&pdev->dev, "%d: clip kmalloc failed\n", saa->nr);
2099 goto errosd;
2100 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002101 /* setup clipping registers */
2102 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
2103 saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
2104 saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
2105 SAA7146_PROT_ADDR2);
2106 saawrite(256, SAA7146_PITCH2);
2107 saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
2108 saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
2109 SAA7146_MC2);
2110 I2CBusScan(saa);
Jiri Slaby91fb8352006-01-11 19:41:21 -02002111
Linus Torvalds1da177e2005-04-16 15:20:36 -07002112 return 0;
Jiri Slaby91fb8352006-01-11 19:41:21 -02002113errosd:
2114 vfree(saa->osdbuf);
2115 saa->osdbuf = NULL;
2116erraud:
2117 vfree(saa->audbuf);
2118 saa->audbuf = NULL;
2119errvid:
2120 vfree(saa->vidbuf);
2121 saa->vidbuf = NULL;
2122err:
2123 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002124}
2125
Jiri Slaby9ae82292006-01-11 19:41:13 -02002126static void stradis_release_saa(struct pci_dev *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002127{
2128 u8 command;
Jiri Slaby91fb8352006-01-11 19:41:21 -02002129 struct saa7146 *saa = pci_get_drvdata(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002130
Jiri Slaby9ae82292006-01-11 19:41:13 -02002131 /* turn off all capturing, DMA and IRQs */
2132 saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
2133 saawrite(0, SAA7146_MC2);
2134 saawrite(0, SAA7146_IER);
2135 saawrite(0xffffffffUL, SAA7146_ISR);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002136
Jiri Slaby9ae82292006-01-11 19:41:13 -02002137 /* disable PCI bus-mastering */
2138 pci_read_config_byte(pdev, PCI_COMMAND, &command);
2139 command &= ~PCI_COMMAND_MASTER;
2140 pci_write_config_byte(pdev, PCI_COMMAND, command);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002141
Jiri Slaby9ae82292006-01-11 19:41:13 -02002142 /* unmap and free memory */
2143 saa->audhead = saa->audtail = saa->osdhead = 0;
2144 saa->vidhead = saa->vidtail = saa->osdtail = 0;
2145 vfree(saa->vidbuf);
2146 vfree(saa->audbuf);
2147 vfree(saa->osdbuf);
2148 kfree(saa->dmavid2);
2149 saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
2150 saa->dmavid2 = NULL;
2151 kfree(saa->dmadebi);
2152 kfree(saa->dmavid1);
2153 kfree(saa->dmavid3);
2154 kfree(saa->dmaa1in);
2155 kfree(saa->dmaa1out);
2156 kfree(saa->dmaa2in);
2157 kfree(saa->dmaa2out);
2158 kfree(saa->dmaRPS1);
2159 kfree(saa->dmaRPS2);
2160 free_irq(saa->irq, saa);
2161 if (saa->saa7146_mem)
2162 iounmap(saa->saa7146_mem);
2163 if (saa->video_dev.minor != -1)
2164 video_unregister_device(&saa->video_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002165}
2166
Jiri Slaby9ae82292006-01-11 19:41:13 -02002167static int __devinit stradis_probe(struct pci_dev *pdev,
2168 const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002169{
Jiri Slaby9ae82292006-01-11 19:41:13 -02002170 int retval = -EINVAL;
2171
2172 if (saa_num >= SAA7146_MAX)
2173 goto err;
2174
2175 if (!pdev->subsystem_vendor)
2176 dev_info(&pdev->dev, "%d: rev1 decoder\n", saa_num);
2177 else
2178 dev_info(&pdev->dev, "%d: SDM2xx found\n", saa_num);
2179
Jiri Slaby91fb8352006-01-11 19:41:21 -02002180 pci_set_drvdata(pdev, &saa7146s[saa_num]);
Jiri Slaby9ae82292006-01-11 19:41:13 -02002181
2182 retval = configure_saa7146(pdev, saa_num);
2183 if (retval) {
2184 dev_err(&pdev->dev, "%d: error in configuring\n", saa_num);
2185 goto err;
2186 }
2187
Jiri Slaby91fb8352006-01-11 19:41:21 -02002188 if (init_saa7146(pdev) < 0) {
Jiri Slaby9ae82292006-01-11 19:41:13 -02002189 dev_err(&pdev->dev, "%d: error in initialization\n", saa_num);
2190 retval = -EIO;
2191 goto errrel;
2192 }
2193
2194 saa_num++;
2195
2196 return 0;
2197errrel:
2198 stradis_release_saa(pdev);
2199err:
2200 return retval;
2201}
2202
2203static void __devexit stradis_remove(struct pci_dev *pdev)
2204{
2205 stradis_release_saa(pdev);
2206}
2207
2208static struct pci_device_id stradis_pci_tbl[] = {
2209 { PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146) },
2210 { 0 }
2211};
2212MODULE_DEVICE_TABLE(pci, stradis_pci_tbl);
2213
2214static struct pci_driver stradis_driver = {
2215 .name = "stradis",
2216 .id_table = stradis_pci_tbl,
2217 .probe = stradis_probe,
2218 .remove = __devexit_p(stradis_remove)
2219};
2220
2221int __init stradis_init(void)
2222{
2223 int retval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002224
2225 saa_num = 0;
2226
Jiri Slaby9ae82292006-01-11 19:41:13 -02002227 retval = pci_register_driver(&stradis_driver);
2228 if (retval)
2229 printk(KERN_ERR "stradis: Unable to register pci driver.\n");
2230
2231 return retval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002232}
2233
2234
Jiri Slaby9ae82292006-01-11 19:41:13 -02002235void __exit stradis_exit(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002236{
Jiri Slaby9ae82292006-01-11 19:41:13 -02002237 pci_unregister_driver(&stradis_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002238 printk(KERN_INFO "stradis: module cleanup complete\n");
2239}
2240
Linus Torvalds1da177e2005-04-16 15:20:36 -07002241module_init(stradis_init);
2242module_exit(stradis_exit);