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Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
Bryan Wu1394f032007-05-06 14:50:22 -07003 *
Robin Getz96f10502009-09-24 14:11:24 +00004 * Licensed under the GPL-2 or later
Bryan Wu1394f032007-05-06 14:50:22 -07005 */
6
Bryan Wu1394f032007-05-06 14:50:22 -07007#include <asm-generic/vmlinux.lds.h>
8#include <asm/mem_map.h>
Mike Frysinger520473b2007-07-12 12:20:20 +08009#include <asm/page.h>
Bernd Schmidt0fa63ad2007-07-25 10:19:59 +080010#include <asm/thread_info.h>
Bryan Wu1394f032007-05-06 14:50:22 -070011
Bryan Wu1394f032007-05-06 14:50:22 -070012OUTPUT_FORMAT("elf32-bfin")
13ENTRY(__start)
14_jiffies = _jiffies_64;
15
Bryan Wu1394f032007-05-06 14:50:22 -070016SECTIONS
17{
Barry Songd86bfb12010-01-07 04:11:17 +000018#ifdef CONFIG_RAMKERNEL
Bryan Wu1394f032007-05-06 14:50:22 -070019 . = CONFIG_BOOT_LOAD;
Barry Songd86bfb12010-01-07 04:11:17 +000020#else
21 . = CONFIG_ROM_BASE;
22#endif
23
Mike Frysingerb7627ac2008-02-02 15:53:17 +080024 /* Neither the text, ro_data or bss section need to be aligned
25 * So pack them back to back
26 */
Bryan Wu1394f032007-05-06 14:50:22 -070027 .text :
28 {
Mike Frysingerde6a9522007-06-11 17:27:05 +080029 __text = .;
30 _text = .;
31 __stext = .;
Sam Ravnborg76647092007-05-13 00:31:33 +020032 TEXT_TEXT
Robin Getzb8d0c772009-03-31 13:40:52 +000033#ifndef CONFIG_SCHEDULE_L1
Bryan Wu1394f032007-05-06 14:50:22 -070034 SCHED_TEXT
Robin Getzb8d0c772009-03-31 13:40:52 +000035#endif
Mike Frysingerde6a9522007-06-11 17:27:05 +080036 LOCK_TEXT
Mike Frysinger1ee76d72009-06-10 04:45:29 -040037 IRQENTRY_TEXT
Mike Frysinger27d875f2007-08-27 16:08:53 +080038 KPROBES_TEXT
Barry Songd86bfb12010-01-07 04:11:17 +000039#ifdef CONFIG_ROMKERNEL
40 __sinittext = .;
41 INIT_TEXT
42 __einittext = .;
43 EXIT_TEXT
44#endif
Mike Frysinger27d875f2007-08-27 16:08:53 +080045 *(.text.*)
Bryan Wu1394f032007-05-06 14:50:22 -070046 *(.fixup)
Bryan Wu1394f032007-05-06 14:50:22 -070047
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +080048#if !L1_CODE_LENGTH
49 *(.l1.text)
50#endif
Bryan Wu1394f032007-05-06 14:50:22 -070051 __etext = .;
Mike Frysingerde6a9522007-06-11 17:27:05 +080052 }
Bryan Wu1394f032007-05-06 14:50:22 -070053
Mike Frysingerd49e8e72010-05-24 23:15:31 +000054 EXCEPTION_TABLE(4)
Bernd Schmidt6f985292009-01-07 23:14:39 +080055 NOTES
56
Mike Frysingerb7627ac2008-02-02 15:53:17 +080057 /* Just in case the first read only is a 32-bit access */
58 RO_DATA(4)
Barry Songd86bfb12010-01-07 04:11:17 +000059 __rodata_end = .;
Mike Frysingerb7627ac2008-02-02 15:53:17 +080060
Barry Songd86bfb12010-01-07 04:11:17 +000061#ifdef CONFIG_ROMKERNEL
62 . = CONFIG_BOOT_LOAD;
63 .bss : AT(__rodata_end)
64#else
Mike Frysingerb7627ac2008-02-02 15:53:17 +080065 .bss :
Barry Songd86bfb12010-01-07 04:11:17 +000066#endif
Mike Frysingerb7627ac2008-02-02 15:53:17 +080067 {
68 . = ALIGN(4);
69 ___bss_start = .;
70 *(.bss .bss.*)
71 *(COMMON)
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +080072#if !L1_DATA_A_LENGTH
73 *(.l1.bss)
74#endif
75#if !L1_DATA_B_LENGTH
76 *(.l1.bss.B)
77#endif
Mike Frysinger13752042008-08-06 17:10:57 +080078 . = ALIGN(4);
Mike Frysingerb7627ac2008-02-02 15:53:17 +080079 ___bss_stop = .;
80 }
Mike Frysingerde6a9522007-06-11 17:27:05 +080081
Barry Songd86bfb12010-01-07 04:11:17 +000082#if defined(CONFIG_ROMKERNEL)
83 .data : AT(LOADADDR(.bss) + SIZEOF(.bss))
84#else
Mike Frysingerde6a9522007-06-11 17:27:05 +080085 .data :
Barry Songd86bfb12010-01-07 04:11:17 +000086#endif
Mike Frysingerde6a9522007-06-11 17:27:05 +080087 {
88 __sdata = .;
Mike Frysingerb7627ac2008-02-02 15:53:17 +080089 /* This gets done first, so the glob doesn't suck it in */
Tim Abbott4a5e3512009-09-24 10:36:23 -040090 CACHELINE_ALIGNED_DATA(32)
Mike Frysingerde6a9522007-06-11 17:27:05 +080091
Sonic Zhangb85b82d2008-04-24 06:13:37 +080092#if !L1_DATA_A_LENGTH
93 . = ALIGN(32);
94 *(.data_l1.cacheline_aligned)
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +080095 *(.l1.data)
96#endif
97#if !L1_DATA_B_LENGTH
98 *(.l1.data.B)
Sonic Zhangb85b82d2008-04-24 06:13:37 +080099#endif
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800100#if !L2_LENGTH
Sonic Zhang262c3822008-07-19 15:42:41 +0800101 . = ALIGN(32);
102 *(.data_l2.cacheline_aligned)
103 *(.l2.data)
104#endif
Sonic Zhangb85b82d2008-04-24 06:13:37 +0800105
Mike Frysinger27d875f2007-08-27 16:08:53 +0800106 DATA_DATA
Mike Frysinger27d875f2007-08-27 16:08:53 +0800107 CONSTRUCTORS
108
Tim Abbott4a5e3512009-09-24 10:36:23 -0400109 INIT_TASK_DATA(THREAD_SIZE)
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800110
Mike Frysingerde6a9522007-06-11 17:27:05 +0800111 __edata = .;
112 }
Barry Songd86bfb12010-01-07 04:11:17 +0000113 __data_lma = LOADADDR(.data);
114 __data_len = SIZEOF(.data);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800115
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800116 /* The init section should be last, so when we free it, it goes into
117 * the general memory pool, and (hopefully) will decrease fragmentation
118 * a tiny bit. The init section has a _requirement_ that it be
119 * PAGE_SIZE aligned
120 */
121 . = ALIGN(PAGE_SIZE);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800122 ___init_begin = .;
Mike Frysinger27d875f2007-08-27 16:08:53 +0800123
Barry Songd86bfb12010-01-07 04:11:17 +0000124#ifdef CONFIG_RAMKERNEL
Tim Abbott4a5e3512009-09-24 10:36:23 -0400125 INIT_TEXT_SECTION(PAGE_SIZE)
Mike Frysinger70f12562009-06-07 17:18:25 -0400126
Jie Zhang0afc2722010-01-05 04:22:33 +0000127 /* We have to discard exit text and such at runtime, not link time, to
Mike Frysinger70f12562009-06-07 17:18:25 -0400128 * handle embedded cross-section references (alt instructions, bug
Jie Zhang0afc2722010-01-05 04:22:33 +0000129 * table, eh_frame, etc...). We need all of our .text up front and
130 * .data after it for PCREL call issues.
Mike Frysinger70f12562009-06-07 17:18:25 -0400131 */
132 .exit.text :
133 {
134 EXIT_TEXT
135 }
Jie Zhang0afc2722010-01-05 04:22:33 +0000136
137 . = ALIGN(16);
138 INIT_DATA_SECTION(16)
Tejun Heo0415b00d12011-03-24 18:50:09 +0100139 PERCPU_SECTION(32)
Jie Zhang0afc2722010-01-05 04:22:33 +0000140
Mike Frysinger70f12562009-06-07 17:18:25 -0400141 .exit.data :
142 {
143 EXIT_DATA
144 }
145
Tim Abbott4a5e3512009-09-24 10:36:23 -0400146 .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data))
Barry Songd86bfb12010-01-07 04:11:17 +0000147#else
Steven Miaob76f9822014-07-23 17:28:25 +0800148 .init.data : AT(__data_lma + __data_len + 32)
Barry Songd86bfb12010-01-07 04:11:17 +0000149 {
150 __sinitdata = .;
151 INIT_DATA
152 INIT_SETUP(16)
153 INIT_CALLS
154 CON_INITCALL
155 SECURITY_INITCALL
156 INIT_RAM_FS
157
Steven Miao353470c2011-06-16 18:01:20 +0800158 . = ALIGN(PAGE_SIZE);
Barry Songd86bfb12010-01-07 04:11:17 +0000159 ___per_cpu_load = .;
Mike Frysingerd6cb2e32011-03-31 15:40:52 -0400160 PERCPU_INPUT(32)
Barry Songd86bfb12010-01-07 04:11:17 +0000161
162 EXIT_DATA
163 __einitdata = .;
164 }
165 __init_data_lma = LOADADDR(.init.data);
166 __init_data_len = SIZEOF(.init.data);
167 __init_data_end = .;
168
169 .text_l1 L1_CODE_START : AT(__init_data_lma + __init_data_len)
170#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700171 {
172 . = ALIGN(4);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800173 __stext_l1 = .;
Sonic Zhangc6345ab2010-08-05 07:49:26 +0000174 *(.l1.text.head)
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800175 *(.l1.text)
Robin Getzb8d0c772009-03-31 13:40:52 +0000176#ifdef CONFIG_SCHEDULE_L1
177 SCHED_TEXT
178#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700179 . = ALIGN(4);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800180 __etext_l1 = .;
181 }
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000182 __text_l1_lma = LOADADDR(.text_l1);
183 __text_l1_len = SIZEOF(.text_l1);
184 ASSERT (__text_l1_len <= L1_CODE_LENGTH, "L1 text overflow!")
Bryan Wu1394f032007-05-06 14:50:22 -0700185
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000186 .data_l1 L1_DATA_A_START : AT(__text_l1_lma + __text_l1_len)
Bryan Wu1394f032007-05-06 14:50:22 -0700187 {
188 . = ALIGN(4);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800189 __sdata_l1 = .;
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800190 *(.l1.data)
Mike Frysingerde6a9522007-06-11 17:27:05 +0800191 __edata_l1 = .;
Bryan Wu1394f032007-05-06 14:50:22 -0700192
Bryan Wu1394f032007-05-06 14:50:22 -0700193 . = ALIGN(32);
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800194 *(.data_l1.cacheline_aligned)
Bryan Wu1394f032007-05-06 14:50:22 -0700195
196 . = ALIGN(4);
Sonic Zhang262c3822008-07-19 15:42:41 +0800197 __sbss_l1 = .;
198 *(.l1.bss)
199 . = ALIGN(4);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800200 __ebss_l1 = .;
201 }
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000202 __data_l1_lma = LOADADDR(.data_l1);
203 __data_l1_len = SIZEOF(.data_l1);
204 ASSERT (__data_l1_len <= L1_DATA_A_LENGTH, "L1 data A overflow!")
Mike Frysingerde6a9522007-06-11 17:27:05 +0800205
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000206 .data_b_l1 L1_DATA_B_START : AT(__data_l1_lma + __data_l1_len)
Bryan Wu1394f032007-05-06 14:50:22 -0700207 {
208 . = ALIGN(4);
209 __sdata_b_l1 = .;
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800210 *(.l1.data.B)
Bryan Wu1394f032007-05-06 14:50:22 -0700211 __edata_b_l1 = .;
212
213 . = ALIGN(4);
214 __sbss_b_l1 = .;
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800215 *(.l1.bss.B)
Bryan Wu1394f032007-05-06 14:50:22 -0700216 . = ALIGN(4);
217 __ebss_b_l1 = .;
Mike Frysingerde6a9522007-06-11 17:27:05 +0800218 }
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000219 __data_b_l1_lma = LOADADDR(.data_b_l1);
220 __data_b_l1_len = SIZEOF(.data_b_l1);
221 ASSERT (__data_b_l1_len <= L1_DATA_B_LENGTH, "L1 data B overflow!")
Bryan Wu1394f032007-05-06 14:50:22 -0700222
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000223 .text_data_l2 L2_START : AT(__data_b_l1_lma + __data_b_l1_len)
Sonic Zhang262c3822008-07-19 15:42:41 +0800224 {
225 . = ALIGN(4);
226 __stext_l2 = .;
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800227 *(.l2.text)
Sonic Zhang262c3822008-07-19 15:42:41 +0800228 . = ALIGN(4);
229 __etext_l2 = .;
230
231 . = ALIGN(4);
232 __sdata_l2 = .;
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800233 *(.l2.data)
Sonic Zhang262c3822008-07-19 15:42:41 +0800234 __edata_l2 = .;
235
236 . = ALIGN(32);
237 *(.data_l2.cacheline_aligned)
238
239 . = ALIGN(4);
240 __sbss_l2 = .;
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800241 *(.l2.bss)
Sonic Zhang262c3822008-07-19 15:42:41 +0800242 . = ALIGN(4);
243 __ebss_l2 = .;
244 }
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000245 __l2_lma = LOADADDR(.text_data_l2);
246 __l2_len = SIZEOF(.text_data_l2);
247 ASSERT (__l2_len <= L2_LENGTH, "L2 overflow!")
Bernd Schmidt6f985292009-01-07 23:14:39 +0800248
Mike Frysinger36208052007-10-30 12:00:02 +0800249 /* Force trailing alignment of our init section so that when we
250 * free our init memory, we don't leave behind a partial page.
251 */
Barry Songd86bfb12010-01-07 04:11:17 +0000252#ifdef CONFIG_RAMKERNEL
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000253 . = __l2_lma + __l2_len;
Barry Songd86bfb12010-01-07 04:11:17 +0000254#else
255 . = __init_data_end;
256#endif
Mike Frysinger36208052007-10-30 12:00:02 +0800257 . = ALIGN(PAGE_SIZE);
258 ___init_end = .;
Bryan Wu1394f032007-05-06 14:50:22 -0700259
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800260 __end =.;
Mike Frysingerde6a9522007-06-11 17:27:05 +0800261
Mike Frysingerc11b5772007-10-11 00:12:41 +0800262 STABS_DEBUG
263
264 DWARF_DEBUG
265
Tejun Heo023bf6f2009-07-09 11:27:40 +0900266 DISCARDS
Bryan Wu1394f032007-05-06 14:50:22 -0700267}