blob: 475a21ad665721871a4424ccf5549928d7b27dd4 [file] [log] [blame]
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -07001/*
2 * DMA Engine test module
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/delay.h>
Alexey Dobriyanb7f080c2011-06-16 11:01:34 +000011#include <linux/dma-mapping.h>
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070012#include <linux/dmaengine.h>
Guennadi Liakhovetski981ed702011-08-18 16:50:51 +020013#include <linux/freezer.h>
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070014#include <linux/init.h>
15#include <linux/kthread.h>
16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/random.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090019#include <linux/slab.h>
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070020#include <linux/wait.h>
21
22static unsigned int test_buf_size = 16384;
23module_param(test_buf_size, uint, S_IRUGO);
24MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
25
Kay Sievers06190d82008-11-11 13:12:33 -070026static char test_channel[20];
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070027module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
28MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
29
Kay Sievers06190d82008-11-11 13:12:33 -070030static char test_device[20];
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070031module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
32MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
33
34static unsigned int threads_per_chan = 1;
35module_param(threads_per_chan, uint, S_IRUGO);
36MODULE_PARM_DESC(threads_per_chan,
37 "Number of threads to start per channel (default: 1)");
38
39static unsigned int max_channels;
40module_param(max_channels, uint, S_IRUGO);
Dan Williams33df8ca2009-01-06 11:38:15 -070041MODULE_PARM_DESC(max_channels,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070042 "Maximum number of channels to use (default: all)");
43
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +020044static unsigned int iterations;
45module_param(iterations, uint, S_IRUGO);
46MODULE_PARM_DESC(iterations,
47 "Iterations before stopping test (default: infinite)");
48
Dan Williamsb54d5cb2009-03-25 09:13:25 -070049static unsigned int xor_sources = 3;
50module_param(xor_sources, uint, S_IRUGO);
51MODULE_PARM_DESC(xor_sources,
52 "Number of xor source buffers (default: 3)");
53
Dan Williams58691d62009-08-29 19:09:27 -070054static unsigned int pq_sources = 3;
55module_param(pq_sources, uint, S_IRUGO);
56MODULE_PARM_DESC(pq_sources,
57 "Number of p+q source buffers (default: 3)");
58
Viresh Kumard42efe62011-03-22 17:27:25 +053059static int timeout = 3000;
60module_param(timeout, uint, S_IRUGO);
Joe Perches85ee7a12011-04-23 20:38:19 -070061MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
62 "Pass -1 for infinite timeout");
Viresh Kumard42efe62011-03-22 17:27:25 +053063
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070064/*
65 * Initialization patterns. All bytes in the source buffer has bit 7
66 * set, all bytes in the destination buffer has bit 7 cleared.
67 *
68 * Bit 6 is set for all bytes which are to be copied by the DMA
69 * engine. Bit 5 is set for all bytes which are to be overwritten by
70 * the DMA engine.
71 *
72 * The remaining bits are the inverse of a counter which increments by
73 * one for each byte address.
74 */
75#define PATTERN_SRC 0x80
76#define PATTERN_DST 0x00
77#define PATTERN_COPY 0x40
78#define PATTERN_OVERWRITE 0x20
79#define PATTERN_COUNT_MASK 0x1f
80
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +020081struct dmatest_info;
82
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070083struct dmatest_thread {
84 struct list_head node;
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +020085 struct dmatest_info *info;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070086 struct task_struct *task;
87 struct dma_chan *chan;
Dan Williamsb54d5cb2009-03-25 09:13:25 -070088 u8 **srcs;
89 u8 **dsts;
90 enum dma_transaction_type type;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -070091};
92
93struct dmatest_chan {
94 struct list_head node;
95 struct dma_chan *chan;
96 struct list_head threads;
97};
98
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +020099/**
100 * struct dmatest_info - test information.
101 * @buf_size: size of the memcpy test buffer
102 * @channel: bus ID of the channel to test
103 * @device: bus ID of the DMA Engine to test
104 * @threads_per_chan: number of threads to start per channel
105 * @max_channels: maximum number of channels to use
106 * @iterations: iterations before stopping test
107 * @xor_sources: number of xor source buffers
108 * @pq_sources: number of p+q source buffers
109 * @timeout: transfer timeout in msec, -1 for infinite timeout
110 */
111struct dmatest_info {
Andy Shevchenko838cc702013-03-04 11:09:28 +0200112 /* Test parameters */
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200113 unsigned int buf_size;
114 char channel[20];
115 char device[20];
116 unsigned int threads_per_chan;
117 unsigned int max_channels;
118 unsigned int iterations;
119 unsigned int xor_sources;
120 unsigned int pq_sources;
121 int timeout;
Andy Shevchenko838cc702013-03-04 11:09:28 +0200122
123 /* Internal state */
124 struct list_head channels;
125 unsigned int nr_channels;
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200126};
127
128static struct dmatest_info test_info;
129
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200130static bool dmatest_match_channel(struct dmatest_info *info,
131 struct dma_chan *chan)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700132{
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200133 if (info->channel[0] == '\0')
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700134 return true;
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200135 return strcmp(dma_chan_name(chan), info->channel) == 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700136}
137
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200138static bool dmatest_match_device(struct dmatest_info *info,
139 struct dma_device *device)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700140{
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200141 if (info->device[0] == '\0')
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700142 return true;
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200143 return strcmp(dev_name(device->dev), info->device) == 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700144}
145
146static unsigned long dmatest_random(void)
147{
148 unsigned long buf;
149
150 get_random_bytes(&buf, sizeof(buf));
151 return buf;
152}
153
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200154static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
155 unsigned int buf_size)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700156{
157 unsigned int i;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700158 u8 *buf;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700159
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700160 for (; (buf = *bufs); bufs++) {
161 for (i = 0; i < start; i++)
162 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
163 for ( ; i < start + len; i++)
164 buf[i] = PATTERN_SRC | PATTERN_COPY
Joe Perchesc0198942009-06-28 09:26:21 -0700165 | (~i & PATTERN_COUNT_MASK);
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200166 for ( ; i < buf_size; i++)
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700167 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
168 buf++;
169 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700170}
171
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200172static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
173 unsigned int buf_size)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700174{
175 unsigned int i;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700176 u8 *buf;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700177
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700178 for (; (buf = *bufs); bufs++) {
179 for (i = 0; i < start; i++)
180 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
181 for ( ; i < start + len; i++)
182 buf[i] = PATTERN_DST | PATTERN_OVERWRITE
183 | (~i & PATTERN_COUNT_MASK);
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200184 for ( ; i < buf_size; i++)
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700185 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
186 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700187}
188
189static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
190 unsigned int counter, bool is_srcbuf)
191{
192 u8 diff = actual ^ pattern;
193 u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
194 const char *thread_name = current->comm;
195
196 if (is_srcbuf)
197 pr_warning("%s: srcbuf[0x%x] overwritten!"
198 " Expected %02x, got %02x\n",
199 thread_name, index, expected, actual);
200 else if ((pattern & PATTERN_COPY)
201 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
202 pr_warning("%s: dstbuf[0x%x] not copied!"
203 " Expected %02x, got %02x\n",
204 thread_name, index, expected, actual);
205 else if (diff & PATTERN_SRC)
206 pr_warning("%s: dstbuf[0x%x] was copied!"
207 " Expected %02x, got %02x\n",
208 thread_name, index, expected, actual);
209 else
210 pr_warning("%s: dstbuf[0x%x] mismatch!"
211 " Expected %02x, got %02x\n",
212 thread_name, index, expected, actual);
213}
214
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700215static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700216 unsigned int end, unsigned int counter, u8 pattern,
217 bool is_srcbuf)
218{
219 unsigned int i;
220 unsigned int error_count = 0;
221 u8 actual;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700222 u8 expected;
223 u8 *buf;
224 unsigned int counter_orig = counter;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700225
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700226 for (; (buf = *bufs); bufs++) {
227 counter = counter_orig;
228 for (i = start; i < end; i++) {
229 actual = buf[i];
230 expected = pattern | (~counter & PATTERN_COUNT_MASK);
231 if (actual != expected) {
232 if (error_count < 32)
233 dmatest_mismatch(actual, pattern, i,
234 counter, is_srcbuf);
235 error_count++;
236 }
237 counter++;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700238 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700239 }
240
241 if (error_count > 32)
242 pr_warning("%s: %u errors suppressed\n",
243 current->comm, error_count - 32);
244
245 return error_count;
246}
247
Tejun Heoadfa5432011-11-23 09:28:16 -0800248/* poor man's completion - we want to use wait_event_freezable() on it */
249struct dmatest_done {
250 bool done;
251 wait_queue_head_t *wait;
252};
253
254static void dmatest_callback(void *arg)
Dan Williamse44e0aa2009-03-25 09:13:25 -0700255{
Tejun Heoadfa5432011-11-23 09:28:16 -0800256 struct dmatest_done *done = arg;
257
258 done->done = true;
259 wake_up_all(done->wait);
Dan Williamse44e0aa2009-03-25 09:13:25 -0700260}
261
Andy Shevchenko632fd282012-12-17 15:59:52 -0800262static inline void unmap_src(struct device *dev, dma_addr_t *addr, size_t len,
263 unsigned int count)
264{
265 while (count--)
266 dma_unmap_single(dev, addr[count], len, DMA_TO_DEVICE);
267}
268
269static inline void unmap_dst(struct device *dev, dma_addr_t *addr, size_t len,
270 unsigned int count)
271{
272 while (count--)
273 dma_unmap_single(dev, addr[count], len, DMA_BIDIRECTIONAL);
274}
275
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900276static unsigned int min_odd(unsigned int x, unsigned int y)
277{
278 unsigned int val = min(x, y);
279
280 return val % 2 ? val : val - 1;
281}
282
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700283/*
284 * This function repeatedly tests DMA transfers of various lengths and
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700285 * offsets for a given operation type until it is told to exit by
286 * kthread_stop(). There may be multiple threads running this function
287 * in parallel for a single channel, and there may be multiple channels
288 * being tested in parallel.
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700289 *
290 * Before each test, the source and destination buffer is initialized
291 * with a known pattern. This pattern is different depending on
292 * whether it's in an area which is supposed to be copied or
293 * overwritten, and different in the source and destination buffers.
294 * So if the DMA engine doesn't copy exactly what we tell it to copy,
295 * we'll notice.
296 */
297static int dmatest_func(void *data)
298{
Tejun Heoadfa5432011-11-23 09:28:16 -0800299 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700300 struct dmatest_thread *thread = data;
Tejun Heoadfa5432011-11-23 09:28:16 -0800301 struct dmatest_done done = { .wait = &done_wait };
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200302 struct dmatest_info *info;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700303 struct dma_chan *chan;
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900304 struct dma_device *dev;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700305 const char *thread_name;
306 unsigned int src_off, dst_off, len;
307 unsigned int error_count;
308 unsigned int failed_tests = 0;
309 unsigned int total_tests = 0;
310 dma_cookie_t cookie;
311 enum dma_status status;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700312 enum dma_ctrl_flags flags;
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200313 u8 *pq_coefs = NULL;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700314 int ret;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700315 int src_cnt;
316 int dst_cnt;
317 int i;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700318
319 thread_name = current->comm;
Tejun Heoadfa5432011-11-23 09:28:16 -0800320 set_freezable();
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700321
322 ret = -ENOMEM;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700323
324 smp_rmb();
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200325 info = thread->info;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700326 chan = thread->chan;
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900327 dev = chan->device;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700328 if (thread->type == DMA_MEMCPY)
329 src_cnt = dst_cnt = 1;
330 else if (thread->type == DMA_XOR) {
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900331 /* force odd to ensure dst = src */
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200332 src_cnt = min_odd(info->xor_sources | 1, dev->max_xor);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700333 dst_cnt = 1;
Dan Williams58691d62009-08-29 19:09:27 -0700334 } else if (thread->type == DMA_PQ) {
Akinobu Mita8be9e32b2012-10-28 00:49:32 +0900335 /* force odd to ensure dst = src */
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200336 src_cnt = min_odd(info->pq_sources | 1, dma_maxpq(dev, 0));
Dan Williams58691d62009-08-29 19:09:27 -0700337 dst_cnt = 2;
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200338
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200339 pq_coefs = kmalloc(info->pq_sources+1, GFP_KERNEL);
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200340 if (!pq_coefs)
341 goto err_thread_type;
342
Anatolij Gustschin94de6482010-02-15 22:35:23 +0100343 for (i = 0; i < src_cnt; i++)
Dan Williams58691d62009-08-29 19:09:27 -0700344 pq_coefs[i] = 1;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700345 } else
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200346 goto err_thread_type;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700347
348 thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
349 if (!thread->srcs)
350 goto err_srcs;
351 for (i = 0; i < src_cnt; i++) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200352 thread->srcs[i] = kmalloc(info->buf_size, GFP_KERNEL);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700353 if (!thread->srcs[i])
354 goto err_srcbuf;
355 }
356 thread->srcs[i] = NULL;
357
358 thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
359 if (!thread->dsts)
360 goto err_dsts;
361 for (i = 0; i < dst_cnt; i++) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200362 thread->dsts[i] = kmalloc(info->buf_size, GFP_KERNEL);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700363 if (!thread->dsts[i])
364 goto err_dstbuf;
365 }
366 thread->dsts[i] = NULL;
367
Dan Williamse44e0aa2009-03-25 09:13:25 -0700368 set_user_nice(current, 10);
369
Ira Snyderb203bd32011-03-03 07:54:53 +0000370 /*
371 * src buffers are freed by the DMAEngine code with dma_unmap_single()
372 * dst buffers are freed by ourselves below
373 */
374 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT
375 | DMA_COMPL_SKIP_DEST_UNMAP | DMA_COMPL_SRC_UNMAP_SINGLE;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700376
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200377 while (!kthread_should_stop()
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200378 && !(info->iterations && total_tests >= info->iterations)) {
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700379 struct dma_async_tx_descriptor *tx = NULL;
380 dma_addr_t dma_srcs[src_cnt];
381 dma_addr_t dma_dsts[dst_cnt];
Dan Williams83544ae2009-09-08 17:42:53 -0700382 u8 align = 0;
Atsushi Nemotod86be862009-01-13 09:22:20 -0700383
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700384 total_tests++;
385
Dan Williams83544ae2009-09-08 17:42:53 -0700386 /* honor alignment restrictions */
387 if (thread->type == DMA_MEMCPY)
388 align = dev->copy_align;
389 else if (thread->type == DMA_XOR)
390 align = dev->xor_align;
391 else if (thread->type == DMA_PQ)
392 align = dev->pq_align;
393
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200394 if (1 << align > info->buf_size) {
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100395 pr_err("%u-byte buffer too small for %d-byte alignment\n",
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200396 info->buf_size, 1 << align);
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100397 break;
398 }
399
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200400 len = dmatest_random() % info->buf_size + 1;
Dan Williams83544ae2009-09-08 17:42:53 -0700401 len = (len >> align) << align;
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100402 if (!len)
403 len = 1 << align;
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200404 src_off = dmatest_random() % (info->buf_size - len + 1);
405 dst_off = dmatest_random() % (info->buf_size - len + 1);
Guennadi Liakhovetskicfe4f272009-12-04 19:44:48 +0100406
Dan Williams83544ae2009-09-08 17:42:53 -0700407 src_off = (src_off >> align) << align;
408 dst_off = (dst_off >> align) << align;
409
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200410 dmatest_init_srcs(thread->srcs, src_off, len, info->buf_size);
411 dmatest_init_dsts(thread->dsts, dst_off, len, info->buf_size);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700412
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700413 for (i = 0; i < src_cnt; i++) {
414 u8 *buf = thread->srcs[i] + src_off;
415
416 dma_srcs[i] = dma_map_single(dev->dev, buf, len,
417 DMA_TO_DEVICE);
Andy Shevchenkoafde3be2012-12-17 15:59:53 -0800418 ret = dma_mapping_error(dev->dev, dma_srcs[i]);
419 if (ret) {
420 unmap_src(dev->dev, dma_srcs, len, i);
421 pr_warn("%s: #%u: mapping error %d with "
422 "src_off=0x%x len=0x%x\n",
423 thread_name, total_tests - 1, ret,
424 src_off, len);
425 failed_tests++;
426 continue;
427 }
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700428 }
Atsushi Nemotod86be862009-01-13 09:22:20 -0700429 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700430 for (i = 0; i < dst_cnt; i++) {
431 dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200432 info->buf_size,
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700433 DMA_BIDIRECTIONAL);
Andy Shevchenkoafde3be2012-12-17 15:59:53 -0800434 ret = dma_mapping_error(dev->dev, dma_dsts[i]);
435 if (ret) {
436 unmap_src(dev->dev, dma_srcs, len, src_cnt);
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200437 unmap_dst(dev->dev, dma_dsts, info->buf_size, i);
Andy Shevchenkoafde3be2012-12-17 15:59:53 -0800438 pr_warn("%s: #%u: mapping error %d with "
439 "dst_off=0x%x len=0x%x\n",
440 thread_name, total_tests - 1, ret,
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200441 dst_off, info->buf_size);
Andy Shevchenkoafde3be2012-12-17 15:59:53 -0800442 failed_tests++;
443 continue;
444 }
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700445 }
Atsushi Nemotod86be862009-01-13 09:22:20 -0700446
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700447 if (thread->type == DMA_MEMCPY)
448 tx = dev->device_prep_dma_memcpy(chan,
449 dma_dsts[0] + dst_off,
450 dma_srcs[0], len,
451 flags);
452 else if (thread->type == DMA_XOR)
453 tx = dev->device_prep_dma_xor(chan,
454 dma_dsts[0] + dst_off,
Dan Williams67b91242010-02-28 22:20:18 -0700455 dma_srcs, src_cnt,
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700456 len, flags);
Dan Williams58691d62009-08-29 19:09:27 -0700457 else if (thread->type == DMA_PQ) {
458 dma_addr_t dma_pq[dst_cnt];
459
460 for (i = 0; i < dst_cnt; i++)
461 dma_pq[i] = dma_dsts[i] + dst_off;
462 tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
Anatolij Gustschin94de6482010-02-15 22:35:23 +0100463 src_cnt, pq_coefs,
Dan Williams58691d62009-08-29 19:09:27 -0700464 len, flags);
465 }
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700466
Atsushi Nemotod86be862009-01-13 09:22:20 -0700467 if (!tx) {
Andy Shevchenko632fd282012-12-17 15:59:52 -0800468 unmap_src(dev->dev, dma_srcs, len, src_cnt);
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200469 unmap_dst(dev->dev, dma_dsts, info->buf_size, dst_cnt);
Atsushi Nemotod86be862009-01-13 09:22:20 -0700470 pr_warning("%s: #%u: prep error with src_off=0x%x "
471 "dst_off=0x%x len=0x%x\n",
472 thread_name, total_tests - 1,
473 src_off, dst_off, len);
474 msleep(100);
475 failed_tests++;
476 continue;
477 }
Dan Williamse44e0aa2009-03-25 09:13:25 -0700478
Tejun Heoadfa5432011-11-23 09:28:16 -0800479 done.done = false;
Dan Williamse44e0aa2009-03-25 09:13:25 -0700480 tx->callback = dmatest_callback;
Tejun Heoadfa5432011-11-23 09:28:16 -0800481 tx->callback_param = &done;
Atsushi Nemotod86be862009-01-13 09:22:20 -0700482 cookie = tx->tx_submit(tx);
483
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700484 if (dma_submit_error(cookie)) {
485 pr_warning("%s: #%u: submit error %d with src_off=0x%x "
486 "dst_off=0x%x len=0x%x\n",
487 thread_name, total_tests - 1, cookie,
488 src_off, dst_off, len);
489 msleep(100);
490 failed_tests++;
491 continue;
492 }
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700493 dma_async_issue_pending(chan);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700494
Andy Shevchenko77101ce2013-03-04 11:09:25 +0200495 wait_event_freezable_timeout(done_wait,
496 done.done || kthread_should_stop(),
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200497 msecs_to_jiffies(info->timeout));
Guennadi Liakhovetski981ed702011-08-18 16:50:51 +0200498
Dan Williamse44e0aa2009-03-25 09:13:25 -0700499 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700500
Tejun Heoadfa5432011-11-23 09:28:16 -0800501 if (!done.done) {
502 /*
503 * We're leaving the timed out dma operation with
504 * dangling pointer to done_wait. To make this
505 * correct, we'll need to allocate wait_done for
506 * each test iteration and perform "who's gonna
507 * free it this time?" dancing. For now, just
508 * leave it dangling.
509 */
Dan Williamse44e0aa2009-03-25 09:13:25 -0700510 pr_warning("%s: #%u: test timed out\n",
511 thread_name, total_tests - 1);
512 failed_tests++;
513 continue;
514 } else if (status != DMA_SUCCESS) {
515 pr_warning("%s: #%u: got completion callback,"
516 " but status is \'%s\'\n",
517 thread_name, total_tests - 1,
518 status == DMA_ERROR ? "error" : "in progress");
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700519 failed_tests++;
520 continue;
521 }
Dan Williamse44e0aa2009-03-25 09:13:25 -0700522
Atsushi Nemotod86be862009-01-13 09:22:20 -0700523 /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200524 unmap_dst(dev->dev, dma_dsts, info->buf_size, dst_cnt);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700525
526 error_count = 0;
527
528 pr_debug("%s: verifying source buffer...\n", thread_name);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700529 error_count += dmatest_verify(thread->srcs, 0, src_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700530 0, PATTERN_SRC, true);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700531 error_count += dmatest_verify(thread->srcs, src_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700532 src_off + len, src_off,
533 PATTERN_SRC | PATTERN_COPY, true);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700534 error_count += dmatest_verify(thread->srcs, src_off + len,
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200535 info->buf_size, src_off + len,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700536 PATTERN_SRC, true);
537
538 pr_debug("%s: verifying dest buffer...\n",
539 thread->task->comm);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700540 error_count += dmatest_verify(thread->dsts, 0, dst_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700541 0, PATTERN_DST, false);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700542 error_count += dmatest_verify(thread->dsts, dst_off,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700543 dst_off + len, src_off,
544 PATTERN_SRC | PATTERN_COPY, false);
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700545 error_count += dmatest_verify(thread->dsts, dst_off + len,
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200546 info->buf_size, dst_off + len,
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700547 PATTERN_DST, false);
548
549 if (error_count) {
550 pr_warning("%s: #%u: %u errors with "
551 "src_off=0x%x dst_off=0x%x len=0x%x\n",
552 thread_name, total_tests - 1, error_count,
553 src_off, dst_off, len);
554 failed_tests++;
555 } else {
556 pr_debug("%s: #%u: No errors with "
557 "src_off=0x%x dst_off=0x%x len=0x%x\n",
558 thread_name, total_tests - 1,
559 src_off, dst_off, len);
560 }
561 }
562
563 ret = 0;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700564 for (i = 0; thread->dsts[i]; i++)
565 kfree(thread->dsts[i]);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700566err_dstbuf:
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700567 kfree(thread->dsts);
568err_dsts:
569 for (i = 0; thread->srcs[i]; i++)
570 kfree(thread->srcs[i]);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700571err_srcbuf:
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700572 kfree(thread->srcs);
573err_srcs:
Andy Shevchenko945b5af2013-03-04 11:09:26 +0200574 kfree(pq_coefs);
575err_thread_type:
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700576 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
577 thread_name, total_tests, failed_tests, ret);
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200578
Viresh Kumar9704efa2011-07-29 16:21:57 +0530579 /* terminate all transfers on specified channels */
Shiraz Hashim5e034f72012-11-09 15:26:29 +0000580 if (ret)
581 dmaengine_terminate_all(chan);
582
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200583 if (info->iterations > 0)
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200584 while (!kthread_should_stop()) {
Yong Zhangb953df72010-02-05 21:52:37 +0800585 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
Nicolas Ferre0a2ff57d2009-07-03 19:26:51 +0200586 interruptible_sleep_on(&wait_dmatest_exit);
587 }
588
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700589 return ret;
590}
591
592static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
593{
594 struct dmatest_thread *thread;
595 struct dmatest_thread *_thread;
596 int ret;
597
598 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
599 ret = kthread_stop(thread->task);
600 pr_debug("dmatest: thread %s exited with status %d\n",
601 thread->task->comm, ret);
602 list_del(&thread->node);
603 kfree(thread);
604 }
Viresh Kumar9704efa2011-07-29 16:21:57 +0530605
606 /* terminate all transfers on specified channels */
Jon Mason944ea4d2012-11-11 23:03:20 +0000607 dmaengine_terminate_all(dtc->chan);
Viresh Kumar9704efa2011-07-29 16:21:57 +0530608
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700609 kfree(dtc);
610}
611
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200612static int dmatest_add_threads(struct dmatest_info *info,
613 struct dmatest_chan *dtc, enum dma_transaction_type type)
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700614{
615 struct dmatest_thread *thread;
616 struct dma_chan *chan = dtc->chan;
617 char *op;
618 unsigned int i;
619
620 if (type == DMA_MEMCPY)
621 op = "copy";
622 else if (type == DMA_XOR)
623 op = "xor";
Dan Williams58691d62009-08-29 19:09:27 -0700624 else if (type == DMA_PQ)
625 op = "pq";
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700626 else
627 return -EINVAL;
628
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200629 for (i = 0; i < info->threads_per_chan; i++) {
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700630 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
631 if (!thread) {
632 pr_warning("dmatest: No memory for %s-%s%u\n",
633 dma_chan_name(chan), op, i);
634
635 break;
636 }
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200637 thread->info = info;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700638 thread->chan = dtc->chan;
639 thread->type = type;
640 smp_wmb();
641 thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
642 dma_chan_name(chan), op, i);
643 if (IS_ERR(thread->task)) {
644 pr_warning("dmatest: Failed to run thread %s-%s%u\n",
645 dma_chan_name(chan), op, i);
646 kfree(thread);
647 break;
648 }
649
650 /* srcbuf and dstbuf are allocated by the thread itself */
651
652 list_add_tail(&thread->node, &dtc->threads);
653 }
654
655 return i;
656}
657
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200658static int dmatest_add_channel(struct dmatest_info *info,
659 struct dma_chan *chan)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700660{
661 struct dmatest_chan *dtc;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700662 struct dma_device *dma_dev = chan->device;
663 unsigned int thread_count = 0;
Kulikov Vasiliyb9033e62010-07-17 19:19:48 +0400664 int cnt;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700665
Andrew Morton6fdb8bd2008-09-19 04:16:23 -0700666 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700667 if (!dtc) {
Dan Williams41d5e592009-01-06 11:38:21 -0700668 pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
Dan Williams33df8ca2009-01-06 11:38:15 -0700669 return -ENOMEM;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700670 }
671
672 dtc->chan = chan;
673 INIT_LIST_HEAD(&dtc->threads);
674
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700675 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200676 cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
Nicolas Ferref1aef8b2009-07-06 18:19:44 +0200677 thread_count += cnt > 0 ? cnt : 0;
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700678 }
679 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200680 cnt = dmatest_add_threads(info, dtc, DMA_XOR);
Nicolas Ferref1aef8b2009-07-06 18:19:44 +0200681 thread_count += cnt > 0 ? cnt : 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700682 }
Dan Williams58691d62009-08-29 19:09:27 -0700683 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200684 cnt = dmatest_add_threads(info, dtc, DMA_PQ);
Dr. David Alan Gilbertd07a74a2011-08-25 16:13:55 -0700685 thread_count += cnt > 0 ? cnt : 0;
Dan Williams58691d62009-08-29 19:09:27 -0700686 }
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700687
Dan Williamsb54d5cb2009-03-25 09:13:25 -0700688 pr_info("dmatest: Started %u threads using %s\n",
689 thread_count, dma_chan_name(chan));
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700690
Andy Shevchenko838cc702013-03-04 11:09:28 +0200691 list_add_tail(&dtc->node, &info->channels);
692 info->nr_channels++;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700693
Dan Williams33df8ca2009-01-06 11:38:15 -0700694 return 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700695}
696
Dan Williams7dd60252009-01-06 11:38:19 -0700697static bool filter(struct dma_chan *chan, void *param)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700698{
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200699 struct dmatest_info *info = param;
700
701 if (!dmatest_match_channel(info, chan) ||
702 !dmatest_match_device(info, chan->device))
Dan Williams7dd60252009-01-06 11:38:19 -0700703 return false;
Dan Williams33df8ca2009-01-06 11:38:15 -0700704 else
Dan Williams7dd60252009-01-06 11:38:19 -0700705 return true;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700706}
707
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200708static int run_threaded_test(struct dmatest_info *info)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700709{
Dan Williams33df8ca2009-01-06 11:38:15 -0700710 dma_cap_mask_t mask;
711 struct dma_chan *chan;
712 int err = 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700713
Dan Williams33df8ca2009-01-06 11:38:15 -0700714 dma_cap_zero(mask);
715 dma_cap_set(DMA_MEMCPY, mask);
716 for (;;) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200717 chan = dma_request_channel(mask, filter, info);
Dan Williams33df8ca2009-01-06 11:38:15 -0700718 if (chan) {
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200719 err = dmatest_add_channel(info, chan);
Dan Williamsc56c81a2009-04-08 15:08:23 -0700720 if (err) {
Dan Williams33df8ca2009-01-06 11:38:15 -0700721 dma_release_channel(chan);
722 break; /* add_channel failed, punt */
723 }
724 } else
725 break; /* no more channels available */
Andy Shevchenko838cc702013-03-04 11:09:28 +0200726 if (info->max_channels &&
727 info->nr_channels >= info->max_channels)
Dan Williams33df8ca2009-01-06 11:38:15 -0700728 break; /* we have all we need */
729 }
Dan Williams33df8ca2009-01-06 11:38:15 -0700730 return err;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700731}
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700732
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200733static void stop_threaded_test(struct dmatest_info *info)
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700734{
Dan Williams33df8ca2009-01-06 11:38:15 -0700735 struct dmatest_chan *dtc, *_dtc;
Dan Williams7cbd4872009-03-04 16:06:03 -0700736 struct dma_chan *chan;
Dan Williams33df8ca2009-01-06 11:38:15 -0700737
Andy Shevchenko838cc702013-03-04 11:09:28 +0200738 list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
Dan Williams33df8ca2009-01-06 11:38:15 -0700739 list_del(&dtc->node);
Dan Williams7cbd4872009-03-04 16:06:03 -0700740 chan = dtc->chan;
Dan Williams33df8ca2009-01-06 11:38:15 -0700741 dmatest_cleanup_channel(dtc);
Andy Shevchenko838cc702013-03-04 11:09:28 +0200742 pr_debug("dmatest: dropped channel %s\n", dma_chan_name(chan));
Dan Williams7cbd4872009-03-04 16:06:03 -0700743 dma_release_channel(chan);
Dan Williams33df8ca2009-01-06 11:38:15 -0700744 }
Andy Shevchenko838cc702013-03-04 11:09:28 +0200745
746 info->nr_channels = 0;
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700747}
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200748
749static int __init dmatest_init(void)
750{
751 struct dmatest_info *info = &test_info;
752
753 memset(info, 0, sizeof(*info));
754
Andy Shevchenko838cc702013-03-04 11:09:28 +0200755 INIT_LIST_HEAD(&info->channels);
756
757 /* Set default parameters */
Andy Shevchenkoe03e93a2013-03-04 11:09:27 +0200758 info->buf_size = test_buf_size;
759 strlcpy(info->channel, test_channel, sizeof(info->channel));
760 strlcpy(info->device, test_device, sizeof(info->device));
761 info->threads_per_chan = threads_per_chan;
762 info->max_channels = max_channels;
763 info->iterations = iterations;
764 info->xor_sources = xor_sources;
765 info->pq_sources = pq_sources;
766 info->timeout = timeout;
767
768 return run_threaded_test(info);
769}
770/* when compiled-in wait for drivers to load first */
771late_initcall(dmatest_init);
772
773static void __exit dmatest_exit(void)
774{
775 struct dmatest_info *info = &test_info;
776
777 stop_threaded_test(info);
778}
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700779module_exit(dmatest_exit);
780
Jean Delvaree05503e2011-05-18 16:49:24 +0200781MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700782MODULE_LICENSE("GPL v2");