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review.shift-gmbh.com / SHIFTPHONES / android_kernel_shift_sdm845 / 450c622e9ff19888818d4e2c4d31adb97a5242b2 / . / drivers / edac / Kconfig
blob: 6e6c3c4aea6b074d53c9824a1060bbfc38e88069 [file] [log] [blame]
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]1#
2# EDAC Kconfig
3# Copyright (c) 2003 Linux Networx
4# Licensed and distributed under the GPL
5#
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]6
Jan Engelhardt751cb5e2007-07-15 23:39:27 -0700[diff] [blame]7menuconfig EDAC
Douglas Thompsonb113a3f2007-07-19 01:50:15 -0700[diff] [blame]8 bool "EDAC - error detection and reporting (EXPERIMENTAL)"
Martin Schwidefskye25df122007-05-10 15:45:57 +0200[diff] [blame]9 depends on HAS_IOMEM
Douglas Thompsonb113a3f2007-07-19 01:50:15 -0700[diff] [blame]10 depends on EXPERIMENTAL
Andrew Morton4c6a1c12007-07-26 10:41:10 -0700[diff] [blame]11 depends on X86 || PPC
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]12 help
13 EDAC is designed to report errors in the core system.
14 These are low-level errors that are reported in the CPU or
Douglas Thompson8cb2a392007-07-19 01:50:12 -0700[diff] [blame]15 supporting chipset or other subsystems:
16 memory errors, cache errors, PCI errors, thermal throttling, etc..
17 If unsure, select 'Y'.
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]18
Tim Small57c432b2006-03-09 17:33:50 -0800[diff] [blame]19 If this code is reporting problems on your system, please
20 see the EDAC project web pages for more information at:
21
22 <http://bluesmoke.sourceforge.net/>
23
24 and:
25
26 <http://buttersideup.com/edacwiki>
27
28 There is also a mailing list for the EDAC project, which can
29 be found via the sourceforge page.
30
Jan Engelhardt751cb5e2007-07-15 23:39:27 -0700[diff] [blame]31if EDAC
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]32
33comment "Reporting subsystems"
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]34
35config EDAC_DEBUG
36 bool "Debugging"
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]37 help
38 This turns on debugging information for the entire EDAC
39 sub-system. You can insert module with "debug_level=x", current
40 there're four debug levels (x=0,1,2,3 from low to high).
41 Usually you should select 'N'.
42
43config EDAC_MM_EDAC
44 tristate "Main Memory EDAC (Error Detection And Correction) reporting"
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]45 default y
46 help
47 Some systems are able to detect and correct errors in main
48 memory. EDAC can report statistics on memory error
49 detection and correction (EDAC - or commonly referred to ECC
50 errors). EDAC will also try to decode where these errors
51 occurred so that a particular failing memory module can be
52 replaced. If unsure, select 'Y'.
53
54
55config EDAC_AMD76X
56 tristate "AMD 76x (760, 762, 768)"
Dave Jones90cbc452006-02-03 03:04:11 -0800[diff] [blame]57 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]58 help
59 Support for error detection and correction on the AMD 76x
60 series of chipsets used with the Athlon processor.
61
62config EDAC_E7XXX
63 tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800[diff] [blame]64 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]65 help
66 Support for error detection and correction on the Intel
67 E7205, E7500, E7501 and E7505 server chipsets.
68
69config EDAC_E752X
Andrei Konovalov5135b792008-04-29 01:03:13 -0700[diff] [blame]70 tristate "Intel e752x (e7520, e7525, e7320) and 3100"
Randy Dunlapda960a62006-03-31 02:30:34 -0800[diff] [blame]71 depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]72 help
73 Support for error detection and correction on the Intel
74 E7520, E7525, E7320 server chipsets.
75
Tim Small5a2c6752007-07-19 01:49:42 -0700[diff] [blame]76config EDAC_I82443BXGX
77 tristate "Intel 82443BX/GX (440BX/GX)"
78 depends on EDAC_MM_EDAC && PCI && X86_32
Andrew Morton28f96eea2007-07-19 01:49:45 -0700[diff] [blame]79 depends on BROKEN
Tim Small5a2c6752007-07-19 01:49:42 -0700[diff] [blame]80 help
81 Support for error detection and correction on the Intel
82 82443BX/GX memory controllers (440BX/GX chipsets).
83
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]84config EDAC_I82875P
85 tristate "Intel 82875p (D82875P, E7210)"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800[diff] [blame]86 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]87 help
88 Support for error detection and correction on the Intel
89 DP82785P and E7210 server chipsets.
90
Ranganathan Desikan420390f2007-07-19 01:50:31 -0700[diff] [blame]91config EDAC_I82975X
92 tristate "Intel 82975x (D82975x)"
93 depends on EDAC_MM_EDAC && PCI && X86
94 help
95 Support for error detection and correction on the Intel
96 DP82975x server chipsets.
97
Jason Uhlenkott535c6a52007-07-19 01:49:48 -0700[diff] [blame]98config EDAC_I3000
99 tristate "Intel 3000/3010"
Jason Uhlenkottf5c04542008-02-07 00:15:01 -0800[diff] [blame]100 depends on EDAC_MM_EDAC && PCI && X86
Jason Uhlenkott535c6a52007-07-19 01:49:48 -0700[diff] [blame]101 help
102 Support for error detection and correction on the Intel
103 3000 and 3010 server chipsets.
104
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]105config EDAC_I82860
106 tristate "Intel 82860"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800[diff] [blame]107 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]108 help
109 Support for error detection and correction on the Intel
110 82860 chipset.
111
112config EDAC_R82600
113 tristate "Radisys 82600 embedded chipset"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800[diff] [blame]114 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800[diff] [blame]115 help
116 Support for error detection and correction on the Radisys
117 82600 embedded chipset.
118
Eric Wolleseneb607052007-07-19 01:49:39 -0700[diff] [blame]119config EDAC_I5000
120 tristate "Intel Greencreek/Blackford chipset"
121 depends on EDAC_MM_EDAC && X86 && PCI
122 help
123 Support for error detection and correction the Intel
124 Greekcreek/Blackford chipsets.
125
Dave Jianga9a753d2008-02-07 00:14:55 -0800[diff] [blame]126config EDAC_MPC85XX
127 tristate "Freescale MPC85xx"
128 depends on EDAC_MM_EDAC && FSL_SOC && MPC85xx
129 help
130 Support for error detection and correction on the Freescale
131 MPC8560, MPC8540, MPC8548
132
Dave Jiang4f4aeea2008-02-07 00:14:56 -0800[diff] [blame]133config EDAC_MV64X60
134 tristate "Marvell MV64x60"
135 depends on EDAC_MM_EDAC && MV64X60
136 help
137 Support for error detection and correction on the Marvell
138 MV64360 and MV64460 chipsets.
139
Egor Martovetsky7d8536f2007-07-19 01:50:24 -0700[diff] [blame]140config EDAC_PASEMI
141 tristate "PA Semi PWRficient"
142 depends on EDAC_MM_EDAC && PCI
Doug Thompsonddcc3052007-07-26 10:41:16 -0700[diff] [blame]143 depends on PPC_PASEMI
Egor Martovetsky7d8536f2007-07-19 01:50:24 -0700[diff] [blame]144 help
145 Support for error detection and correction on PA Semi
146 PWRficient.
147
Benjamin Herrenschmidt48764e42008-02-07 00:14:53 -0800[diff] [blame]148config EDAC_CELL
149 tristate "Cell Broadband Engine memory controller"
150 depends on EDAC_MM_EDAC && PPC_CELL_NATIVE
151 help
152 Support for error detection and correction on the
153 Cell Broadband Engine internal memory controller
154 on platform without a hypervisor
Egor Martovetsky7d8536f2007-07-19 01:50:24 -0700[diff] [blame]155
Jan Engelhardt751cb5e2007-07-15 23:39:27 -0700[diff] [blame]156endif # EDAC