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Vineet Guptacfdbc2e2013-01-18 15:12:20 +05301#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10 def_bool y
11 select ARCH_NO_VIRT_TO_BUS
Vineet Gupta4adeefe2013-01-18 15:12:18 +053012 select CLONE_BACKWARDS
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053013 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
14 select DEVTMPFS if !INITRAMFS_SOURCE=""
15 select GENERIC_ATOMIC64
16 select GENERIC_CLOCKEVENTS
17 select GENERIC_FIND_FIRST_BIT
18 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
19 select GENERIC_IRQ_SHOW
Vineet Guptabf90e1e2013-01-18 15:12:18 +053020 select GENERIC_KERNEL_EXECVE
21 select GENERIC_KERNEL_THREAD
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053022 select GENERIC_PENDING_IRQ if SMP
Vineet Guptac3581032013-01-18 15:12:19 +053023 select GENERIC_SIGALTSTACK
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053024 select GENERIC_SMP_IDLE_THREAD
Vineet Gupta547f1122013-01-18 15:12:22 +053025 select HAVE_ARCH_TRACEHOOK
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053026 select HAVE_GENERIC_HARDIRQS
Vineet Gupta4d86dfb2013-01-22 17:03:59 +053027 select HAVE_KPROBES
28 select HAVE_KRETPROBES
Vineet Guptac121c502013-01-18 15:12:20 +053029 select HAVE_MEMBLOCK
Vineet Gupta854a0d92013-01-22 17:03:19 +053030 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
Vineet Gupta769bc1f2013-01-22 17:02:38 +053031 select HAVE_OPROFILE
Vineet Gupta999159a2013-01-22 17:00:52 +053032 select IRQ_DOMAIN
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053033 select MODULES_USE_ELF_RELA
Vineet Guptac121c502013-01-18 15:12:20 +053034 select NO_BOOTMEM
Vineet Gupta999159a2013-01-22 17:00:52 +053035 select OF
36 select OF_EARLY_FLATTREE
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053037
38config SCHED_OMIT_FRAME_POINTER
39 def_bool y
40
41config GENERIC_CSUM
42 def_bool y
43
44config RWSEM_GENERIC_SPINLOCK
45 def_bool y
46
47config ARCH_FLATMEM_ENABLE
48 def_bool y
49
50config MMU
51 def_bool y
52
53config NO_IOPORT
54 def_bool y
55
56config GENERIC_CALIBRATE_DELAY
57 def_bool y
58
59config GENERIC_HWEIGHT
60 def_bool y
61
62config BINFMT_ELF
63 def_bool y
64
Vineet Gupta44c8bb92013-01-18 15:12:23 +053065config STACKTRACE_SUPPORT
66 def_bool y
67 select STACKTRACE
68
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053069config HAVE_LATENCYTOP_SUPPORT
70 def_bool y
71
72config NO_DMA
73 def_bool n
74
75source "init/Kconfig"
76source "kernel/Kconfig.freezer"
77
78menu "ARC Architecture Configuration"
79
80choice
81 prompt "ARC Platform"
82 default ARC_PLAT_FPGA_LEGACY
83
84config ARC_PLAT_FPGA_LEGACY
85 bool "\"Legacy\" ARC FPGA dev platform"
86 help
87 Support for ARC development platforms, provided by Synopsys.
88 These are based on FPGA or ISS. e.g.
89 - ARCAngel4
90 - ML509
91 - MetaWare ISS
92
93#New platform adds here
94endchoice
95
96menu "ARC CPU Configuration"
97
98choice
99 prompt "ARC Core"
100 default ARC_CPU_770
101
102config ARC_CPU_750D
103 bool "ARC750D"
104 help
105 Support for ARC750 core
106
107config ARC_CPU_770
108 bool "ARC770"
109 select ARC_CPU_REL_4_10
110 help
111 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
112 This core has a bunch of cool new features:
113 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
114 Shared Address Spaces (for sharing TLB entires in MMU)
115 -Caches: New Prog Model, Region Flush
116 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
117
118endchoice
119
120config CPU_BIG_ENDIAN
121 bool "Enable Big Endian Mode"
122 default n
123 help
124 Build kernel for Big Endian Mode of ARC CPU
125
Vineet Gupta41195d22013-01-18 15:12:23 +0530126config SMP
127 bool "Symmetric Multi-Processing (Incomplete)"
128 default n
129 select USE_GENERIC_SMP_HELPERS
130 help
131 This enables support for systems with more than one CPU. If you have
132 a system with only one CPU, like most personal computers, say N. If
133 you have a system with more than one CPU, say Y.
134
135if SMP
136
137config ARC_HAS_COH_CACHES
138 def_bool n
139
140config ARC_HAS_COH_LLSC
141 def_bool n
142
143config ARC_HAS_COH_RTSC
144 def_bool n
145
146config ARC_HAS_REENTRANT_IRQ_LV2
147 def_bool n
148
149endif
150
151config NR_CPUS
152 int "Maximum number of CPUs (2-32)"
153 range 2 32
154 depends on SMP
155 default "2"
156
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530157menuconfig ARC_CACHE
158 bool "Enable Cache Support"
159 default y
Vineet Gupta41195d22013-01-18 15:12:23 +0530160 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
161 depends on !SMP || ARC_HAS_COH_CACHES
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530162
163if ARC_CACHE
164
165config ARC_CACHE_LINE_SHIFT
166 int "Cache Line Length (as power of 2)"
167 range 5 7
168 default "6"
169 help
170 Starting with ARC700 4.9, Cache line length is configurable,
171 This option specifies "N", with Line-len = 2 power N
172 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
173 Linux only supports same line lengths for I and D caches.
174
175config ARC_HAS_ICACHE
176 bool "Use Instruction Cache"
177 default y
178
179config ARC_HAS_DCACHE
180 bool "Use Data Cache"
181 default y
182
183config ARC_CACHE_PAGES
184 bool "Per Page Cache Control"
185 default y
186 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
187 help
188 This can be used to over-ride the global I/D Cache Enable on a
189 per-page basis (but only for pages accessed via MMU such as
190 Kernel Virtual address or User Virtual Address)
191 TLB entries have a per-page Cache Enable Bit.
192 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
193 Global DISABLE + Per Page ENABLE won't work
194
195endif #ARC_CACHE
196
197config ARC_HAS_HW_MPY
198 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
199 default y
200 help
201 Influences how gcc generates code for MPY operations.
202 If enabled, MPYxx insns are generated, provided by Standard/XMAC
203 Multipler. Otherwise software multipy lib is used
204
205choice
206 prompt "ARC700 MMU Version"
207 default ARC_MMU_V3 if ARC_CPU_770
208 default ARC_MMU_V2 if ARC_CPU_750D
209
210config ARC_MMU_V1
211 bool "MMU v1"
212 help
213 Orig ARC700 MMU
214
215config ARC_MMU_V2
216 bool "MMU v2"
217 help
218 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
219 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
220
221config ARC_MMU_V3
222 bool "MMU v3"
223 depends on ARC_CPU_770
224 help
225 Introduced with ARC700 4.10: New Features
226 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
227 Shared Address Spaces (SASID)
228
229endchoice
230
231
232choice
233 prompt "MMU Page Size"
234 default ARC_PAGE_SIZE_8K
235
236config ARC_PAGE_SIZE_8K
237 bool "8KB"
238 help
239 Choose between 8k vs 16k
240
241config ARC_PAGE_SIZE_16K
242 bool "16KB"
243 depends on ARC_MMU_V3
244
245config ARC_PAGE_SIZE_4K
246 bool "4KB"
247 depends on ARC_MMU_V3
248
249endchoice
250
Vineet Gupta4788a592013-01-18 15:12:22 +0530251config ARC_COMPACT_IRQ_LEVELS
252 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
253 default n
254 # Timer HAS to be high priority, for any other high priority config
255 select ARC_IRQ3_LV2
Vineet Gupta41195d22013-01-18 15:12:23 +0530256 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
257 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
Vineet Gupta4788a592013-01-18 15:12:22 +0530258
259if ARC_COMPACT_IRQ_LEVELS
260
261config ARC_IRQ3_LV2
262 bool
263
264config ARC_IRQ5_LV2
265 bool
266
267config ARC_IRQ6_LV2
268 bool
269
270endif
271
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530272config ARC_FPU_SAVE_RESTORE
273 bool "Enable FPU state persistence across context switch"
274 default n
275 help
276 Double Precision Floating Point unit had dedictaed regs which
277 need to be saved/restored across context-switch.
278 Note that ARC FPU is overly simplistic, unlike say x86, which has
279 hardware pieces to allow software to conditionally save/restore,
280 based on actual usage of FPU by a task. Thus our implemn does
281 this for all tasks in system.
282
283menuconfig ARC_CPU_REL_4_10
284 bool "Enable support for Rel 4.10 features"
285 default n
286 help
287 -ARC770 (and dependent features) enabled
288 -ARC750 also shares some of the new features with 770
289
290config ARC_HAS_LLSC
291 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
292 default y
293 depends on ARC_CPU_770
294 # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics
295 depends on !SMP || ARC_HAS_COH_LLSC
296
297config ARC_HAS_SWAPE
298 bool "Insn: SWAPE (endian-swap)"
299 default y
300 depends on ARC_CPU_REL_4_10
301
302config ARC_HAS_RTSC
303 bool "Insn: RTSC (64-bit r/o cycle counter)"
304 default y
305 depends on ARC_CPU_REL_4_10
Vineet Gupta41195d22013-01-18 15:12:23 +0530306 # if SMP, enable RTSC only if counter is coherent across cores
307 depends on !SMP || ARC_HAS_COH_RTSC
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530308
309endmenu # "ARC CPU Configuration"
310
311menu "Platform Board Configuration"
312
313source "arch/arc/plat-arcfpga/Kconfig"
314
315#New platform adds here
316
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530317config LINUX_LINK_BASE
318 hex "Linux Link Address"
319 default "0x80000000"
320 help
321 ARC700 divides the 32 bit phy address space into two equal halves
322 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
323 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
324 Typically Linux kernel is linked at the start of untransalted addr,
325 hence the default value of 0x8zs.
326 However some customers have peripherals mapped at this addr, so
327 Linux needs to be scooted a bit.
328 If you don't know what the above means, leave this setting alone.
329
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530330endmenu # "Platform Board Configuration"
331
Vineet Gupta080c3742013-02-11 19:52:57 +0530332config ARC_CURR_IN_REG
333 bool "Dedicate Register r25 for current_task pointer"
334 default y
335 help
336 This reserved Register R25 to point to Current Task in
337 kernel mode. This saves memory access for each such access
338
Vineet Gupta2e651ea2013-01-23 16:30:36 +0530339
340config ARC_MISALIGN_ACCESS
341 bool "Emulate unaligned memory access (userspace only)"
342 default N
343 select SYSCTL_ARCH_UNALIGN_NO_WARN
344 select SYSCTL_ARCH_UNALIGN_ALLOW
345 help
346 This enables misaligned 16 & 32 bit memory access from user space.
347 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
348 potential bugs in code
349
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530350config ARC_STACK_NONEXEC
351 bool "Make stack non-executable"
352 default n
353 help
354 To disable the execute permissions of stack/heap of processes
355 which are enabled by default.
356
357config HZ
358 int "Timer Frequency"
359 default 100
360
361menuconfig ARC_DBG
362 bool "ARC debugging"
363 default y
364
Vineet Gupta854a0d92013-01-22 17:03:19 +0530365config ARC_DW2_UNWIND
366 bool "Enable DWARF specific kernel stack unwind"
367 depends on ARC_DBG
368 default y
369 select KALLSYMS
370 help
371 Compiles the kernel with DWARF unwind information and can be used
372 to get stack backtraces.
373
374 If you say Y here the resulting kernel image will be slightly larger
375 but not slower, and it will give very useful debugging information.
376 If you don't debug the kernel, you can say N, but we may not be able
377 to solve problems without frame unwind information
378
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530379config ARC_DBG_TLB_PARANOIA
380 bool "Paranoia Checks in Low Level TLB Handlers"
Vineet Gupta41195d22013-01-18 15:12:23 +0530381 depends on ARC_DBG && !SMP
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530382 default n
383
384config ARC_DBG_TLB_MISS_COUNT
385 bool "Profile TLB Misses"
386 default n
387 select DEBUG_FS
388 depends on ARC_DBG
389 help
390 Counts number of I and D TLB Misses and exports them via Debugfs
391 The counters can be cleared via Debugfs as well
392
393config CMDLINE
394 string "Kernel command line to built-in"
395 default "print-fatal-signals=1"
396 help
397 The default command line which will be appended to the optional
398 u-boot provided command line (see below)
399
400config CMDLINE_UBOOT
401 bool "Support U-boot kernel command line passing"
402 default n
403 help
404 If you are using U-boot (www.denx.de) and wish to pass the kernel
405 command line from the U-boot environment to the Linux kernel then
406 switch this option on.
407 ARC U-boot will setup the cmdline in RAM/flash and set r2 to point
408 to it. kernel startup code will copy the string into cmdline buffer
409 and also append CONFIG_CMDLINE.
410
Vineet Gupta999159a2013-01-22 17:00:52 +0530411config ARC_BUILTIN_DTB_NAME
412 string "Built in DTB"
413 help
414 Set the name of the DTB to embed in the vmlinux binary
415 Leaving it blank selects the minimal "skeleton" dtb
416
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530417source "kernel/Kconfig.preempt"
418
419endmenu # "ARC Architecture Configuration"
420
421source "mm/Kconfig"
422source "net/Kconfig"
423source "drivers/Kconfig"
424source "fs/Kconfig"
425source "arch/arc/Kconfig.debug"
426source "security/Kconfig"
427source "crypto/Kconfig"
428source "lib/Kconfig"