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review.shift-gmbh.com / SHIFTPHONES / android_kernel_shift_sdm845 / 1844c9bc0b2fed3023551c1affe033ab38e90b9a / . / arch / s390 / kernel / head31.S
blob: 1bbcc499d455c87096b84f89bab35a629a5ab388 [file] [log] [blame]
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]1/*
2 * arch/s390/kernel/head31.S
3 *
Martin Schwidefsky1844c9b2010-02-26 22:37:53 +0100[diff] [blame^]4 * Copyright (C) IBM Corp. 2005,2010
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]5 *
6 * Author(s): Hartmut Penner <hp@de.ibm.com>
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>
8 * Rob van der Heij <rvdhei@iae.nl>
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 *
11 */
12
Martin Schwidefsky1844c9b2010-02-26 22:37:53 +0100[diff] [blame^]13#include <linux/init.h>
14#include <asm/asm-offsets.h>
15#include <asm/thread_info.h>
16#include <asm/page.h>
Heiko Carstensb1b70302006-06-29 14:58:17 +0200[diff] [blame]17
Martin Schwidefsky1844c9b2010-02-26 22:37:53 +0100[diff] [blame^]18__HEAD
19 .globl startup_continue
Heiko Carstensb1b70302006-06-29 14:58:17 +0200[diff] [blame]20startup_continue:
21 basr %r13,0 # get base
Martin Schwidefskye37f50e2008-12-25 13:39:19 +0100[diff] [blame]22.LPG1:
23
Martin Schwidefsky1844c9b2010-02-26 22:37:53 +0100[diff] [blame^]24 l %r1,.Lbase_cc-.LPG1(%r13)
25 mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]26 lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
Heiko Carstensb1b70302006-06-29 14:58:17 +0200[diff] [blame]27 l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
28 # move IPL device to lowcore
Heiko Carstense87bfe52006-09-20 15:59:15 +0200[diff] [blame]29#
30# Setup stack
31#
32 l %r15,.Linittu-.LPG1(%r13)
Heiko Carstens0c88ee52009-09-11 10:28:58 +0200[diff] [blame]33 st %r15,__LC_THREAD_INFO # cache thread info in lowcore
Heiko Carstense87bfe52006-09-20 15:59:15 +0200[diff] [blame]34 mvc __LC_CURRENT(4),__TI_task(%r15)
35 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
36 st %r15,__LC_KERNEL_STACK # set end of kernel stack
37 ahi %r15,-96
Hongjie Yangfe355b72007-02-05 21:18:24 +0100[diff] [blame]38#
39# Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
40# and create a kernel NSS if the SAVESYS= parm is defined
41#
42 l %r14,.Lstartup_init-.LPG1(%r13)
Heiko Carstense87bfe52006-09-20 15:59:15 +0200[diff] [blame]43 basr %r14,%r14
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]44 lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
45 # virtual and never return ...
46 .align 8
47.Lentry:.long 0x00080000,0x80000000 + _stext
48.Lctl: .long 0x04b50002 # cr0: various things
49 .long 0 # cr1: primary space segment table
50 .long .Lduct # cr2: dispatchable unit control table
51 .long 0 # cr3: instruction authorization
52 .long 0 # cr4: instruction authorization
Gerald Schaefer482b05d2007-03-05 23:35:54 +0100[diff] [blame]53 .long .Lduct # cr5: primary-aste origin
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]54 .long 0 # cr6: I/O interrupts
55 .long 0 # cr7: secondary space segment table
56 .long 0 # cr8: access registers translation
57 .long 0 # cr9: tracing off
58 .long 0 # cr10: tracing off
59 .long 0 # cr11: tracing off
60 .long 0 # cr12: tracing off
61 .long 0 # cr13: home space segment table
62 .long 0xc0000000 # cr14: machine check handling off
63 .long 0 # cr15: linkage stack operations
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]64.Lmchunk:.long memory_chunk
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]65.Lbss_bgn: .long __bss_start
66.Lbss_end: .long _end
Heiko Carstensb1b70302006-06-29 14:58:17 +0200[diff] [blame]67.Lparmaddr: .long PARMAREA
Heiko Carstensab14de62007-02-05 21:18:37 +0100[diff] [blame]68.Linittu: .long init_thread_union
69.Lstartup_init:
70 .long startup_init
Gerald Schaefer482b05d2007-03-05 23:35:54 +0100[diff] [blame]71 .align 64
72.Lduct: .long 0,0,0,0,.Lduald,0,0,0
73 .long 0,0,0,0,0,0,0,0
74 .align 128
75.Lduald:.rept 8
76 .long 0x80000000,0,0,0 # invalid access-list entries
77 .endr
Martin Schwidefsky1844c9b2010-02-26 22:37:53 +0100[diff] [blame^]78.Lbase_cc:
79 .long sched_clock_base_cc
Heiko Carstense87bfe52006-09-20 15:59:15 +0200[diff] [blame]80
Heiko Carstens615b04b2007-02-21 10:55:37 +0100[diff] [blame]81 .globl _ehead
82_ehead:
Martin Schwidefsky1844c9b2010-02-26 22:37:53 +0100[diff] [blame^]83
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]84#ifdef CONFIG_SHARED_KERNEL
85 .org 0x100000
86#endif
87
88#
Heiko Carstensb1b70302006-06-29 14:58:17 +0200[diff] [blame]89# startup-code, running in absolute addressing mode
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]90#
91 .globl _stext
92_stext: basr %r13,0 # get base
93.LPG3:
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]94# check control registers
95 stctl %c0,%c15,0(%r15)
96 oi 2(%r15),0x40 # enable sigp emergency signal
97 oi 0(%r15),0x10 # switch on low address protection
98 lctl %c0,%c15,0(%r15)
99
100#
101 lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
102 l %r14,.Lstart-.LPG3(%r13)
103 basr %r14,%r14 # call start_kernel
104#
105# We returned from start_kernel ?!? PANIK
106#
107 basr %r13,0
108 lpsw .Ldw-.(%r13) # load disabled wait psw
109#
110 .align 8
111.Ldw: .long 0x000a0000,0x00000000
Heiko Carstens0ad775d2005-11-07 00:59:12 -0800[diff] [blame]112.Lstart:.long start_kernel
113.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0