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Thomas Gleixnerdd87eb32006-06-29 02:24:53 -07001/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
Michael Ellerman7fe37302007-04-18 19:39:21 +100014#include <linux/msi.h>
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070015#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
Eric W. Biederman3a16d712006-10-04 02:16:37 -070021/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010022 * irq_set_chip - set the irq chip for an irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070023 * @irq: irq number
24 * @chip: pointer to irq chip description structure
25 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010026int irq_set_chip(unsigned int irq, struct irq_chip *chip)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070027{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070028 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +010029 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070030
Thomas Gleixner02725e72011-02-12 10:37:36 +010031 if (!desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070032 return -EINVAL;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070033
34 if (!chip)
35 chip = &no_irq_chip;
36
Thomas Gleixner6b8ff312010-10-01 12:58:38 +020037 desc->irq_data.chip = chip;
Thomas Gleixner02725e72011-02-12 10:37:36 +010038 irq_put_desc_unlock(desc, flags);
David Daneyd72274e2011-03-25 12:38:48 -070039 /*
40 * For !CONFIG_SPARSE_IRQ make the irq show up in
41 * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
42 * already marked, and this call is harmless.
43 */
44 irq_reserve_irq(irq);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070045 return 0;
46}
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010047EXPORT_SYMBOL(irq_set_chip);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070048
49/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010050 * irq_set_type - set the irq trigger type for an irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070051 * @irq: irq number
David Brownell0c5d1eb2008-10-01 14:46:18 -070052 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070053 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010054int irq_set_irq_type(unsigned int irq, unsigned int type)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070055{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070056 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +010057 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
Thomas Gleixner02725e72011-02-12 10:37:36 +010058 int ret = 0;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070059
Thomas Gleixner02725e72011-02-12 10:37:36 +010060 if (!desc)
61 return -EINVAL;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070062
David Brownellf2b662d2008-12-01 14:31:38 -080063 type &= IRQ_TYPE_SENSE_MASK;
Thomas Gleixner02725e72011-02-12 10:37:36 +010064 if (type != IRQ_TYPE_NONE)
65 ret = __irq_set_trigger(desc, irq, type);
66 irq_put_desc_busunlock(desc, flags);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070067 return ret;
68}
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010069EXPORT_SYMBOL(irq_set_irq_type);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070070
71/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010072 * irq_set_handler_data - set irq handler data for an irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070073 * @irq: Interrupt number
74 * @data: Pointer to interrupt specific data
75 *
76 * Set the hardware irq controller data for an irq
77 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010078int irq_set_handler_data(unsigned int irq, void *data)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070079{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070080 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +010081 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070082
Thomas Gleixner02725e72011-02-12 10:37:36 +010083 if (!desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070084 return -EINVAL;
Thomas Gleixner6b8ff312010-10-01 12:58:38 +020085 desc->irq_data.handler_data = data;
Thomas Gleixner02725e72011-02-12 10:37:36 +010086 irq_put_desc_unlock(desc, flags);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070087 return 0;
88}
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010089EXPORT_SYMBOL(irq_set_handler_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -070090
91/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010092 * irq_set_msi_desc - set MSI descriptor data for an irq
Eric W. Biederman5b912c12007-01-28 12:52:03 -070093 * @irq: Interrupt number
Randy Dunlap472900b2007-02-16 01:28:25 -080094 * @entry: Pointer to MSI descriptor data
Eric W. Biederman5b912c12007-01-28 12:52:03 -070095 *
Liuweni24b26d42009-11-04 20:11:05 +080096 * Set the MSI descriptor entry for an irq
Eric W. Biederman5b912c12007-01-28 12:52:03 -070097 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +010098int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
Eric W. Biederman5b912c12007-01-28 12:52:03 -070099{
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700100 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100101 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700102
Thomas Gleixner02725e72011-02-12 10:37:36 +0100103 if (!desc)
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700104 return -EINVAL;
Thomas Gleixner6b8ff312010-10-01 12:58:38 +0200105 desc->irq_data.msi_desc = entry;
Michael Ellerman7fe37302007-04-18 19:39:21 +1000106 if (entry)
107 entry->irq = irq;
Thomas Gleixner02725e72011-02-12 10:37:36 +0100108 irq_put_desc_unlock(desc, flags);
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700109 return 0;
110}
111
112/**
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +0100113 * irq_set_chip_data - set irq chip data for an irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700114 * @irq: Interrupt number
115 * @data: Pointer to chip specific data
116 *
117 * Set the hardware irq chip data for an irq
118 */
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +0100119int irq_set_chip_data(unsigned int irq, void *data)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700120{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700121 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100122 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700123
Thomas Gleixner02725e72011-02-12 10:37:36 +0100124 if (!desc)
Yinghai Lu7d94f7c2008-08-19 20:50:14 -0700125 return -EINVAL;
Thomas Gleixner6b8ff312010-10-01 12:58:38 +0200126 desc->irq_data.chip_data = data;
Thomas Gleixner02725e72011-02-12 10:37:36 +0100127 irq_put_desc_unlock(desc, flags);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700128 return 0;
129}
Thomas Gleixnera0cd9ca2011-02-10 11:36:33 +0100130EXPORT_SYMBOL(irq_set_chip_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700131
Thomas Gleixnerf303a6d2010-09-28 17:34:01 +0200132struct irq_data *irq_get_irq_data(unsigned int irq)
133{
134 struct irq_desc *desc = irq_to_desc(irq);
135
136 return desc ? &desc->irq_data : NULL;
137}
138EXPORT_SYMBOL_GPL(irq_get_irq_data);
139
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100140static void irq_state_clr_disabled(struct irq_desc *desc)
141{
Thomas Gleixner801a0e92011-03-27 11:02:49 +0200142 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100143}
144
145static void irq_state_set_disabled(struct irq_desc *desc)
146{
Thomas Gleixner801a0e92011-03-27 11:02:49 +0200147 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100148}
149
Thomas Gleixner6e402622011-02-08 12:36:06 +0100150static void irq_state_clr_masked(struct irq_desc *desc)
151{
Thomas Gleixner32f41252011-03-28 14:10:52 +0200152 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100153}
154
155static void irq_state_set_masked(struct irq_desc *desc)
156{
Thomas Gleixner32f41252011-03-28 14:10:52 +0200157 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100158}
159
Thomas Gleixner46999232011-02-02 21:41:14 +0000160int irq_startup(struct irq_desc *desc)
161{
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100162 irq_state_clr_disabled(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000163 desc->depth = 0;
164
Thomas Gleixner3aae9942011-02-04 10:17:52 +0100165 if (desc->irq_data.chip->irq_startup) {
166 int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100167 irq_state_clr_masked(desc);
Thomas Gleixner3aae9942011-02-04 10:17:52 +0100168 return ret;
169 }
Thomas Gleixner46999232011-02-02 21:41:14 +0000170
Thomas Gleixner87923472011-02-03 12:27:44 +0100171 irq_enable(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000172 return 0;
173}
174
175void irq_shutdown(struct irq_desc *desc)
176{
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100177 irq_state_set_disabled(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000178 desc->depth = 1;
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100179 if (desc->irq_data.chip->irq_shutdown)
180 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
Geert Uytterhoevened585a62011-09-11 13:59:27 +0200181 else if (desc->irq_data.chip->irq_disable)
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100182 desc->irq_data.chip->irq_disable(&desc->irq_data);
183 else
184 desc->irq_data.chip->irq_mask(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100185 irq_state_set_masked(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000186}
187
Thomas Gleixner87923472011-02-03 12:27:44 +0100188void irq_enable(struct irq_desc *desc)
189{
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100190 irq_state_clr_disabled(desc);
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100191 if (desc->irq_data.chip->irq_enable)
192 desc->irq_data.chip->irq_enable(&desc->irq_data);
193 else
194 desc->irq_data.chip->irq_unmask(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100195 irq_state_clr_masked(desc);
Thomas Gleixner87923472011-02-03 12:27:44 +0100196}
197
198void irq_disable(struct irq_desc *desc)
199{
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100200 irq_state_set_disabled(desc);
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100201 if (desc->irq_data.chip->irq_disable) {
202 desc->irq_data.chip->irq_disable(&desc->irq_data);
Thomas Gleixnera61d8252011-02-21 12:54:34 +0100203 irq_state_set_masked(desc);
Thomas Gleixner50f7c032011-02-03 13:23:54 +0100204 }
Thomas Gleixner89d694b2008-02-18 18:25:17 +0100205}
206
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100207void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
208{
209 if (desc->irq_data.chip->irq_enable)
210 desc->irq_data.chip->irq_enable(&desc->irq_data);
211 else
212 desc->irq_data.chip->irq_unmask(&desc->irq_data);
213 cpumask_set_cpu(cpu, desc->percpu_enabled);
214}
215
216void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
217{
218 if (desc->irq_data.chip->irq_disable)
219 desc->irq_data.chip->irq_disable(&desc->irq_data);
220 else
221 desc->irq_data.chip->irq_mask(&desc->irq_data);
222 cpumask_clear_cpu(cpu, desc->percpu_enabled);
223}
224
Thomas Gleixner9205e312010-09-27 12:44:50 +0000225static inline void mask_ack_irq(struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700226{
Thomas Gleixner9205e312010-09-27 12:44:50 +0000227 if (desc->irq_data.chip->irq_mask_ack)
228 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700229 else {
Thomas Gleixnere2c0f8f2010-09-27 12:44:42 +0000230 desc->irq_data.chip->irq_mask(&desc->irq_data);
Thomas Gleixner22a49162010-09-27 12:44:47 +0000231 if (desc->irq_data.chip->irq_ack)
232 desc->irq_data.chip->irq_ack(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700233 }
Thomas Gleixner6e402622011-02-08 12:36:06 +0100234 irq_state_set_masked(desc);
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100235}
236
Thomas Gleixnerd4d5e082011-02-10 13:16:14 +0100237void mask_irq(struct irq_desc *desc)
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100238{
Thomas Gleixnere2c0f8f2010-09-27 12:44:42 +0000239 if (desc->irq_data.chip->irq_mask) {
240 desc->irq_data.chip->irq_mask(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100241 irq_state_set_masked(desc);
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100242 }
243}
244
Thomas Gleixnerd4d5e082011-02-10 13:16:14 +0100245void unmask_irq(struct irq_desc *desc)
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100246{
Thomas Gleixner0eda58b2010-09-27 12:44:44 +0000247 if (desc->irq_data.chip->irq_unmask) {
248 desc->irq_data.chip->irq_unmask(&desc->irq_data);
Thomas Gleixner6e402622011-02-08 12:36:06 +0100249 irq_state_clr_masked(desc);
Thomas Gleixner0b1adaa2010-03-09 19:45:54 +0100250 }
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700251}
252
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200253/*
254 * handle_nested_irq - Handle a nested irq from a irq thread
255 * @irq: the interrupt number
256 *
257 * Handle interrupts which are nested into a threaded interrupt
258 * handler. The handler function is called inside the calling
259 * threads context.
260 */
261void handle_nested_irq(unsigned int irq)
262{
263 struct irq_desc *desc = irq_to_desc(irq);
264 struct irqaction *action;
265 irqreturn_t action_ret;
266
267 might_sleep();
268
Thomas Gleixner239007b2009-11-17 16:46:45 +0100269 raw_spin_lock_irq(&desc->lock);
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200270
271 kstat_incr_irqs_this_cpu(irq, desc);
272
273 action = desc->action;
Thomas Gleixner32f41252011-03-28 14:10:52 +0200274 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data)))
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200275 goto out_unlock;
276
Thomas Gleixner32f41252011-03-28 14:10:52 +0200277 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
Thomas Gleixner239007b2009-11-17 16:46:45 +0100278 raw_spin_unlock_irq(&desc->lock);
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200279
280 action_ret = action->thread_fn(action->irq, action->dev_id);
281 if (!noirqdebug)
282 note_interrupt(irq, desc, action_ret);
283
Thomas Gleixner239007b2009-11-17 16:46:45 +0100284 raw_spin_lock_irq(&desc->lock);
Thomas Gleixner32f41252011-03-28 14:10:52 +0200285 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200286
287out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100288 raw_spin_unlock_irq(&desc->lock);
Thomas Gleixner399b5da2009-08-13 13:21:38 +0200289}
290EXPORT_SYMBOL_GPL(handle_nested_irq);
291
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100292static bool irq_check_poll(struct irq_desc *desc)
293{
Thomas Gleixner6954b752011-02-07 20:55:35 +0100294 if (!(desc->istate & IRQS_POLL_INPROGRESS))
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100295 return false;
296 return irq_wait_for_poll(desc);
297}
298
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700299/**
300 * handle_simple_irq - Simple and software-decoded IRQs.
301 * @irq: the interrupt number
302 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700303 *
304 * Simple interrupts are either sent from a demultiplexing interrupt
305 * handler or come from hardware, where no interrupt hardware control
306 * is necessary.
307 *
308 * Note: The caller is expected to handle the ack, clear, mask and
309 * unmask issues if necessary.
310 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800311void
David Howells7d12e782006-10-05 14:55:46 +0100312handle_simple_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700313{
Thomas Gleixner239007b2009-11-17 16:46:45 +0100314 raw_spin_lock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700315
Thomas Gleixner32f41252011-03-28 14:10:52 +0200316 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100317 if (!irq_check_poll(desc))
318 goto out_unlock;
319
Thomas Gleixner163ef302011-02-08 11:39:15 +0100320 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200321 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700322
Thomas Gleixner32f41252011-03-28 14:10:52 +0200323 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700324 goto out_unlock;
325
Thomas Gleixner107781e2011-02-07 01:21:02 +0100326 handle_irq_event(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700327
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700328out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100329 raw_spin_unlock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700330}
Jonathan Cameronedf76f82011-05-18 10:39:04 +0100331EXPORT_SYMBOL_GPL(handle_simple_irq);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700332
333/**
334 * handle_level_irq - Level type irq handler
335 * @irq: the interrupt number
336 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700337 *
338 * Level type interrupts are active as long as the hardware line has
339 * the active level. This may require to mask the interrupt and unmask
340 * it after the associated handler has acknowledged the device, so the
341 * interrupt line is back to inactive.
342 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800343void
David Howells7d12e782006-10-05 14:55:46 +0100344handle_level_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700345{
Thomas Gleixner239007b2009-11-17 16:46:45 +0100346 raw_spin_lock(&desc->lock);
Thomas Gleixner9205e312010-09-27 12:44:50 +0000347 mask_ack_irq(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700348
Thomas Gleixner32f41252011-03-28 14:10:52 +0200349 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100350 if (!irq_check_poll(desc))
351 goto out_unlock;
352
Thomas Gleixner163ef302011-02-08 11:39:15 +0100353 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200354 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700355
356 /*
357 * If its disabled or no action available
358 * keep it masked and get out of here
359 */
Thomas Gleixner32f41252011-03-28 14:10:52 +0200360 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
Ingo Molnar86998aa2006-09-19 11:14:34 +0200361 goto out_unlock;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700362
Thomas Gleixner15298662011-02-07 01:22:17 +0100363 handle_irq_event(desc);
Thomas Gleixnerb25c3402009-08-13 12:17:22 +0200364
Thomas Gleixner32f41252011-03-28 14:10:52 +0200365 if (!irqd_irq_disabled(&desc->irq_data) && !(desc->istate & IRQS_ONESHOT))
Thomas Gleixner0eda58b2010-09-27 12:44:44 +0000366 unmask_irq(desc);
Ingo Molnar86998aa2006-09-19 11:14:34 +0200367out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100368 raw_spin_unlock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700369}
Ingo Molnar14819ea2009-01-14 12:34:21 +0100370EXPORT_SYMBOL_GPL(handle_level_irq);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700371
Thomas Gleixner78129572011-02-10 15:14:20 +0100372#ifdef CONFIG_IRQ_PREFLOW_FASTEOI
373static inline void preflow_handler(struct irq_desc *desc)
374{
375 if (desc->preflow_handler)
376 desc->preflow_handler(&desc->irq_data);
377}
378#else
379static inline void preflow_handler(struct irq_desc *desc) { }
380#endif
381
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700382/**
Ingo Molnar47c2a3a2006-06-29 02:25:03 -0700383 * handle_fasteoi_irq - irq handler for transparent controllers
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700384 * @irq: the interrupt number
385 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700386 *
Ingo Molnar47c2a3a2006-06-29 02:25:03 -0700387 * Only a single callback will be issued to the chip: an ->eoi()
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700388 * call when the interrupt has been serviced. This enables support
389 * for modern forms of interrupt handlers, which handle the flow
390 * details in hardware, transparently.
391 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800392void
David Howells7d12e782006-10-05 14:55:46 +0100393handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700394{
Thomas Gleixner239007b2009-11-17 16:46:45 +0100395 raw_spin_lock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700396
Thomas Gleixner32f41252011-03-28 14:10:52 +0200397 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100398 if (!irq_check_poll(desc))
399 goto out;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700400
Thomas Gleixner163ef302011-02-08 11:39:15 +0100401 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200402 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700403
404 /*
405 * If its disabled or no action available
Ingo Molnar76d21602007-02-16 01:28:24 -0800406 * then mask it and get out of here:
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700407 */
Thomas Gleixner32f41252011-03-28 14:10:52 +0200408 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
Thomas Gleixner2a0d6fb2011-02-08 12:17:57 +0100409 desc->istate |= IRQS_PENDING;
Thomas Gleixnere2c0f8f2010-09-27 12:44:42 +0000410 mask_irq(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700411 goto out;
Benjamin Herrenschmidt98bb2442006-06-29 02:25:01 -0700412 }
Thomas Gleixnerc69e3752011-03-02 11:49:21 +0100413
414 if (desc->istate & IRQS_ONESHOT)
415 mask_irq(desc);
416
Thomas Gleixner78129572011-02-10 15:14:20 +0100417 preflow_handler(desc);
Thomas Gleixnera7ae4de2011-02-07 01:23:07 +0100418 handle_irq_event(desc);
Thomas Gleixner77694b42011-02-15 10:33:57 +0100419
420out_eoi:
Thomas Gleixner0c5c1552010-09-27 12:44:53 +0000421 desc->irq_data.chip->irq_eoi(&desc->irq_data);
Thomas Gleixner77694b42011-02-15 10:33:57 +0100422out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100423 raw_spin_unlock(&desc->lock);
Thomas Gleixner77694b42011-02-15 10:33:57 +0100424 return;
425out:
426 if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
427 goto out_eoi;
428 goto out_unlock;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700429}
430
431/**
432 * handle_edge_irq - edge type IRQ handler
433 * @irq: the interrupt number
434 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700435 *
436 * Interrupt occures on the falling and/or rising edge of a hardware
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300437 * signal. The occurrence is latched into the irq controller hardware
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700438 * and must be acked in order to be reenabled. After the ack another
439 * interrupt can happen on the same source even before the first one
Uwe Kleine-Königdfff0612010-02-12 21:58:11 +0100440 * is handled by the associated event handler. If this happens it
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700441 * might be necessary to disable (mask) the interrupt depending on the
442 * controller hardware. This requires to reenable the interrupt inside
443 * of the loop which handles the interrupts which have arrived while
444 * the handler was running. If all pending interrupts are handled, the
445 * loop is left.
446 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800447void
David Howells7d12e782006-10-05 14:55:46 +0100448handle_edge_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700449{
Thomas Gleixner239007b2009-11-17 16:46:45 +0100450 raw_spin_lock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700451
Thomas Gleixner163ef302011-02-08 11:39:15 +0100452 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700453 /*
454 * If we're currently running this IRQ, or its disabled,
455 * we shouldn't process the IRQ. Mark it pending, handle
456 * the necessary masking and go out
457 */
Thomas Gleixner32f41252011-03-28 14:10:52 +0200458 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
459 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100460 if (!irq_check_poll(desc)) {
Thomas Gleixner2a0d6fb2011-02-08 12:17:57 +0100461 desc->istate |= IRQS_PENDING;
Thomas Gleixnerfe200ae2011-02-07 10:34:30 +0100462 mask_ack_irq(desc);
463 goto out_unlock;
464 }
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700465 }
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200466 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700467
468 /* Start handling the irq */
Thomas Gleixner22a49162010-09-27 12:44:47 +0000469 desc->irq_data.chip->irq_ack(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700470
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700471 do {
Thomas Gleixnera60a5dc2011-02-07 01:24:07 +0100472 if (unlikely(!desc->action)) {
Thomas Gleixnere2c0f8f2010-09-27 12:44:42 +0000473 mask_irq(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700474 goto out_unlock;
475 }
476
477 /*
478 * When another irq arrived while we were handling
479 * one, we could have masked the irq.
480 * Renable it, if it was not disabled in meantime.
481 */
Thomas Gleixner2a0d6fb2011-02-08 12:17:57 +0100482 if (unlikely(desc->istate & IRQS_PENDING)) {
Thomas Gleixner32f41252011-03-28 14:10:52 +0200483 if (!irqd_irq_disabled(&desc->irq_data) &&
484 irqd_irq_masked(&desc->irq_data))
Thomas Gleixnerc1594b72011-02-07 22:11:30 +0100485 unmask_irq(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700486 }
487
Thomas Gleixnera60a5dc2011-02-07 01:24:07 +0100488 handle_irq_event(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700489
Thomas Gleixner2a0d6fb2011-02-08 12:17:57 +0100490 } while ((desc->istate & IRQS_PENDING) &&
Thomas Gleixner32f41252011-03-28 14:10:52 +0200491 !irqd_irq_disabled(&desc->irq_data));
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700492
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700493out_unlock:
Thomas Gleixner239007b2009-11-17 16:46:45 +0100494 raw_spin_unlock(&desc->lock);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700495}
496
Thomas Gleixner0521c8f2011-03-28 16:13:24 +0200497#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
498/**
499 * handle_edge_eoi_irq - edge eoi type IRQ handler
500 * @irq: the interrupt number
501 * @desc: the interrupt description structure for this irq
502 *
503 * Similar as the above handle_edge_irq, but using eoi and w/o the
504 * mask/unmask logic.
505 */
506void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
507{
508 struct irq_chip *chip = irq_desc_get_chip(desc);
509
510 raw_spin_lock(&desc->lock);
511
512 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
513 /*
514 * If we're currently running this IRQ, or its disabled,
515 * we shouldn't process the IRQ. Mark it pending, handle
516 * the necessary masking and go out
517 */
518 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
519 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
520 if (!irq_check_poll(desc)) {
521 desc->istate |= IRQS_PENDING;
522 goto out_eoi;
523 }
524 }
525 kstat_incr_irqs_this_cpu(irq, desc);
526
527 do {
528 if (unlikely(!desc->action))
529 goto out_eoi;
530
531 handle_irq_event(desc);
532
533 } while ((desc->istate & IRQS_PENDING) &&
534 !irqd_irq_disabled(&desc->irq_data));
535
Stephen Rothwellac0e0442011-03-30 10:55:12 +1100536out_eoi:
Thomas Gleixner0521c8f2011-03-28 16:13:24 +0200537 chip->irq_eoi(&desc->irq_data);
538 raw_spin_unlock(&desc->lock);
539}
540#endif
541
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700542/**
Liuweni24b26d42009-11-04 20:11:05 +0800543 * handle_percpu_irq - Per CPU local irq handler
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700544 * @irq: the interrupt number
545 * @desc: the interrupt description structure for this irq
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700546 *
547 * Per CPU interrupts on SMP machines without locking requirements
548 */
Harvey Harrison7ad5b3a2008-02-08 04:19:53 -0800549void
David Howells7d12e782006-10-05 14:55:46 +0100550handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700551{
Thomas Gleixner35e857c2011-02-10 12:20:23 +0100552 struct irq_chip *chip = irq_desc_get_chip(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700553
Thomas Gleixnerd6c88a52008-10-15 15:27:23 +0200554 kstat_incr_irqs_this_cpu(irq, desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700555
Thomas Gleixner849f0612011-02-07 01:25:41 +0100556 if (chip->irq_ack)
557 chip->irq_ack(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700558
Thomas Gleixner849f0612011-02-07 01:25:41 +0100559 handle_irq_event_percpu(desc, desc->action);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700560
Thomas Gleixner849f0612011-02-07 01:25:41 +0100561 if (chip->irq_eoi)
562 chip->irq_eoi(&desc->irq_data);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700563}
564
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100565/**
566 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
567 * @irq: the interrupt number
568 * @desc: the interrupt description structure for this irq
569 *
570 * Per CPU interrupts on SMP machines without locking requirements. Same as
571 * handle_percpu_irq() above but with the following extras:
572 *
573 * action->percpu_dev_id is a pointer to percpu variables which
574 * contain the real device id for the cpu on which this handler is
575 * called
576 */
577void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc)
578{
579 struct irq_chip *chip = irq_desc_get_chip(desc);
580 struct irqaction *action = desc->action;
581 void *dev_id = __this_cpu_ptr(action->percpu_dev_id);
582 irqreturn_t res;
583
584 kstat_incr_irqs_this_cpu(irq, desc);
585
586 if (chip->irq_ack)
587 chip->irq_ack(&desc->irq_data);
588
589 trace_irq_handler_entry(irq, action);
590 res = action->handler(irq, dev_id);
591 trace_irq_handler_exit(irq, action, res);
592
593 if (chip->irq_eoi)
594 chip->irq_eoi(&desc->irq_data);
595}
596
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700597void
Thomas Gleixner3836ca02011-02-14 20:09:19 +0100598__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
Ingo Molnara460e742006-10-17 00:10:03 -0700599 const char *name)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700600{
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700601 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100602 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700603
Thomas Gleixner02725e72011-02-12 10:37:36 +0100604 if (!desc)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700605 return;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700606
Thomas Gleixner091738a2011-02-14 20:16:43 +0100607 if (!handle) {
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700608 handle = handle_bad_irq;
Thomas Gleixner091738a2011-02-14 20:16:43 +0100609 } else {
610 if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
Thomas Gleixner02725e72011-02-12 10:37:36 +0100611 goto out;
Thomas Gleixnerf8b54732006-07-01 22:30:08 +0100612 }
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700613
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700614 /* Uninstall? */
615 if (handle == handle_bad_irq) {
Thomas Gleixner6b8ff312010-10-01 12:58:38 +0200616 if (desc->irq_data.chip != &no_irq_chip)
Thomas Gleixner9205e312010-09-27 12:44:50 +0000617 mask_ack_irq(desc);
Thomas Gleixner801a0e92011-03-27 11:02:49 +0200618 irq_state_set_disabled(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700619 desc->depth = 1;
620 }
621 desc->handle_irq = handle;
Ingo Molnara460e742006-10-17 00:10:03 -0700622 desc->name = name;
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700623
624 if (handle != handle_bad_irq && is_chained) {
Thomas Gleixner1ccb4e62011-02-09 14:44:17 +0100625 irq_settings_set_noprobe(desc);
626 irq_settings_set_norequest(desc);
Paul Mundt7f1b1242011-04-07 06:01:44 +0900627 irq_settings_set_nothread(desc);
Thomas Gleixner46999232011-02-02 21:41:14 +0000628 irq_startup(desc);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700629 }
Thomas Gleixner02725e72011-02-12 10:37:36 +0100630out:
631 irq_put_desc_busunlock(desc, flags);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700632}
Thomas Gleixner3836ca02011-02-14 20:09:19 +0100633EXPORT_SYMBOL_GPL(__irq_set_handler);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700634
635void
Thomas Gleixner3836ca02011-02-14 20:09:19 +0100636irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
Ingo Molnara460e742006-10-17 00:10:03 -0700637 irq_flow_handler_t handle, const char *name)
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700638{
Thomas Gleixner35e857c2011-02-10 12:20:23 +0100639 irq_set_chip(irq, chip);
Thomas Gleixner3836ca02011-02-14 20:09:19 +0100640 __irq_set_handler(irq, handle, 0, name);
Thomas Gleixnerdd87eb32006-06-29 02:24:53 -0700641}
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800642
Thomas Gleixner44247182010-09-28 10:40:18 +0200643void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800644{
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800645 unsigned long flags;
Marc Zyngier31d9d9b2011-09-23 17:03:06 +0100646 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800647
Thomas Gleixner44247182010-09-28 10:40:18 +0200648 if (!desc)
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800649 return;
Thomas Gleixnera0056772011-02-08 17:11:03 +0100650 irq_settings_clr_and_set(desc, clr, set);
651
Thomas Gleixner876dbd42011-02-08 17:28:12 +0100652 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
Thomas Gleixnere1ef8242011-02-10 22:25:31 +0100653 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
Thomas Gleixnera0056772011-02-08 17:11:03 +0100654 if (irq_settings_has_no_balance_set(desc))
655 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
656 if (irq_settings_is_per_cpu(desc))
657 irqd_set(&desc->irq_data, IRQD_PER_CPU);
Thomas Gleixnere1ef8242011-02-10 22:25:31 +0100658 if (irq_settings_can_move_pcntxt(desc))
659 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
Thomas Gleixner0ef5ca12011-03-28 21:59:37 +0200660 if (irq_settings_is_level(desc))
661 irqd_set(&desc->irq_data, IRQD_LEVEL);
Thomas Gleixnera0056772011-02-08 17:11:03 +0100662
Thomas Gleixner876dbd42011-02-08 17:28:12 +0100663 irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
664
Thomas Gleixner02725e72011-02-12 10:37:36 +0100665 irq_put_desc_unlock(desc, flags);
Ralf Baechle46f4f8f2008-02-08 04:22:01 -0800666}
Jonathan Cameronedf76f82011-05-18 10:39:04 +0100667EXPORT_SYMBOL_GPL(irq_modify_status);
David Daney0fdb4b22011-03-25 12:38:49 -0700668
669/**
670 * irq_cpu_online - Invoke all irq_cpu_online functions.
671 *
672 * Iterate through all irqs and invoke the chip.irq_cpu_online()
673 * for each.
674 */
675void irq_cpu_online(void)
676{
677 struct irq_desc *desc;
678 struct irq_chip *chip;
679 unsigned long flags;
680 unsigned int irq;
681
682 for_each_active_irq(irq) {
683 desc = irq_to_desc(irq);
684 if (!desc)
685 continue;
686
687 raw_spin_lock_irqsave(&desc->lock, flags);
688
689 chip = irq_data_get_irq_chip(&desc->irq_data);
Thomas Gleixnerb3d42232011-03-27 16:05:36 +0200690 if (chip && chip->irq_cpu_online &&
691 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
Thomas Gleixner32f41252011-03-28 14:10:52 +0200692 !irqd_irq_disabled(&desc->irq_data)))
David Daney0fdb4b22011-03-25 12:38:49 -0700693 chip->irq_cpu_online(&desc->irq_data);
694
695 raw_spin_unlock_irqrestore(&desc->lock, flags);
696 }
697}
698
699/**
700 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
701 *
702 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
703 * for each.
704 */
705void irq_cpu_offline(void)
706{
707 struct irq_desc *desc;
708 struct irq_chip *chip;
709 unsigned long flags;
710 unsigned int irq;
711
712 for_each_active_irq(irq) {
713 desc = irq_to_desc(irq);
714 if (!desc)
715 continue;
716
717 raw_spin_lock_irqsave(&desc->lock, flags);
718
719 chip = irq_data_get_irq_chip(&desc->irq_data);
Thomas Gleixnerb3d42232011-03-27 16:05:36 +0200720 if (chip && chip->irq_cpu_offline &&
721 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
Thomas Gleixner32f41252011-03-28 14:10:52 +0200722 !irqd_irq_disabled(&desc->irq_data)))
David Daney0fdb4b22011-03-25 12:38:49 -0700723 chip->irq_cpu_offline(&desc->irq_data);
724
725 raw_spin_unlock_irqrestore(&desc->lock, flags);
726 }
727}