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Andy Gross5d144e32014-04-24 11:31:21 -05001#
2# QCOM Soc drivers
3#
Channagoud Kadabi7e8d55a2016-08-23 14:04:44 -07004config QCOM_CPUSS_DUMP
5 bool "CPU Subsystem Dumping support"
6 help
7 Add support to dump various hardware entities such as the instruction
8 and data tlb's as well as the unified tlb, which are a part of the
9 cpu subsystem to an allocated buffer. This allows for analysis of the
10 the entities if corruption is suspected.
11 If unsure, say N
12
Kyle Yan36d78702016-08-23 16:07:11 -070013config QCOM_RUN_QUEUE_STATS
14 bool "Enable collection and exporting of QTI Run Queue stats to userspace"
15 help
16 This option enables the driver to periodically collecting the statistics
17 of kernel run queue information and calculate the load of the system.
18 This information is exported to usespace via sysfs entries and userspace
19 algorithms uses info and decide when to turn on/off the cpu cores.
20
Andy Gross5d144e32014-04-24 11:31:21 -050021config QCOM_GSBI
22 tristate "QCOM General Serial Bus Interface"
23 depends on ARCH_QCOM
Andy Grosse5fdad62015-02-09 16:01:06 -060024 select MFD_SYSCON
Andy Gross5d144e32014-04-24 11:31:21 -050025 help
26 Say y here to enable GSBI support. The GSBI provides control
27 functions for connecting the underlying serial UART, SPI, and I2C
28 devices to the output pins.
29
Channagoud Kadabi97335b22016-08-17 13:40:46 -070030config QCOM_LLCC
31 tristate "Qualcomm Technologies, Inc. LLCC driver"
32 depends on ARCH_QCOM
33 help
34 Qualcomm Technologies, Inc. platform specific LLCC driver for Last
35 Level Cache. This provides interfaces to client's that use the LLCC.
36 Say yes here to enable LLCC slice driver.
37
Kyle Yan6a20fae2017-02-14 13:34:41 -080038config QCOM_SDM845_LLCC
39 tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver"
Channagoud Kadabib1fec942016-08-17 17:00:26 -070040 depends on QCOM_LLCC
41 help
Kyle Yan6a20fae2017-02-14 13:34:41 -080042 Say yes here to enable the LLCC driver for SDM845. This is provides
Channagoud Kadabib1fec942016-08-17 17:00:26 -070043 data required to configure LLCC so that clients can start using the
44 LLCC slices.
45
Imran Khan1b223902016-09-21 17:11:58 +053046config QCOM_LLCC_AMON
47 tristate "Qualcomm Technologies, Inc. LLCC Activity Monitor(AMON) driver"
48 depends on QCOM_LLCC
49 help
50 This option enables a activity monitor driver for last level cache
51 controller. This driver configures the activity monitor as
52 deadlock detector and dumps the AMON registers upon detection of
53 deadlock.
54
55config QCOM_LLCC_AMON_PANIC
56 tristate "Panic on detecting LLCC Activity Monitor(AMON) error"
57 depends on QCOM_LLCC_AMON
58 help
59 This option enables panic upon detection of LLCC Activity Monitor(AMON)
60 errors. Say yes here to enable deadlock detection mode of AMON. In
61 deadlock detection mode AMON will trigger an interrupt if some LLCC request
62 ages out.
63
Lina Iyer7ce75bb2015-04-09 13:20:41 -060064config QCOM_PM
65 bool "Qualcomm Power Management"
66 depends on ARCH_QCOM && !ARM64
Arnd Bergmannd9d68882015-11-24 23:13:09 +010067 select ARM_CPU_SUSPEND
Lina Iyer23b38ce2015-07-10 14:18:00 -060068 select QCOM_SCM
Lina Iyer7ce75bb2015-04-09 13:20:41 -060069 help
70 QCOM Platform specific power driver to manage cores and L2 low power
71 modes. It interface with various system drivers to put the cores in
72 low power modes.
Bjorn Andersson4b638df42015-06-26 14:50:10 -070073
Stephen Boyd7d0c8be2015-08-28 11:23:33 -070074config QCOM_SMEM
75 tristate "Qualcomm Shared Memory Manager (SMEM)"
76 depends on ARCH_QCOM
Arnd Bergmann73ebb852015-10-13 17:05:39 +020077 depends on HWSPINLOCK
Stephen Boyd7d0c8be2015-08-28 11:23:33 -070078 help
79 Say y here to enable support for the Qualcomm Shared Memory Manager.
80 The driver provides an interface to items in a heap shared among all
81 processors in a Qualcomm platform.
82
Channagoud Kadabi4d480b02016-12-20 11:57:51 -080083config MSM_SERVICE_LOCATOR
84 bool "Service Locator"
85 depends on MSM_QMI_INTERFACE
86 help
87 The Service Locator provides a library to retrieve location
88 information given a service identifier. Location here translates
89 to what process domain exports the service, and which subsystem
90 that process domain will execute in.
91
92config MSM_SERVICE_NOTIFIER
93 bool "Service Notifier"
94 depends on MSM_SERVICE_LOCATOR && MSM_SUBSYSTEM_RESTART
95 help
96 The Service Notifier provides a library for a kernel client to
97 register for state change notifications regarding a remote service.
98 A remote service here refers to a process providing certain services
99 like audio, the identifier for which is provided by the service
100 locator.
101
Bjorn Anderssonf2ab3292015-07-27 20:20:30 -0700102config QCOM_SMD
103 tristate "Qualcomm Shared Memory Driver (SMD)"
104 depends on QCOM_SMEM
105 help
106 Say y here to enable support for the Qualcomm Shared Memory Driver
107 providing communication channels to remote processors in Qualcomm
108 platforms.
109
Bjorn Andersson936f14c2015-07-27 20:20:32 -0700110config QCOM_SMD_RPM
111 tristate "Qualcomm Resource Power Manager (RPM) over SMD"
112 depends on QCOM_SMD && OF
113 help
114 If you say yes to this option, support will be included for the
115 Resource Power Manager system found in the Qualcomm 8974 based
116 devices.
117
118 This is required to access many regulators, clocks and bus
119 frequencies controlled by the RPM on these devices.
120
121 Say M here if you want to include support for the Qualcomm RPM as a
122 module. This will build a module called "qcom-smd-rpm".
Bjorn Andersson9460ae22015-09-24 18:25:01 -0700123
Channagoud Kadabieee0ffd2016-08-11 14:18:17 -0700124config QCOM_SCM
125 bool "Secure Channel Manager (SCM) support"
126 default n
127
Bjorn Andersson9460ae22015-09-24 18:25:01 -0700128config QCOM_SMEM_STATE
129 bool
Bjorn Anderssonc97c4092015-09-24 18:25:02 -0700130
Bjorn Andersson50e99642015-09-24 18:25:03 -0700131config QCOM_SMP2P
Arnd Bergmann10475d52015-11-20 11:32:21 +0100132 tristate "Qualcomm Shared Memory Point to Point support"
Bjorn Andersson50e99642015-09-24 18:25:03 -0700133 depends on QCOM_SMEM
134 select QCOM_SMEM_STATE
135 help
136 Say yes here to support the Qualcomm Shared Memory Point to Point
137 protocol.
138
Bjorn Anderssonc97c4092015-09-24 18:25:02 -0700139config QCOM_SMSM
Arnd Bergmann10475d52015-11-20 11:32:21 +0100140 tristate "Qualcomm Shared Memory State Machine"
Bjorn Anderssonc97c4092015-09-24 18:25:02 -0700141 depends on QCOM_SMEM
142 select QCOM_SMEM_STATE
143 help
144 Say yes here to support the Qualcomm Shared Memory State Machine.
145 The state machine is represented by bits in shared memory.
Bjorn Anderssonea7a1f22015-09-21 10:52:55 -0700146
147config QCOM_WCNSS_CTRL
148 tristate "Qualcomm WCNSS control driver"
149 depends on QCOM_SMD
150 help
151 Client driver for the WCNSS_CTRL SMD channel, used to download nv
152 firmware to a newly booted WCNSS chip.
Kyle Yanbf6dedf2016-08-19 16:47:30 -0700153
Channagoud Kadabi0fb6cf62016-08-23 15:12:52 -0700154config MSM_BOOT_STATS
155 bool "Use MSM boot stats reporting"
156 help
157 Use this to report msm boot stats such as bootloader throughput,
158 display init, total boot time.
159 This figures are reported in mpm sleep clock cycles and have a
160 resolution of 31 bits as 1 bit is used as an overflow check.
161
Kyle Yana6029442016-08-19 17:07:58 -0700162config MSM_CORE_HANG_DETECT
163 tristate "MSM Core Hang Detection Support"
164 help
165 This enables the core hang detection module. It causes SoC
166 reset on core hang detection and collects the core context
167 for hang.
168
Kyle Yanbf6dedf2016-08-19 16:47:30 -0700169config MSM_GLADIATOR_HANG_DETECT
170 tristate "MSM Gladiator Hang Detection Support"
171 help
172 This enables the gladiator hang detection module.
173 If the configured threshold is reached, it causes SoC reset on
174 gladiator hang detection and collects the context for the
175 gladiator hang.
Kyle Yancc90ead2016-08-19 16:53:28 -0700176
Kyle Yan3a641f42016-11-21 14:00:04 -0800177config MSM_GLADIATOR_ERP
178 tristate "GLADIATOR coherency interconnect error reporting driver"
Kyle Yancc90ead2016-08-19 16:53:28 -0700179 help
180 Support dumping debug information for the GLADIATOR
181 cache interconnect in the error interrupt handler.
182 Meant to be used for debug scenarios only.
183
184 If unsure, say N.
185
Kyle Yan3a641f42016-11-21 14:00:04 -0800186config PANIC_ON_GLADIATOR_ERROR
187 depends on MSM_GLADIATOR_ERP
188 bool "Panic on GLADIATOR error report"
Kyle Yancc90ead2016-08-19 16:53:28 -0700189 help
190 Panic upon detection of an Gladiator coherency interconnect error
191 in order to support dumping debug information.
192 Meant to be used for debug scenarios only.
193
194 If unsure, say N.
Satyajit Desai5255cea2016-08-04 16:02:50 -0700195
Satya Durga Srinivasu Prabhala60909002016-09-12 11:36:09 -0700196config QCOM_EUD
197 tristate "QTI Embedded USB Debugger (EUD)"
198 depends on ARCH_QCOM
199 select SERIAL_CORE
200 help
201 The EUD (Embedded USB Debugger) is a mini-USB hub implemented
202 on chip to support the USB-based debug and trace capabilities.
203 This module enables support for Qualcomm Technologies, Inc.
204 Embedded USB Debugger (EUD).
205
206 If unsure, say N.
207
Satyajit Desai5255cea2016-08-04 16:02:50 -0700208config QCOM_WATCHDOG_V2
209 bool "Qualcomm Watchdog Support"
210 depends on ARCH_QCOM
211 help
212 This enables the watchdog module. It causes kernel panic if the
213 watchdog times out. It allows for detection of cpu hangs and
214 deadlocks. It does not run during the bootup process, so it will
215 not catch any early lockups.
Satyajit Desai11e470c2016-08-10 15:36:45 -0700216
Kiran Gunda04967c82017-02-14 14:22:18 +0530217config QPNP_PBS
218 tristate "PBS trigger support for QPNP PMIC"
219 depends on SPMI
220 help
221 This driver supports configuring software PBS trigger event through PBS
222 RAM on Qualcomm Technologies, Inc. QPNP PMICs. This module provides
223 the APIs to the client drivers that wants to send the PBS trigger
224 event to the PBS RAM.
225
Satyajit Desai11e470c2016-08-10 15:36:45 -0700226config QCOM_MEMORY_DUMP_V2
227 bool "QCOM Memory Dump V2 Support"
228 help
229 This enables memory dump feature. It allows various client
230 subsystems to register respective dump regions. At the time
231 of deadlocks or cpu hangs these dump regions are captured to
232 give a snapshot of the system at the time of the crash.
David Dai87584a42016-09-01 17:13:35 -0700233
234config QCOM_BUS_SCALING
235 bool "Bus scaling driver"
236 help
237 This option enables bus scaling on MSM devices. Bus scaling
238 allows devices to request the clocks be set to rates sufficient
239 for the active devices needs without keeping the clocks at max
240 frequency when a slower speed is sufficient.
Chris Lewb4791c32016-08-01 11:58:55 -0700241
David Dai04ce4202016-09-26 16:24:13 -0700242config QCOM_BUS_CONFIG_RPMH
243 bool "RPMH Bus scaling driver"
244 depends on QCOM_BUS_SCALING
245 help
246 This option enables bus scaling using QCOM specific hardware
247 accelerators. It enables the translation of bandwidth requests
248 from logical nodes to hardware nodes controlled by the BCM (Bus
249 Clock Manager)
250
Patrick Dalya125d5d2016-09-30 16:16:10 -0700251config QCOM_SECURE_BUFFER
252 bool "Helper functions for securing buffers through TZ"
253 help
254 Say 'Y' here for targets that need to call into TZ to secure
255 memory buffers. This ensures that only the correct clients can
256 use this memory and no unauthorized access is made to the
257 buffer
258
Laura Abbott130e1d02013-08-09 18:17:06 -0700259config QCOM_EARLY_RANDOM
260 bool "Initialize random pool very early"
261 help
262 The standard random pool may not initialize until late in the boot
263 process which means that any calls to get random numbers before then
264 may not be truly random. Select this option to make an early call
265 to get some random data to put in the pool. If unsure, say N.
266
Chris Lewb4791c32016-08-01 11:58:55 -0700267config MSM_SMEM
268 depends on ARCH_QCOM
269 depends on REMOTE_SPINLOCK_MSM
270 bool "MSM Shared Memory (SMEM)"
271 help
272 Support for the shared memory interface between the various
273 processors in the System on a Chip (SoC) which allows basic
274 inter-processor communication.
Chris Lewfa6135e2016-08-01 13:29:46 -0700275
276config MSM_GLINK
277 bool "Generic Link (G-Link)"
278 help
279 G-Link is a generic link transport that replaces SMD. It is used
280 within a System-on-Chip (SoC) for communication between both internal
281 processors and external peripherals. The actual physical transport
282 is handled by transport plug-ins that can be individually enabled and
283 configured separately.
284
285config MSM_GLINK_LOOPBACK_SERVER
286 bool "Generic Link (G-Link) Loopback Server"
287 help
288 G-Link Loopback Server that enable loopback test framework to test
289 and validate the G-Link protocol stack. It support both local and
290 remote clients to configure the loopback server and echo back the
291 data received from the clients.
292
293config MSM_GLINK_SMEM_NATIVE_XPRT
294 depends on MSM_SMEM
295 depends on MSM_GLINK
296 bool "Generic Link (G-Link) SMEM Native Transport"
297 help
298 G-Link SMEM Native Transport is a G-Link Transport plug-in. It allows
299 G-Link communication to remote entities through a shared memory
300 physical transport. The nature of shared memory limits this G-Link
301 transport to only connecting with entities internal to the
302 System-on-Chip.
303
304config MSM_GLINK_SPI_XPRT
305 depends on MSM_GLINK
306 tristate "Generic Link (G-Link) SPI Transport"
307 help
308 G-Link SPI Transport is a Transport plug-in developed over SPI
309 bus. This transport plug-in performs marshaling of G-Link
310 commands & data to the appropriate SPI bus wire format and
311 allows for G-Link communication with remote subsystems that are
312 external to the System-on-Chip.
313
Kineret Berger5bb47422017-02-09 11:51:32 +0200314config MSM_SPCOM
315 depends on MSM_GLINK
316 bool "Secure Processor Communication over GLINK"
317 help
318 spcom driver allows loading Secure Processor Applications and
319 sending messages to Secure Processor Applications.
320 spcom provides interface to both user space app and kernel driver.
321 It is using glink as the transport layer, which provides multiple
322 logical channels over single physical channel.
323 The physical layer is based on shared memory and interrupts.
324 spcom provides clients/server API, although currently only one client
325 or server is allowed per logical channel.
326
Chris Lewfa6135e2016-08-01 13:29:46 -0700327config TRACER_PKT
328 bool "Tracer Packet"
329 help
330 Tracer Packet helps in profiling the performance of inter-
331 processor communication protocols. The profiling information
332 can be logged into the tracer packet itself.
Lina Iyerd7194ff2016-04-20 17:13:34 -0600333
334config QTI_RPMH_API
335 bool "QTI RPMH (h/w accelerators) Communication API"
336 select MAILBOX
337 select QTI_RPMH_MBOX
Lina Iyer15d6df32016-08-18 12:10:27 -0600338 select QTI_SYSTEM_PM
Lina Iyerd7194ff2016-04-20 17:13:34 -0600339 help
340 This option enables RPMH hardware communication for making shared
341 resource requests on Qualcomm Technologies Inc SoCs.
Lina Iyer15d6df32016-08-18 12:10:27 -0600342
343config QTI_SYSTEM_PM
344 bool
Karthikeyan Ramasubramanian97a10282016-09-16 12:01:18 -0600345
346config MSM_SMP2P
347 bool "SMSM Point-to-Point (SMP2P)"
348 depends on MSM_SMEM
349 help
350 Provide point-to-point remote signaling support.
351 SMP2P enables transferring 32-bit values between
352 the local and a remote system using shared
353 memory and interrupts. A client can open multiple
354 32-bit values by specifying a unique string and
355 remote processor ID.
356
357config MSM_SMP2P_TEST
358 bool "SMSM Point-to-Point Test"
359 depends on MSM_SMP2P
360 help
361 Enables loopback and unit testing support for
362 SMP2P. Loopback support is used by other
363 processors to do unit testing. Unit tests
364 are used to verify the local and remote
365 implementations.
Karthikeyan Ramasubramanian9f9c4a72016-10-18 14:06:18 -0600366
367config MSM_IPC_ROUTER_SMD_XPRT
368 depends on MSM_SMD
369 depends on IPC_ROUTER
370 bool "MSM SMD XPRT Layer"
371 help
372 SMD Transport Layer that enables IPC Router communication within
373 a System-on-Chip(SoC). When the SMD channels become available,
374 this layer registers a transport with IPC Router and enable
375 message exchange.
Karthikeyan Ramasubramanianf0d46a82016-09-16 16:43:51 -0600376
377config MSM_IPC_ROUTER_HSIC_XPRT
378 depends on USB_QCOM_IPC_BRIDGE
379 depends on IPC_ROUTER
380 bool "MSM HSIC XPRT Layer"
381 help
382 HSIC Transport Layer that enables off-chip communication of
383 IPC Router. When the HSIC endpoint becomes available, this layer
384 registers the transport with IPC Router and enable message
385 exchange.
Karthikeyan Ramasubramanianbf94cab2016-09-16 16:50:04 -0600386
387config MSM_IPC_ROUTER_MHI_XPRT
388 depends on MSM_MHI
389 depends on IPC_ROUTER
390 bool "MSM MHI XPRT Layer"
391 help
392 MHI Transport Layer that enables off-chip communication of
393 IPC Router. When the MHI endpoint becomes available, this layer
394 registers the transport with IPC Router and enable message
395 exchange.
Karthikeyan Ramasubramanian4f4074f2016-09-16 16:53:30 -0600396
397config MSM_IPC_ROUTER_GLINK_XPRT
398 depends on MSM_GLINK
399 depends on IPC_ROUTER
400 bool "MSM GLINK XPRT Layer"
401 help
402 GLINK Transport Layer that enables IPC Router communication within
403 a System-on-Chip(SoC). When the GLINK channels become available,
404 this layer registers a transport with IPC Router and enable
405 message exchange.
Karthikeyan Ramasubramanianfafd67f12016-09-16 17:15:13 -0600406
407config MSM_QMI_INTERFACE
408 depends on IPC_ROUTER
409 depends on QMI_ENCDEC
410 bool "MSM QMI Interface Library"
411 help
412 Library to send and receive QMI messages over IPC Router.
413 This library provides interface functions to the kernel drivers
414 to perform QMI message marshaling and transport them over IPC
415 Router.
Karthikeyan Ramasubramanian5d797a82016-09-16 17:56:18 -0600416
417config MSM_GLINK_PKT
418 bool "Enable device interface for GLINK packet channels"
419 depends on MSM_GLINK
420 help
421 G-link packet driver provides the interface for the userspace
422 clients to communicate over G-Link via device nodes.
423 This enable the userspace clients to read and write to
424 some glink packets channel.
Karthikeyan Ramasubramanian04e3f902016-09-19 09:24:36 -0600425
426config MSM_SYSTEM_HEALTH_MONITOR
427 bool "System Health Monitor"
428 depends on MSM_QMI_INTERFACE && MSM_SUBSYSTEM_RESTART
429 help
430 System Health Monitor (SHM) passively monitors the health of the
431 peripherals connected to the application processor. Software
432 components in the application processor that experience
433 communication failure can request the SHM to perform a system-wide
434 health check. If any failures are detected during the health-check,
435 then a subsystem restart will be triggered for the failed subsystem.
Kyle Yane45fa022016-08-29 11:40:26 -0700436
437config MSM_SUBSYSTEM_RESTART
438 bool "MSM Subsystem Restart"
439 help
440 This option enables the MSM subsystem restart framework.
441
442 The MSM subsystem restart framework provides support to boot,
443 shutdown, and restart subsystems with a reference counted API.
444 It also notifies userspace of transitions between these states via
445 sysfs.
446
447config MSM_PIL
448 bool "Peripheral image loading"
449 select FW_LOADER
450 default n
451 help
452 Some peripherals need to be loaded into memory before they can be
453 brought out of reset.
454
455 Say yes to support these devices.
456
457config MSM_SYSMON_GLINK_COMM
458 bool "MSM System Monitor communication support using GLINK transport"
459 depends on MSM_GLINK && MSM_SUBSYSTEM_RESTART
460 help
461 This option adds support for MSM System Monitor APIs using the GLINK
462 transport layer. The APIs provided may be used for notifying
463 subsystems within the SoC about other subsystems' power-up/down
464 state-changes.
465
466config MSM_PIL_SSR_GENERIC
467 tristate "MSM Subsystem Boot Support"
468 depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
469 help
470 Support for booting and shutting down MSM Subsystem processors.
471 This driver also monitors the SMSM status bits and the watchdog
472 interrupt for the subsystem and restarts it on a watchdog bite
473 or a fatal error. Subsystems include LPASS, Venus, VPU, WCNSS and
474 BCSS.
475
476config MSM_PIL_MSS_QDSP6V5
477 tristate "MSS QDSP6v5 (Hexagon) Boot Support"
478 depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
479 help
480 Support for booting and shutting down QDSP6v5 (Hexagon) processors
481 in modem subsystems. If you would like to make or receive phone
482 calls then say Y here.
483
484 If unsure, say N.
Yuanyuan Liu607051c2016-11-28 17:04:13 -0800485
486config ICNSS
487 tristate "Platform driver for Q6 integrated connectivity"
488 ---help---
489 This module adds support for Q6 integrated WLAN connectivity
490 subsystem. This module is responsible for communicating WLAN on/off
491 control messages to FW over QMI channel. It is also responsible for
492 handling WLAN PD restart notifications.
493
494config ICNSS_DEBUG
495 bool "ICNSS debug support"
496 depends on ICNSS
497 ---help---
498 Say 'Y' here to enable ICNSS driver debug support. Debug support
499 primarily consists of logs consisting of information related to
500 hardware register access and enabling BUG_ON for certain cases to aid
Mahesh Sivasubramaniancb649522016-08-19 14:04:44 -0600501 the debugging.
502
503config QCOM_COMMAND_DB
504 bool "Command DB"
505 help
506 Command DB queries shared memory by key string for shared system
507 resources
Banajit Goswamiaec1b462016-11-21 21:54:23 -0800508
Banajit Goswami0fd7f0a2017-02-01 12:33:57 -0800509config MSM_QDSP6_APRV2_GLINK
510 bool "Audio QDSP6 APRv2 Over Glink support"
511 depends on MSM_GLINK
Banajit Goswamiaec1b462016-11-21 21:54:23 -0800512 help
513 Enable APRv2 IPC protocol support between
514 application processor and QDSP6. APR is
515 used by audio driver to configure QDSP6's
516 ASM, ADM and AFE.
517
Banajit Goswami0fd7f0a2017-02-01 12:33:57 -0800518config MSM_QDSP6_APRV3_GLINK
519 bool "Audio QDSP6 APRv3 Over Glink support"
520 depends on MSM_GLINK
Banajit Goswamiaec1b462016-11-21 21:54:23 -0800521 help
522 Enable APRv3 IPC protocol support between
523 application processor and QDSP6. APR is
524 used by audio driver to configure QDSP6v2's
525 ASM, ADM and AFE.
526
527config MSM_ADSP_LOADER
528 tristate "ADSP loader support"
529 select SND_SOC_MSM_APRV2_INTF
Banajit Goswami0fd7f0a2017-02-01 12:33:57 -0800530 depends on MSM_QDSP6_APRV2_GLINK || MSM_QDSP6_APRV3_GLINK
Banajit Goswamiaec1b462016-11-21 21:54:23 -0800531 help
532 Enable ADSP image loader.
533 The ADSP loader brings ADSP out of reset
534 for the platforms that use APRv2.
535 Say M if you want to enable this module.
536
Sathish Ambley5a8b3102017-01-23 09:56:24 -0800537config MSM_CDSP_LOADER
538 tristate "CDSP loader support"
539 depends on MSM_GLINK
540 help
541 Enable CDSP image loader.
542 The CDSP loader brings CDSP out of reset
543 for platforms that have compute DSP.
544 Say M if you want to enable this module.
545
Banajit Goswamiaec1b462016-11-21 21:54:23 -0800546config MSM_AVTIMER
547 tristate "Avtimer Driver"
Banajit Goswami0fd7f0a2017-02-01 12:33:57 -0800548 depends on MSM_QDSP6_APRV2_GLINK || MSM_QDSP6_APRV3_GLINK
Banajit Goswamiaec1b462016-11-21 21:54:23 -0800549 help
550 This driver gets the Q6 out of power collapsed state and
551 exposes ioctl control to read avtimer tick.
Banajit Goswamide8271c2017-01-18 00:28:59 -0800552
553config WCD_DSP_GLINK
554 tristate "WCD DSP GLINK Driver"
555 depends on MSM_GLINK
556 default y if SND_SOC_WCD934X=y
557 help
558 This option enables driver which provides communication interface
559 between MSM and WCD DSP over glink transport protocol. This driver
560 provides read and write interface via char device.
Mahesh Sivasubramanianc2ea76f2016-02-01 10:40:26 -0700561
562config MSM_EVENT_TIMER
563 bool "Event timer"
564 help
565 This option enables a modules that manages a list of event timers
566 that need to be monitored by the PM. The enables the PM code to
567 monitor events that require the core to be awake and ready to
568 handle the event.
569
570config MSM_PM
571 depends on PM
572 select MSM_IDLE_STATS if DEBUG_FS
573 select CPU_IDLE_MULTIPLE_DRIVERS
574 bool "Qualcomm platform specific PM driver"
575 help
576 Platform specific power driver to manage cores and l2 low power
577 modes. It interface with various system driver and put the cores
578 into low power modes. It implements OS initiated scheme and
579 determines last CPU to call into PSCI for cluster Low power
580 modes.
581
582config MSM_NOPM
583 default y if !PM
584 bool
585 help
586 This enables bare minimum support of power management at platform level.
587 i.e WFI
588
589config APSS_CORE_EA
590 depends on CPU_FREQ && PM_OPP
591 bool "Qualcomm Technology Inc specific power aware driver"
592 help
593 Platform specific power aware driver to provide power
594 and temperature information to the scheduler.
595
596if MSM_PM
597menuconfig MSM_IDLE_STATS
598 bool "Collect idle statistics"
599 help
600 Collect cores various low power mode idle statistics
601 and export them in proc/msm_pm_stats. User can read
602 this data and determine what low power modes and how
603 many times cores have entered into LPM modes.
604
605if MSM_IDLE_STATS
606
607config MSM_IDLE_STATS_FIRST_BUCKET
608 int "First bucket time"
609 default 62500
610 help
611 Upper time limit in nanoseconds of first bucket.
612
613config MSM_IDLE_STATS_BUCKET_SHIFT
614 int "Bucket shift"
615 default 2
616
617config MSM_IDLE_STATS_BUCKET_COUNT
618 int "Bucket count"
619 default 10
620
621config MSM_SUSPEND_STATS_FIRST_BUCKET
622 int "First bucket time for suspend"
623 default 1000000000
624 help
625 Upper time limit in nanoseconds of first bucket of the
626 histogram. This is for collecting statistics on suspend.
627
628endif # MSM_IDLE_STATS
629endif # MSM_PM
Satyajit Desai765e7ef2016-11-09 14:27:45 -0800630
631config QCOM_DCC_V2
632 bool "Qualcomm Technologies Data Capture and Compare enigne support for V2"
633 help
634 This option enables driver for Data Capture and Compare engine. DCC
635 driver provides interface to configure DCC block and read back
636 captured data from DCC's internal SRAM.