Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Driver for the National Semiconductor DP83640 PHYTER |
| 3 | * |
| 4 | * Copyright (C) 2010 OMICRON electronics GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 19 | */ |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 20 | |
| 21 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 22 | |
Stefan Sørensen | 539e44d | 2015-11-03 09:34:04 +0100 | [diff] [blame] | 23 | #include <linux/crc32.h> |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 24 | #include <linux/ethtool.h> |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/list.h> |
| 27 | #include <linux/mii.h> |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/net_tstamp.h> |
| 30 | #include <linux/netdevice.h> |
Daniel Borkmann | 408eccc | 2014-04-01 16:20:23 +0200 | [diff] [blame] | 31 | #include <linux/if_vlan.h> |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 32 | #include <linux/phy.h> |
| 33 | #include <linux/ptp_classify.h> |
| 34 | #include <linux/ptp_clock_kernel.h> |
| 35 | |
| 36 | #include "dp83640_reg.h" |
| 37 | |
| 38 | #define DP83640_PHY_ID 0x20005ce1 |
| 39 | #define PAGESEL 0x13 |
Richard Cochran | 8028837 | 2011-08-06 21:03:04 +0000 | [diff] [blame] | 40 | #define MAX_RXTS 64 |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 41 | #define N_EXT_TS 6 |
Stefan Sørensen | ad01577 | 2014-06-27 12:05:30 +0200 | [diff] [blame] | 42 | #define N_PER_OUT 7 |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 43 | #define PSF_PTPVER 2 |
| 44 | #define PSF_EVNT 0x4000 |
| 45 | #define PSF_RX 0x2000 |
| 46 | #define PSF_TX 0x1000 |
| 47 | #define EXT_EVENT 1 |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 48 | #define CAL_EVENT 7 |
Richard Cochran | 397a253 | 2015-05-25 11:55:43 +0200 | [diff] [blame] | 49 | #define CAL_TRIGGER 1 |
Richard Cochran | 86dd361 | 2014-03-20 22:21:58 +0100 | [diff] [blame] | 50 | #define DP83640_N_PINS 12 |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 51 | |
Stephan Gatzka | 1642182 | 2012-12-04 10:21:38 +0000 | [diff] [blame] | 52 | #define MII_DP83640_MICR 0x11 |
| 53 | #define MII_DP83640_MISR 0x12 |
| 54 | |
| 55 | #define MII_DP83640_MICR_OE 0x1 |
| 56 | #define MII_DP83640_MICR_IE 0x2 |
| 57 | |
| 58 | #define MII_DP83640_MISR_RHF_INT_EN 0x01 |
| 59 | #define MII_DP83640_MISR_FHF_INT_EN 0x02 |
| 60 | #define MII_DP83640_MISR_ANC_INT_EN 0x04 |
| 61 | #define MII_DP83640_MISR_DUP_INT_EN 0x08 |
| 62 | #define MII_DP83640_MISR_SPD_INT_EN 0x10 |
| 63 | #define MII_DP83640_MISR_LINK_INT_EN 0x20 |
| 64 | #define MII_DP83640_MISR_ED_INT_EN 0x40 |
| 65 | #define MII_DP83640_MISR_LQ_INT_EN 0x80 |
| 66 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 67 | /* phyter seems to miss the mark by 16 ns */ |
| 68 | #define ADJTIME_FIX 16 |
| 69 | |
Stefan Sørensen | 4b06325 | 2015-11-03 09:34:05 +0100 | [diff] [blame] | 70 | #define SKB_TIMESTAMP_TIMEOUT 2 /* jiffies */ |
| 71 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 72 | #if defined(__BIG_ENDIAN) |
| 73 | #define ENDIAN_FLAG 0 |
| 74 | #elif defined(__LITTLE_ENDIAN) |
| 75 | #define ENDIAN_FLAG PSF_ENDIAN |
| 76 | #endif |
| 77 | |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 78 | struct dp83640_skb_info { |
| 79 | int ptp_type; |
| 80 | unsigned long tmo; |
| 81 | }; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 82 | |
| 83 | struct phy_rxts { |
| 84 | u16 ns_lo; /* ns[15:0] */ |
| 85 | u16 ns_hi; /* overflow[1:0], ns[29:16] */ |
| 86 | u16 sec_lo; /* sec[15:0] */ |
| 87 | u16 sec_hi; /* sec[31:16] */ |
| 88 | u16 seqid; /* sequenceId[15:0] */ |
| 89 | u16 msgtype; /* messageType[3:0], hash[11:0] */ |
| 90 | }; |
| 91 | |
| 92 | struct phy_txts { |
| 93 | u16 ns_lo; /* ns[15:0] */ |
| 94 | u16 ns_hi; /* overflow[1:0], ns[29:16] */ |
| 95 | u16 sec_lo; /* sec[15:0] */ |
| 96 | u16 sec_hi; /* sec[31:16] */ |
| 97 | }; |
| 98 | |
| 99 | struct rxts { |
| 100 | struct list_head list; |
| 101 | unsigned long tmo; |
| 102 | u64 ns; |
| 103 | u16 seqid; |
| 104 | u8 msgtype; |
| 105 | u16 hash; |
| 106 | }; |
| 107 | |
| 108 | struct dp83640_clock; |
| 109 | |
| 110 | struct dp83640_private { |
| 111 | struct list_head list; |
| 112 | struct dp83640_clock *clock; |
| 113 | struct phy_device *phydev; |
Stefan Sørensen | 4b06325 | 2015-11-03 09:34:05 +0100 | [diff] [blame] | 114 | struct delayed_work ts_work; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 115 | int hwts_tx_en; |
| 116 | int hwts_rx_en; |
| 117 | int layer; |
| 118 | int version; |
| 119 | /* remember state of cfg0 during calibration */ |
| 120 | int cfg0; |
| 121 | /* remember the last event time stamp */ |
| 122 | struct phy_txts edata; |
| 123 | /* list of rx timestamps */ |
| 124 | struct list_head rxts; |
| 125 | struct list_head rxpool; |
| 126 | struct rxts rx_pool_data[MAX_RXTS]; |
| 127 | /* protects above three fields from concurrent access */ |
| 128 | spinlock_t rx_lock; |
| 129 | /* queues of incoming and outgoing packets */ |
| 130 | struct sk_buff_head rx_queue; |
| 131 | struct sk_buff_head tx_queue; |
| 132 | }; |
| 133 | |
| 134 | struct dp83640_clock { |
| 135 | /* keeps the instance in the 'phyter_clocks' list */ |
| 136 | struct list_head list; |
| 137 | /* we create one clock instance per MII bus */ |
| 138 | struct mii_bus *bus; |
| 139 | /* protects extended registers from concurrent access */ |
| 140 | struct mutex extreg_lock; |
| 141 | /* remembers which page was last selected */ |
| 142 | int page; |
| 143 | /* our advertised capabilities */ |
| 144 | struct ptp_clock_info caps; |
| 145 | /* protects the three fields below from concurrent access */ |
| 146 | struct mutex clock_lock; |
| 147 | /* the one phyter from which we shall read */ |
| 148 | struct dp83640_private *chosen; |
| 149 | /* list of the other attached phyters, not chosen */ |
| 150 | struct list_head phylist; |
| 151 | /* reference to our PTP hardware clock */ |
| 152 | struct ptp_clock *ptp_clock; |
| 153 | }; |
| 154 | |
| 155 | /* globals */ |
| 156 | |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 157 | enum { |
| 158 | CALIBRATE_GPIO, |
| 159 | PEROUT_GPIO, |
| 160 | EXTTS0_GPIO, |
| 161 | EXTTS1_GPIO, |
| 162 | EXTTS2_GPIO, |
| 163 | EXTTS3_GPIO, |
| 164 | EXTTS4_GPIO, |
| 165 | EXTTS5_GPIO, |
| 166 | GPIO_TABLE_SIZE |
| 167 | }; |
| 168 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 169 | static int chosen_phy = -1; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 170 | static ushort gpio_tab[GPIO_TABLE_SIZE] = { |
| 171 | 1, 2, 3, 4, 8, 9, 10, 11 |
| 172 | }; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 173 | |
| 174 | module_param(chosen_phy, int, 0444); |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 175 | module_param_array(gpio_tab, ushort, NULL, 0444); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 176 | |
| 177 | MODULE_PARM_DESC(chosen_phy, \ |
| 178 | "The address of the PHY to use for the ancillary clock features"); |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 179 | MODULE_PARM_DESC(gpio_tab, \ |
| 180 | "Which GPIO line to use for which purpose: cal,perout,extts1,...,extts6"); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 181 | |
Richard Cochran | 86dd361 | 2014-03-20 22:21:58 +0100 | [diff] [blame] | 182 | static void dp83640_gpio_defaults(struct ptp_pin_desc *pd) |
| 183 | { |
| 184 | int i, index; |
| 185 | |
| 186 | for (i = 0; i < DP83640_N_PINS; i++) { |
| 187 | snprintf(pd[i].name, sizeof(pd[i].name), "GPIO%d", 1 + i); |
| 188 | pd[i].index = i; |
| 189 | } |
| 190 | |
| 191 | for (i = 0; i < GPIO_TABLE_SIZE; i++) { |
| 192 | if (gpio_tab[i] < 1 || gpio_tab[i] > DP83640_N_PINS) { |
| 193 | pr_err("gpio_tab[%d]=%hu out of range", i, gpio_tab[i]); |
| 194 | return; |
| 195 | } |
| 196 | } |
| 197 | |
| 198 | index = gpio_tab[CALIBRATE_GPIO] - 1; |
| 199 | pd[index].func = PTP_PF_PHYSYNC; |
| 200 | pd[index].chan = 0; |
| 201 | |
| 202 | index = gpio_tab[PEROUT_GPIO] - 1; |
| 203 | pd[index].func = PTP_PF_PEROUT; |
| 204 | pd[index].chan = 0; |
| 205 | |
| 206 | for (i = EXTTS0_GPIO; i < GPIO_TABLE_SIZE; i++) { |
| 207 | index = gpio_tab[i] - 1; |
| 208 | pd[index].func = PTP_PF_EXTTS; |
| 209 | pd[index].chan = i - EXTTS0_GPIO; |
| 210 | } |
| 211 | } |
| 212 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 213 | /* a list of clocks and a mutex to protect it */ |
| 214 | static LIST_HEAD(phyter_clocks); |
| 215 | static DEFINE_MUTEX(phyter_clocks_lock); |
| 216 | |
| 217 | static void rx_timestamp_work(struct work_struct *work); |
| 218 | |
| 219 | /* extended register access functions */ |
| 220 | |
| 221 | #define BROADCAST_ADDR 31 |
| 222 | |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 223 | static inline int broadcast_write(struct phy_device *phydev, u32 regnum, |
| 224 | u16 val) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 225 | { |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 226 | return mdiobus_write(phydev->mdio.bus, BROADCAST_ADDR, regnum, val); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 227 | } |
| 228 | |
| 229 | /* Caller must hold extreg_lock. */ |
| 230 | static int ext_read(struct phy_device *phydev, int page, u32 regnum) |
| 231 | { |
| 232 | struct dp83640_private *dp83640 = phydev->priv; |
| 233 | int val; |
| 234 | |
| 235 | if (dp83640->clock->page != page) { |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 236 | broadcast_write(phydev, PAGESEL, page); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 237 | dp83640->clock->page = page; |
| 238 | } |
| 239 | val = phy_read(phydev, regnum); |
| 240 | |
| 241 | return val; |
| 242 | } |
| 243 | |
| 244 | /* Caller must hold extreg_lock. */ |
| 245 | static void ext_write(int broadcast, struct phy_device *phydev, |
| 246 | int page, u32 regnum, u16 val) |
| 247 | { |
| 248 | struct dp83640_private *dp83640 = phydev->priv; |
| 249 | |
| 250 | if (dp83640->clock->page != page) { |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 251 | broadcast_write(phydev, PAGESEL, page); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 252 | dp83640->clock->page = page; |
| 253 | } |
| 254 | if (broadcast) |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 255 | broadcast_write(phydev, regnum, val); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 256 | else |
| 257 | phy_write(phydev, regnum, val); |
| 258 | } |
| 259 | |
| 260 | /* Caller must hold extreg_lock. */ |
| 261 | static int tdr_write(int bc, struct phy_device *dev, |
Richard Cochran | 41c2c18 | 2015-03-29 23:12:10 +0200 | [diff] [blame] | 262 | const struct timespec64 *ts, u16 cmd) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 263 | { |
| 264 | ext_write(bc, dev, PAGE4, PTP_TDR, ts->tv_nsec & 0xffff);/* ns[15:0] */ |
| 265 | ext_write(bc, dev, PAGE4, PTP_TDR, ts->tv_nsec >> 16); /* ns[31:16] */ |
| 266 | ext_write(bc, dev, PAGE4, PTP_TDR, ts->tv_sec & 0xffff); /* sec[15:0] */ |
| 267 | ext_write(bc, dev, PAGE4, PTP_TDR, ts->tv_sec >> 16); /* sec[31:16]*/ |
| 268 | |
| 269 | ext_write(bc, dev, PAGE4, PTP_CTL, cmd); |
| 270 | |
| 271 | return 0; |
| 272 | } |
| 273 | |
| 274 | /* convert phy timestamps into driver timestamps */ |
| 275 | |
| 276 | static void phy2rxts(struct phy_rxts *p, struct rxts *rxts) |
| 277 | { |
| 278 | u32 sec; |
| 279 | |
| 280 | sec = p->sec_lo; |
| 281 | sec |= p->sec_hi << 16; |
| 282 | |
| 283 | rxts->ns = p->ns_lo; |
| 284 | rxts->ns |= (p->ns_hi & 0x3fff) << 16; |
| 285 | rxts->ns += ((u64)sec) * 1000000000ULL; |
| 286 | rxts->seqid = p->seqid; |
| 287 | rxts->msgtype = (p->msgtype >> 12) & 0xf; |
| 288 | rxts->hash = p->msgtype & 0x0fff; |
Stefan Sørensen | 4b06325 | 2015-11-03 09:34:05 +0100 | [diff] [blame] | 289 | rxts->tmo = jiffies + SKB_TIMESTAMP_TIMEOUT; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 290 | } |
| 291 | |
| 292 | static u64 phy2txts(struct phy_txts *p) |
| 293 | { |
| 294 | u64 ns; |
| 295 | u32 sec; |
| 296 | |
| 297 | sec = p->sec_lo; |
| 298 | sec |= p->sec_hi << 16; |
| 299 | |
| 300 | ns = p->ns_lo; |
| 301 | ns |= (p->ns_hi & 0x3fff) << 16; |
| 302 | ns += ((u64)sec) * 1000000000ULL; |
| 303 | |
| 304 | return ns; |
| 305 | } |
| 306 | |
Richard Cochran | 621bdec | 2014-03-20 22:22:00 +0100 | [diff] [blame] | 307 | static int periodic_output(struct dp83640_clock *clock, |
Stefan Sørensen | ad01577 | 2014-06-27 12:05:30 +0200 | [diff] [blame] | 308 | struct ptp_clock_request *clkreq, bool on, |
| 309 | int trigger) |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 310 | { |
| 311 | struct dp83640_private *dp83640 = clock->chosen; |
| 312 | struct phy_device *phydev = dp83640->phydev; |
Richard Cochran | 564ca56 | 2014-03-20 22:21:57 +0100 | [diff] [blame] | 313 | u32 sec, nsec, pwidth; |
Stefan Sørensen | ad01577 | 2014-06-27 12:05:30 +0200 | [diff] [blame] | 314 | u16 gpio, ptp_trig, val; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 315 | |
Richard Cochran | 621bdec | 2014-03-20 22:22:00 +0100 | [diff] [blame] | 316 | if (on) { |
Stefan Sørensen | ad01577 | 2014-06-27 12:05:30 +0200 | [diff] [blame] | 317 | gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PEROUT, |
| 318 | trigger); |
Richard Cochran | 621bdec | 2014-03-20 22:22:00 +0100 | [diff] [blame] | 319 | if (gpio < 1) |
| 320 | return -EINVAL; |
| 321 | } else { |
| 322 | gpio = 0; |
| 323 | } |
| 324 | |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 325 | ptp_trig = TRIG_WR | |
| 326 | (trigger & TRIG_CSEL_MASK) << TRIG_CSEL_SHIFT | |
| 327 | (gpio & TRIG_GPIO_MASK) << TRIG_GPIO_SHIFT | |
| 328 | TRIG_PER | |
| 329 | TRIG_PULSE; |
| 330 | |
| 331 | val = (trigger & TRIG_SEL_MASK) << TRIG_SEL_SHIFT; |
| 332 | |
| 333 | if (!on) { |
| 334 | val |= TRIG_DIS; |
| 335 | mutex_lock(&clock->extreg_lock); |
| 336 | ext_write(0, phydev, PAGE5, PTP_TRIG, ptp_trig); |
| 337 | ext_write(0, phydev, PAGE4, PTP_CTL, val); |
| 338 | mutex_unlock(&clock->extreg_lock); |
Richard Cochran | 621bdec | 2014-03-20 22:22:00 +0100 | [diff] [blame] | 339 | return 0; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 340 | } |
| 341 | |
| 342 | sec = clkreq->perout.start.sec; |
| 343 | nsec = clkreq->perout.start.nsec; |
Richard Cochran | 564ca56 | 2014-03-20 22:21:57 +0100 | [diff] [blame] | 344 | pwidth = clkreq->perout.period.sec * 1000000000UL; |
| 345 | pwidth += clkreq->perout.period.nsec; |
| 346 | pwidth /= 2; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 347 | |
| 348 | mutex_lock(&clock->extreg_lock); |
| 349 | |
| 350 | ext_write(0, phydev, PAGE5, PTP_TRIG, ptp_trig); |
| 351 | |
| 352 | /*load trigger*/ |
| 353 | val |= TRIG_LOAD; |
| 354 | ext_write(0, phydev, PAGE4, PTP_CTL, val); |
| 355 | ext_write(0, phydev, PAGE4, PTP_TDR, nsec & 0xffff); /* ns[15:0] */ |
| 356 | ext_write(0, phydev, PAGE4, PTP_TDR, nsec >> 16); /* ns[31:16] */ |
| 357 | ext_write(0, phydev, PAGE4, PTP_TDR, sec & 0xffff); /* sec[15:0] */ |
| 358 | ext_write(0, phydev, PAGE4, PTP_TDR, sec >> 16); /* sec[31:16] */ |
Richard Cochran | 564ca56 | 2014-03-20 22:21:57 +0100 | [diff] [blame] | 359 | ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff); /* ns[15:0] */ |
| 360 | ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16); /* ns[31:16] */ |
Stefan Sørensen | 35e872a | 2014-06-27 12:05:29 +0200 | [diff] [blame] | 361 | /* Triggers 0 and 1 has programmable pulsewidth2 */ |
| 362 | if (trigger < 2) { |
| 363 | ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff); |
| 364 | ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16); |
| 365 | } |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 366 | |
| 367 | /*enable trigger*/ |
| 368 | val &= ~TRIG_LOAD; |
| 369 | val |= TRIG_EN; |
| 370 | ext_write(0, phydev, PAGE4, PTP_CTL, val); |
| 371 | |
| 372 | mutex_unlock(&clock->extreg_lock); |
Richard Cochran | 621bdec | 2014-03-20 22:22:00 +0100 | [diff] [blame] | 373 | return 0; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 374 | } |
| 375 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 376 | /* ptp clock methods */ |
| 377 | |
| 378 | static int ptp_dp83640_adjfreq(struct ptp_clock_info *ptp, s32 ppb) |
| 379 | { |
| 380 | struct dp83640_clock *clock = |
| 381 | container_of(ptp, struct dp83640_clock, caps); |
| 382 | struct phy_device *phydev = clock->chosen->phydev; |
| 383 | u64 rate; |
| 384 | int neg_adj = 0; |
| 385 | u16 hi, lo; |
| 386 | |
| 387 | if (ppb < 0) { |
| 388 | neg_adj = 1; |
| 389 | ppb = -ppb; |
| 390 | } |
| 391 | rate = ppb; |
| 392 | rate <<= 26; |
| 393 | rate = div_u64(rate, 1953125); |
| 394 | |
| 395 | hi = (rate >> 16) & PTP_RATE_HI_MASK; |
| 396 | if (neg_adj) |
| 397 | hi |= PTP_RATE_DIR; |
| 398 | |
| 399 | lo = rate & 0xffff; |
| 400 | |
| 401 | mutex_lock(&clock->extreg_lock); |
| 402 | |
| 403 | ext_write(1, phydev, PAGE4, PTP_RATEH, hi); |
| 404 | ext_write(1, phydev, PAGE4, PTP_RATEL, lo); |
| 405 | |
| 406 | mutex_unlock(&clock->extreg_lock); |
| 407 | |
| 408 | return 0; |
| 409 | } |
| 410 | |
| 411 | static int ptp_dp83640_adjtime(struct ptp_clock_info *ptp, s64 delta) |
| 412 | { |
| 413 | struct dp83640_clock *clock = |
| 414 | container_of(ptp, struct dp83640_clock, caps); |
| 415 | struct phy_device *phydev = clock->chosen->phydev; |
Richard Cochran | 41c2c18 | 2015-03-29 23:12:10 +0200 | [diff] [blame] | 416 | struct timespec64 ts; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 417 | int err; |
| 418 | |
| 419 | delta += ADJTIME_FIX; |
| 420 | |
Richard Cochran | 41c2c18 | 2015-03-29 23:12:10 +0200 | [diff] [blame] | 421 | ts = ns_to_timespec64(delta); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 422 | |
| 423 | mutex_lock(&clock->extreg_lock); |
| 424 | |
| 425 | err = tdr_write(1, phydev, &ts, PTP_STEP_CLK); |
| 426 | |
| 427 | mutex_unlock(&clock->extreg_lock); |
| 428 | |
| 429 | return err; |
| 430 | } |
| 431 | |
Richard Cochran | 41c2c18 | 2015-03-29 23:12:10 +0200 | [diff] [blame] | 432 | static int ptp_dp83640_gettime(struct ptp_clock_info *ptp, |
| 433 | struct timespec64 *ts) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 434 | { |
| 435 | struct dp83640_clock *clock = |
| 436 | container_of(ptp, struct dp83640_clock, caps); |
| 437 | struct phy_device *phydev = clock->chosen->phydev; |
| 438 | unsigned int val[4]; |
| 439 | |
| 440 | mutex_lock(&clock->extreg_lock); |
| 441 | |
| 442 | ext_write(0, phydev, PAGE4, PTP_CTL, PTP_RD_CLK); |
| 443 | |
| 444 | val[0] = ext_read(phydev, PAGE4, PTP_TDR); /* ns[15:0] */ |
| 445 | val[1] = ext_read(phydev, PAGE4, PTP_TDR); /* ns[31:16] */ |
| 446 | val[2] = ext_read(phydev, PAGE4, PTP_TDR); /* sec[15:0] */ |
| 447 | val[3] = ext_read(phydev, PAGE4, PTP_TDR); /* sec[31:16] */ |
| 448 | |
| 449 | mutex_unlock(&clock->extreg_lock); |
| 450 | |
| 451 | ts->tv_nsec = val[0] | (val[1] << 16); |
| 452 | ts->tv_sec = val[2] | (val[3] << 16); |
| 453 | |
| 454 | return 0; |
| 455 | } |
| 456 | |
| 457 | static int ptp_dp83640_settime(struct ptp_clock_info *ptp, |
Richard Cochran | 41c2c18 | 2015-03-29 23:12:10 +0200 | [diff] [blame] | 458 | const struct timespec64 *ts) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 459 | { |
| 460 | struct dp83640_clock *clock = |
| 461 | container_of(ptp, struct dp83640_clock, caps); |
| 462 | struct phy_device *phydev = clock->chosen->phydev; |
| 463 | int err; |
| 464 | |
| 465 | mutex_lock(&clock->extreg_lock); |
| 466 | |
| 467 | err = tdr_write(1, phydev, ts, PTP_LOAD_CLK); |
| 468 | |
| 469 | mutex_unlock(&clock->extreg_lock); |
| 470 | |
| 471 | return err; |
| 472 | } |
| 473 | |
| 474 | static int ptp_dp83640_enable(struct ptp_clock_info *ptp, |
| 475 | struct ptp_clock_request *rq, int on) |
| 476 | { |
| 477 | struct dp83640_clock *clock = |
| 478 | container_of(ptp, struct dp83640_clock, caps); |
| 479 | struct phy_device *phydev = clock->chosen->phydev; |
Richard Cochran | fbf4b93 | 2014-03-20 22:21:56 +0100 | [diff] [blame] | 480 | unsigned int index; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 481 | u16 evnt, event_num, gpio_num; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 482 | |
| 483 | switch (rq->type) { |
| 484 | case PTP_CLK_REQ_EXTTS: |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 485 | index = rq->extts.index; |
Richard Cochran | fbf4b93 | 2014-03-20 22:21:56 +0100 | [diff] [blame] | 486 | if (index >= N_EXT_TS) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 487 | return -EINVAL; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 488 | event_num = EXT_EVENT + index; |
| 489 | evnt = EVNT_WR | (event_num & EVNT_SEL_MASK) << EVNT_SEL_SHIFT; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 490 | if (on) { |
Richard Cochran | faa8971 | 2014-03-20 22:21:59 +0100 | [diff] [blame] | 491 | gpio_num = 1 + ptp_find_pin(clock->ptp_clock, |
| 492 | PTP_PF_EXTTS, index); |
| 493 | if (gpio_num < 1) |
| 494 | return -EINVAL; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 495 | evnt |= (gpio_num & EVNT_GPIO_MASK) << EVNT_GPIO_SHIFT; |
Stefan Sørensen | 80671bd | 2014-02-03 15:36:50 +0100 | [diff] [blame] | 496 | if (rq->extts.flags & PTP_FALLING_EDGE) |
| 497 | evnt |= EVNT_FALL; |
| 498 | else |
| 499 | evnt |= EVNT_RISE; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 500 | } |
Richard Cochran | a935865 | 2015-05-25 11:55:44 +0200 | [diff] [blame] | 501 | mutex_lock(&clock->extreg_lock); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 502 | ext_write(0, phydev, PAGE5, PTP_EVNT, evnt); |
Richard Cochran | a935865 | 2015-05-25 11:55:44 +0200 | [diff] [blame] | 503 | mutex_unlock(&clock->extreg_lock); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 504 | return 0; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 505 | |
| 506 | case PTP_CLK_REQ_PEROUT: |
Stefan Sørensen | ad01577 | 2014-06-27 12:05:30 +0200 | [diff] [blame] | 507 | if (rq->perout.index >= N_PER_OUT) |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 508 | return -EINVAL; |
Stefan Sørensen | ad01577 | 2014-06-27 12:05:30 +0200 | [diff] [blame] | 509 | return periodic_output(clock, rq, on, rq->perout.index); |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 510 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 511 | default: |
| 512 | break; |
| 513 | } |
| 514 | |
| 515 | return -EOPNOTSUPP; |
| 516 | } |
| 517 | |
Richard Cochran | 86dd361 | 2014-03-20 22:21:58 +0100 | [diff] [blame] | 518 | static int ptp_dp83640_verify(struct ptp_clock_info *ptp, unsigned int pin, |
| 519 | enum ptp_pin_function func, unsigned int chan) |
| 520 | { |
Stefan Sørensen | 6f39eb8 | 2014-06-27 12:05:31 +0200 | [diff] [blame] | 521 | struct dp83640_clock *clock = |
| 522 | container_of(ptp, struct dp83640_clock, caps); |
| 523 | |
| 524 | if (clock->caps.pin_config[pin].func == PTP_PF_PHYSYNC && |
| 525 | !list_empty(&clock->phylist)) |
| 526 | return 1; |
| 527 | |
| 528 | if (func == PTP_PF_PHYSYNC) |
| 529 | return 1; |
| 530 | |
Richard Cochran | 86dd361 | 2014-03-20 22:21:58 +0100 | [diff] [blame] | 531 | return 0; |
| 532 | } |
| 533 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 534 | static u8 status_frame_dst[6] = { 0x01, 0x1B, 0x19, 0x00, 0x00, 0x00 }; |
| 535 | static u8 status_frame_src[6] = { 0x08, 0x00, 0x17, 0x0B, 0x6B, 0x0F }; |
| 536 | |
| 537 | static void enable_status_frames(struct phy_device *phydev, bool on) |
| 538 | { |
Richard Cochran | a935865 | 2015-05-25 11:55:44 +0200 | [diff] [blame] | 539 | struct dp83640_private *dp83640 = phydev->priv; |
| 540 | struct dp83640_clock *clock = dp83640->clock; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 541 | u16 cfg0 = 0, ver; |
| 542 | |
| 543 | if (on) |
| 544 | cfg0 = PSF_EVNT_EN | PSF_RXTS_EN | PSF_TXTS_EN | ENDIAN_FLAG; |
| 545 | |
| 546 | ver = (PSF_PTPVER & VERSIONPTP_MASK) << VERSIONPTP_SHIFT; |
| 547 | |
Richard Cochran | a935865 | 2015-05-25 11:55:44 +0200 | [diff] [blame] | 548 | mutex_lock(&clock->extreg_lock); |
| 549 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 550 | ext_write(0, phydev, PAGE5, PSF_CFG0, cfg0); |
| 551 | ext_write(0, phydev, PAGE6, PSF_CFG1, ver); |
| 552 | |
Richard Cochran | a935865 | 2015-05-25 11:55:44 +0200 | [diff] [blame] | 553 | mutex_unlock(&clock->extreg_lock); |
| 554 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 555 | if (!phydev->attached_dev) { |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 556 | pr_warn("expected to find an attached netdevice\n"); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 557 | return; |
| 558 | } |
| 559 | |
| 560 | if (on) { |
| 561 | if (dev_mc_add(phydev->attached_dev, status_frame_dst)) |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 562 | pr_warn("failed to add mc address\n"); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 563 | } else { |
| 564 | if (dev_mc_del(phydev->attached_dev, status_frame_dst)) |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 565 | pr_warn("failed to delete mc address\n"); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 566 | } |
| 567 | } |
| 568 | |
| 569 | static bool is_status_frame(struct sk_buff *skb, int type) |
| 570 | { |
| 571 | struct ethhdr *h = eth_hdr(skb); |
| 572 | |
| 573 | if (PTP_CLASS_V2_L2 == type && |
| 574 | !memcmp(h->h_source, status_frame_src, sizeof(status_frame_src))) |
| 575 | return true; |
| 576 | else |
| 577 | return false; |
| 578 | } |
| 579 | |
| 580 | static int expired(struct rxts *rxts) |
| 581 | { |
| 582 | return time_after(jiffies, rxts->tmo); |
| 583 | } |
| 584 | |
| 585 | /* Caller must hold rx_lock. */ |
| 586 | static void prune_rx_ts(struct dp83640_private *dp83640) |
| 587 | { |
| 588 | struct list_head *this, *next; |
| 589 | struct rxts *rxts; |
| 590 | |
| 591 | list_for_each_safe(this, next, &dp83640->rxts) { |
| 592 | rxts = list_entry(this, struct rxts, list); |
| 593 | if (expired(rxts)) { |
| 594 | list_del_init(&rxts->list); |
| 595 | list_add(&rxts->list, &dp83640->rxpool); |
| 596 | } |
| 597 | } |
| 598 | } |
| 599 | |
| 600 | /* synchronize the phyters so they act as one clock */ |
| 601 | |
| 602 | static void enable_broadcast(struct phy_device *phydev, int init_page, int on) |
| 603 | { |
| 604 | int val; |
| 605 | phy_write(phydev, PAGESEL, 0); |
| 606 | val = phy_read(phydev, PHYCR2); |
| 607 | if (on) |
| 608 | val |= BC_WRITE; |
| 609 | else |
| 610 | val &= ~BC_WRITE; |
| 611 | phy_write(phydev, PHYCR2, val); |
| 612 | phy_write(phydev, PAGESEL, init_page); |
| 613 | } |
| 614 | |
| 615 | static void recalibrate(struct dp83640_clock *clock) |
| 616 | { |
| 617 | s64 now, diff; |
| 618 | struct phy_txts event_ts; |
Richard Cochran | 41c2c18 | 2015-03-29 23:12:10 +0200 | [diff] [blame] | 619 | struct timespec64 ts; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 620 | struct list_head *this; |
| 621 | struct dp83640_private *tmp; |
| 622 | struct phy_device *master = clock->chosen->phydev; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 623 | u16 cal_gpio, cfg0, evnt, ptp_trig, trigger, val; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 624 | |
| 625 | trigger = CAL_TRIGGER; |
Stefan Sørensen | e015595 | 2014-06-27 12:05:32 +0200 | [diff] [blame] | 626 | cal_gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PHYSYNC, 0); |
| 627 | if (cal_gpio < 1) { |
Masanari Iida | f42cf8d | 2015-02-24 23:11:26 +0900 | [diff] [blame] | 628 | pr_err("PHY calibration pin not available - PHY is not calibrated."); |
Stefan Sørensen | e015595 | 2014-06-27 12:05:32 +0200 | [diff] [blame] | 629 | return; |
| 630 | } |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 631 | |
| 632 | mutex_lock(&clock->extreg_lock); |
| 633 | |
| 634 | /* |
| 635 | * enable broadcast, disable status frames, enable ptp clock |
| 636 | */ |
| 637 | list_for_each(this, &clock->phylist) { |
| 638 | tmp = list_entry(this, struct dp83640_private, list); |
| 639 | enable_broadcast(tmp->phydev, clock->page, 1); |
| 640 | tmp->cfg0 = ext_read(tmp->phydev, PAGE5, PSF_CFG0); |
| 641 | ext_write(0, tmp->phydev, PAGE5, PSF_CFG0, 0); |
| 642 | ext_write(0, tmp->phydev, PAGE4, PTP_CTL, PTP_ENABLE); |
| 643 | } |
| 644 | enable_broadcast(master, clock->page, 1); |
| 645 | cfg0 = ext_read(master, PAGE5, PSF_CFG0); |
| 646 | ext_write(0, master, PAGE5, PSF_CFG0, 0); |
| 647 | ext_write(0, master, PAGE4, PTP_CTL, PTP_ENABLE); |
| 648 | |
| 649 | /* |
| 650 | * enable an event timestamp |
| 651 | */ |
| 652 | evnt = EVNT_WR | EVNT_RISE | EVNT_SINGLE; |
| 653 | evnt |= (CAL_EVENT & EVNT_SEL_MASK) << EVNT_SEL_SHIFT; |
| 654 | evnt |= (cal_gpio & EVNT_GPIO_MASK) << EVNT_GPIO_SHIFT; |
| 655 | |
| 656 | list_for_each(this, &clock->phylist) { |
| 657 | tmp = list_entry(this, struct dp83640_private, list); |
| 658 | ext_write(0, tmp->phydev, PAGE5, PTP_EVNT, evnt); |
| 659 | } |
| 660 | ext_write(0, master, PAGE5, PTP_EVNT, evnt); |
| 661 | |
| 662 | /* |
| 663 | * configure a trigger |
| 664 | */ |
| 665 | ptp_trig = TRIG_WR | TRIG_IF_LATE | TRIG_PULSE; |
| 666 | ptp_trig |= (trigger & TRIG_CSEL_MASK) << TRIG_CSEL_SHIFT; |
| 667 | ptp_trig |= (cal_gpio & TRIG_GPIO_MASK) << TRIG_GPIO_SHIFT; |
| 668 | ext_write(0, master, PAGE5, PTP_TRIG, ptp_trig); |
| 669 | |
| 670 | /* load trigger */ |
| 671 | val = (trigger & TRIG_SEL_MASK) << TRIG_SEL_SHIFT; |
| 672 | val |= TRIG_LOAD; |
| 673 | ext_write(0, master, PAGE4, PTP_CTL, val); |
| 674 | |
| 675 | /* enable trigger */ |
| 676 | val &= ~TRIG_LOAD; |
| 677 | val |= TRIG_EN; |
| 678 | ext_write(0, master, PAGE4, PTP_CTL, val); |
| 679 | |
| 680 | /* disable trigger */ |
| 681 | val = (trigger & TRIG_SEL_MASK) << TRIG_SEL_SHIFT; |
| 682 | val |= TRIG_DIS; |
| 683 | ext_write(0, master, PAGE4, PTP_CTL, val); |
| 684 | |
| 685 | /* |
| 686 | * read out and correct offsets |
| 687 | */ |
| 688 | val = ext_read(master, PAGE4, PTP_STS); |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 689 | pr_info("master PTP_STS 0x%04hx\n", val); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 690 | val = ext_read(master, PAGE4, PTP_ESTS); |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 691 | pr_info("master PTP_ESTS 0x%04hx\n", val); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 692 | event_ts.ns_lo = ext_read(master, PAGE4, PTP_EDATA); |
| 693 | event_ts.ns_hi = ext_read(master, PAGE4, PTP_EDATA); |
| 694 | event_ts.sec_lo = ext_read(master, PAGE4, PTP_EDATA); |
| 695 | event_ts.sec_hi = ext_read(master, PAGE4, PTP_EDATA); |
| 696 | now = phy2txts(&event_ts); |
| 697 | |
| 698 | list_for_each(this, &clock->phylist) { |
| 699 | tmp = list_entry(this, struct dp83640_private, list); |
| 700 | val = ext_read(tmp->phydev, PAGE4, PTP_STS); |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 701 | pr_info("slave PTP_STS 0x%04hx\n", val); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 702 | val = ext_read(tmp->phydev, PAGE4, PTP_ESTS); |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 703 | pr_info("slave PTP_ESTS 0x%04hx\n", val); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 704 | event_ts.ns_lo = ext_read(tmp->phydev, PAGE4, PTP_EDATA); |
| 705 | event_ts.ns_hi = ext_read(tmp->phydev, PAGE4, PTP_EDATA); |
| 706 | event_ts.sec_lo = ext_read(tmp->phydev, PAGE4, PTP_EDATA); |
| 707 | event_ts.sec_hi = ext_read(tmp->phydev, PAGE4, PTP_EDATA); |
| 708 | diff = now - (s64) phy2txts(&event_ts); |
| 709 | pr_info("slave offset %lld nanoseconds\n", diff); |
| 710 | diff += ADJTIME_FIX; |
Richard Cochran | 41c2c18 | 2015-03-29 23:12:10 +0200 | [diff] [blame] | 711 | ts = ns_to_timespec64(diff); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 712 | tdr_write(0, tmp->phydev, &ts, PTP_STEP_CLK); |
| 713 | } |
| 714 | |
| 715 | /* |
| 716 | * restore status frames |
| 717 | */ |
| 718 | list_for_each(this, &clock->phylist) { |
| 719 | tmp = list_entry(this, struct dp83640_private, list); |
| 720 | ext_write(0, tmp->phydev, PAGE5, PSF_CFG0, tmp->cfg0); |
| 721 | } |
| 722 | ext_write(0, master, PAGE5, PSF_CFG0, cfg0); |
| 723 | |
| 724 | mutex_unlock(&clock->extreg_lock); |
| 725 | } |
| 726 | |
| 727 | /* time stamping methods */ |
| 728 | |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 729 | static inline u16 exts_chan_to_edata(int ch) |
| 730 | { |
| 731 | return 1 << ((ch + EXT_EVENT) * 2); |
| 732 | } |
| 733 | |
Richard Cochran | 2331038 | 2011-06-14 23:55:19 +0000 | [diff] [blame] | 734 | static int decode_evnt(struct dp83640_private *dp83640, |
Christian Riesch | 13322f2 | 2014-08-21 15:17:04 +0200 | [diff] [blame] | 735 | void *data, int len, u16 ests) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 736 | { |
Richard Cochran | 2331038 | 2011-06-14 23:55:19 +0000 | [diff] [blame] | 737 | struct phy_txts *phy_txts; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 738 | struct ptp_clock_event event; |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 739 | int i, parsed; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 740 | int words = (ests >> EVNT_TS_LEN_SHIFT) & EVNT_TS_LEN_MASK; |
Richard Cochran | 2331038 | 2011-06-14 23:55:19 +0000 | [diff] [blame] | 741 | u16 ext_status = 0; |
| 742 | |
Christian Riesch | 13322f2 | 2014-08-21 15:17:04 +0200 | [diff] [blame] | 743 | /* calculate length of the event timestamp status message */ |
| 744 | if (ests & MULT_EVNT) |
| 745 | parsed = (words + 2) * sizeof(u16); |
| 746 | else |
| 747 | parsed = (words + 1) * sizeof(u16); |
| 748 | |
| 749 | /* check if enough data is available */ |
| 750 | if (len < parsed) |
| 751 | return len; |
| 752 | |
Richard Cochran | 2331038 | 2011-06-14 23:55:19 +0000 | [diff] [blame] | 753 | if (ests & MULT_EVNT) { |
| 754 | ext_status = *(u16 *) data; |
| 755 | data += sizeof(ext_status); |
| 756 | } |
| 757 | |
| 758 | phy_txts = data; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 759 | |
| 760 | switch (words) { /* fall through in every case */ |
| 761 | case 3: |
| 762 | dp83640->edata.sec_hi = phy_txts->sec_hi; |
| 763 | case 2: |
| 764 | dp83640->edata.sec_lo = phy_txts->sec_lo; |
| 765 | case 1: |
| 766 | dp83640->edata.ns_hi = phy_txts->ns_hi; |
| 767 | case 0: |
| 768 | dp83640->edata.ns_lo = phy_txts->ns_lo; |
| 769 | } |
| 770 | |
Christian Riesch | 13322f2 | 2014-08-21 15:17:04 +0200 | [diff] [blame] | 771 | if (!ext_status) { |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 772 | i = ((ests >> EVNT_NUM_SHIFT) & EVNT_NUM_MASK) - EXT_EVENT; |
| 773 | ext_status = exts_chan_to_edata(i); |
| 774 | } |
| 775 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 776 | event.type = PTP_CLOCK_EXTTS; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 777 | event.timestamp = phy2txts(&dp83640->edata); |
| 778 | |
Stefan Sørensen | a0077a9 | 2014-07-11 08:18:26 +0200 | [diff] [blame] | 779 | /* Compensate for input path and synchronization delays */ |
| 780 | event.timestamp -= 35; |
| 781 | |
Richard Cochran | 49b3fd4 | 2011-09-20 01:43:14 +0000 | [diff] [blame] | 782 | for (i = 0; i < N_EXT_TS; i++) { |
| 783 | if (ext_status & exts_chan_to_edata(i)) { |
| 784 | event.index = i; |
| 785 | ptp_clock_event(dp83640->clock->ptp_clock, &event); |
| 786 | } |
| 787 | } |
Richard Cochran | 2331038 | 2011-06-14 23:55:19 +0000 | [diff] [blame] | 788 | |
Christian Riesch | 13322f2 | 2014-08-21 15:17:04 +0200 | [diff] [blame] | 789 | return parsed; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 790 | } |
| 791 | |
Stefan Sørensen | 539e44d | 2015-11-03 09:34:04 +0100 | [diff] [blame] | 792 | #define DP83640_PACKET_HASH_OFFSET 20 |
| 793 | #define DP83640_PACKET_HASH_LEN 10 |
| 794 | |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 795 | static int match(struct sk_buff *skb, unsigned int type, struct rxts *rxts) |
| 796 | { |
Stefan Sørensen | 539e44d | 2015-11-03 09:34:04 +0100 | [diff] [blame] | 797 | u16 *seqid, hash; |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 798 | unsigned int offset = 0; |
| 799 | u8 *msgtype, *data = skb_mac_header(skb); |
| 800 | |
| 801 | /* check sequenceID, messageType, 12 bit hash of offset 20-29 */ |
| 802 | |
| 803 | if (type & PTP_CLASS_VLAN) |
| 804 | offset += VLAN_HLEN; |
| 805 | |
| 806 | switch (type & PTP_CLASS_PMASK) { |
| 807 | case PTP_CLASS_IPV4: |
Richard Cochran | cca04b2 | 2014-11-12 11:33:52 +0100 | [diff] [blame] | 808 | offset += ETH_HLEN + IPV4_HLEN(data + offset) + UDP_HLEN; |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 809 | break; |
| 810 | case PTP_CLASS_IPV6: |
| 811 | offset += ETH_HLEN + IP6_HLEN + UDP_HLEN; |
| 812 | break; |
| 813 | case PTP_CLASS_L2: |
| 814 | offset += ETH_HLEN; |
| 815 | break; |
| 816 | default: |
| 817 | return 0; |
| 818 | } |
| 819 | |
| 820 | if (skb->len + ETH_HLEN < offset + OFF_PTP_SEQUENCE_ID + sizeof(*seqid)) |
| 821 | return 0; |
| 822 | |
| 823 | if (unlikely(type & PTP_CLASS_V1)) |
| 824 | msgtype = data + offset + OFF_PTP_CONTROL; |
| 825 | else |
| 826 | msgtype = data + offset; |
Stefan Sørensen | 539e44d | 2015-11-03 09:34:04 +0100 | [diff] [blame] | 827 | if (rxts->msgtype != (*msgtype & 0xf)) |
| 828 | return 0; |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 829 | |
| 830 | seqid = (u16 *)(data + offset + OFF_PTP_SEQUENCE_ID); |
Stefan Sørensen | 539e44d | 2015-11-03 09:34:04 +0100 | [diff] [blame] | 831 | if (rxts->seqid != ntohs(*seqid)) |
| 832 | return 0; |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 833 | |
Stefan Sørensen | 539e44d | 2015-11-03 09:34:04 +0100 | [diff] [blame] | 834 | hash = ether_crc(DP83640_PACKET_HASH_LEN, |
| 835 | data + offset + DP83640_PACKET_HASH_OFFSET) >> 20; |
| 836 | if (rxts->hash != hash) |
| 837 | return 0; |
| 838 | |
| 839 | return 1; |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 840 | } |
| 841 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 842 | static void decode_rxts(struct dp83640_private *dp83640, |
| 843 | struct phy_rxts *phy_rxts) |
| 844 | { |
| 845 | struct rxts *rxts; |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 846 | struct skb_shared_hwtstamps *shhwtstamps = NULL; |
| 847 | struct sk_buff *skb; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 848 | unsigned long flags; |
| 849 | |
| 850 | spin_lock_irqsave(&dp83640->rx_lock, flags); |
| 851 | |
| 852 | prune_rx_ts(dp83640); |
| 853 | |
| 854 | if (list_empty(&dp83640->rxpool)) { |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 855 | pr_debug("rx timestamp pool is empty\n"); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 856 | goto out; |
| 857 | } |
| 858 | rxts = list_first_entry(&dp83640->rxpool, struct rxts, list); |
| 859 | list_del_init(&rxts->list); |
| 860 | phy2rxts(phy_rxts, rxts); |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 861 | |
Richard Cochran | adbe088 | 2015-05-25 11:55:45 +0200 | [diff] [blame] | 862 | spin_lock(&dp83640->rx_queue.lock); |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 863 | skb_queue_walk(&dp83640->rx_queue, skb) { |
| 864 | struct dp83640_skb_info *skb_info; |
| 865 | |
| 866 | skb_info = (struct dp83640_skb_info *)skb->cb; |
| 867 | if (match(skb, skb_info->ptp_type, rxts)) { |
| 868 | __skb_unlink(skb, &dp83640->rx_queue); |
| 869 | shhwtstamps = skb_hwtstamps(skb); |
| 870 | memset(shhwtstamps, 0, sizeof(*shhwtstamps)); |
| 871 | shhwtstamps->hwtstamp = ns_to_ktime(rxts->ns); |
| 872 | netif_rx_ni(skb); |
| 873 | list_add(&rxts->list, &dp83640->rxpool); |
| 874 | break; |
| 875 | } |
| 876 | } |
Richard Cochran | adbe088 | 2015-05-25 11:55:45 +0200 | [diff] [blame] | 877 | spin_unlock(&dp83640->rx_queue.lock); |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 878 | |
| 879 | if (!shhwtstamps) |
| 880 | list_add_tail(&rxts->list, &dp83640->rxts); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 881 | out: |
| 882 | spin_unlock_irqrestore(&dp83640->rx_lock, flags); |
| 883 | } |
| 884 | |
| 885 | static void decode_txts(struct dp83640_private *dp83640, |
| 886 | struct phy_txts *phy_txts) |
| 887 | { |
| 888 | struct skb_shared_hwtstamps shhwtstamps; |
| 889 | struct sk_buff *skb; |
| 890 | u64 ns; |
| 891 | |
| 892 | /* We must already have the skb that triggered this. */ |
| 893 | |
| 894 | skb = skb_dequeue(&dp83640->tx_queue); |
| 895 | |
| 896 | if (!skb) { |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 897 | pr_debug("have timestamp but tx_queue empty\n"); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 898 | return; |
| 899 | } |
| 900 | ns = phy2txts(phy_txts); |
| 901 | memset(&shhwtstamps, 0, sizeof(shhwtstamps)); |
| 902 | shhwtstamps.hwtstamp = ns_to_ktime(ns); |
| 903 | skb_complete_tx_timestamp(skb, &shhwtstamps); |
| 904 | } |
| 905 | |
| 906 | static void decode_status_frame(struct dp83640_private *dp83640, |
| 907 | struct sk_buff *skb) |
| 908 | { |
| 909 | struct phy_rxts *phy_rxts; |
| 910 | struct phy_txts *phy_txts; |
| 911 | u8 *ptr; |
| 912 | int len, size; |
| 913 | u16 ests, type; |
| 914 | |
| 915 | ptr = skb->data + 2; |
| 916 | |
| 917 | for (len = skb_headlen(skb) - 2; len > sizeof(type); len -= size) { |
| 918 | |
| 919 | type = *(u16 *)ptr; |
| 920 | ests = type & 0x0fff; |
| 921 | type = type & 0xf000; |
| 922 | len -= sizeof(type); |
| 923 | ptr += sizeof(type); |
| 924 | |
| 925 | if (PSF_RX == type && len >= sizeof(*phy_rxts)) { |
| 926 | |
| 927 | phy_rxts = (struct phy_rxts *) ptr; |
| 928 | decode_rxts(dp83640, phy_rxts); |
| 929 | size = sizeof(*phy_rxts); |
| 930 | |
| 931 | } else if (PSF_TX == type && len >= sizeof(*phy_txts)) { |
| 932 | |
| 933 | phy_txts = (struct phy_txts *) ptr; |
| 934 | decode_txts(dp83640, phy_txts); |
| 935 | size = sizeof(*phy_txts); |
| 936 | |
Christian Riesch | 13322f2 | 2014-08-21 15:17:04 +0200 | [diff] [blame] | 937 | } else if (PSF_EVNT == type) { |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 938 | |
Christian Riesch | 13322f2 | 2014-08-21 15:17:04 +0200 | [diff] [blame] | 939 | size = decode_evnt(dp83640, ptr, len, ests); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 940 | |
| 941 | } else { |
| 942 | size = 0; |
| 943 | break; |
| 944 | } |
| 945 | ptr += size; |
| 946 | } |
| 947 | } |
| 948 | |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 949 | static int is_sync(struct sk_buff *skb, int type) |
| 950 | { |
| 951 | u8 *data = skb->data, *msgtype; |
| 952 | unsigned int offset = 0; |
| 953 | |
Stefan Sørensen | ae5c6c6 | 2014-06-27 11:59:10 +0200 | [diff] [blame] | 954 | if (type & PTP_CLASS_VLAN) |
| 955 | offset += VLAN_HLEN; |
| 956 | |
| 957 | switch (type & PTP_CLASS_PMASK) { |
| 958 | case PTP_CLASS_IPV4: |
Richard Cochran | cca04b2 | 2014-11-12 11:33:52 +0100 | [diff] [blame] | 959 | offset += ETH_HLEN + IPV4_HLEN(data + offset) + UDP_HLEN; |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 960 | break; |
Stefan Sørensen | ae5c6c6 | 2014-06-27 11:59:10 +0200 | [diff] [blame] | 961 | case PTP_CLASS_IPV6: |
| 962 | offset += ETH_HLEN + IP6_HLEN + UDP_HLEN; |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 963 | break; |
Stefan Sørensen | ae5c6c6 | 2014-06-27 11:59:10 +0200 | [diff] [blame] | 964 | case PTP_CLASS_L2: |
| 965 | offset += ETH_HLEN; |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 966 | break; |
| 967 | default: |
| 968 | return 0; |
| 969 | } |
| 970 | |
| 971 | if (type & PTP_CLASS_V1) |
| 972 | offset += OFF_PTP_CONTROL; |
| 973 | |
| 974 | if (skb->len < offset + 1) |
| 975 | return 0; |
| 976 | |
| 977 | msgtype = data + offset; |
| 978 | |
| 979 | return (*msgtype & 0xf) == 0; |
| 980 | } |
| 981 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 982 | static void dp83640_free_clocks(void) |
| 983 | { |
| 984 | struct dp83640_clock *clock; |
| 985 | struct list_head *this, *next; |
| 986 | |
| 987 | mutex_lock(&phyter_clocks_lock); |
| 988 | |
| 989 | list_for_each_safe(this, next, &phyter_clocks) { |
| 990 | clock = list_entry(this, struct dp83640_clock, list); |
| 991 | if (!list_empty(&clock->phylist)) { |
Joe Perches | 8d24248 | 2012-06-09 07:49:07 +0000 | [diff] [blame] | 992 | pr_warn("phy list non-empty while unloading\n"); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 993 | BUG(); |
| 994 | } |
| 995 | list_del(&clock->list); |
| 996 | mutex_destroy(&clock->extreg_lock); |
| 997 | mutex_destroy(&clock->clock_lock); |
| 998 | put_device(&clock->bus->dev); |
Richard Cochran | 86dd361 | 2014-03-20 22:21:58 +0100 | [diff] [blame] | 999 | kfree(clock->caps.pin_config); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1000 | kfree(clock); |
| 1001 | } |
| 1002 | |
| 1003 | mutex_unlock(&phyter_clocks_lock); |
| 1004 | } |
| 1005 | |
| 1006 | static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus) |
| 1007 | { |
| 1008 | INIT_LIST_HEAD(&clock->list); |
| 1009 | clock->bus = bus; |
| 1010 | mutex_init(&clock->extreg_lock); |
| 1011 | mutex_init(&clock->clock_lock); |
| 1012 | INIT_LIST_HEAD(&clock->phylist); |
| 1013 | clock->caps.owner = THIS_MODULE; |
| 1014 | sprintf(clock->caps.name, "dp83640 timer"); |
| 1015 | clock->caps.max_adj = 1953124; |
| 1016 | clock->caps.n_alarm = 0; |
| 1017 | clock->caps.n_ext_ts = N_EXT_TS; |
Stefan Sørensen | ad01577 | 2014-06-27 12:05:30 +0200 | [diff] [blame] | 1018 | clock->caps.n_per_out = N_PER_OUT; |
Richard Cochran | 86dd361 | 2014-03-20 22:21:58 +0100 | [diff] [blame] | 1019 | clock->caps.n_pins = DP83640_N_PINS; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1020 | clock->caps.pps = 0; |
| 1021 | clock->caps.adjfreq = ptp_dp83640_adjfreq; |
| 1022 | clock->caps.adjtime = ptp_dp83640_adjtime; |
Richard Cochran | 41c2c18 | 2015-03-29 23:12:10 +0200 | [diff] [blame] | 1023 | clock->caps.gettime64 = ptp_dp83640_gettime; |
| 1024 | clock->caps.settime64 = ptp_dp83640_settime; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1025 | clock->caps.enable = ptp_dp83640_enable; |
Richard Cochran | 86dd361 | 2014-03-20 22:21:58 +0100 | [diff] [blame] | 1026 | clock->caps.verify = ptp_dp83640_verify; |
| 1027 | /* |
| 1028 | * Convert the module param defaults into a dynamic pin configuration. |
| 1029 | */ |
| 1030 | dp83640_gpio_defaults(clock->caps.pin_config); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1031 | /* |
| 1032 | * Get a reference to this bus instance. |
| 1033 | */ |
| 1034 | get_device(&bus->dev); |
| 1035 | } |
| 1036 | |
| 1037 | static int choose_this_phy(struct dp83640_clock *clock, |
| 1038 | struct phy_device *phydev) |
| 1039 | { |
| 1040 | if (chosen_phy == -1 && !clock->chosen) |
| 1041 | return 1; |
| 1042 | |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 1043 | if (chosen_phy == phydev->mdio.addr) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1044 | return 1; |
| 1045 | |
| 1046 | return 0; |
| 1047 | } |
| 1048 | |
| 1049 | static struct dp83640_clock *dp83640_clock_get(struct dp83640_clock *clock) |
| 1050 | { |
| 1051 | if (clock) |
| 1052 | mutex_lock(&clock->clock_lock); |
| 1053 | return clock; |
| 1054 | } |
| 1055 | |
| 1056 | /* |
| 1057 | * Look up and lock a clock by bus instance. |
| 1058 | * If there is no clock for this bus, then create it first. |
| 1059 | */ |
| 1060 | static struct dp83640_clock *dp83640_clock_get_bus(struct mii_bus *bus) |
| 1061 | { |
| 1062 | struct dp83640_clock *clock = NULL, *tmp; |
| 1063 | struct list_head *this; |
| 1064 | |
| 1065 | mutex_lock(&phyter_clocks_lock); |
| 1066 | |
| 1067 | list_for_each(this, &phyter_clocks) { |
| 1068 | tmp = list_entry(this, struct dp83640_clock, list); |
| 1069 | if (tmp->bus == bus) { |
| 1070 | clock = tmp; |
| 1071 | break; |
| 1072 | } |
| 1073 | } |
| 1074 | if (clock) |
| 1075 | goto out; |
| 1076 | |
| 1077 | clock = kzalloc(sizeof(struct dp83640_clock), GFP_KERNEL); |
| 1078 | if (!clock) |
| 1079 | goto out; |
| 1080 | |
Richard Cochran | 86dd361 | 2014-03-20 22:21:58 +0100 | [diff] [blame] | 1081 | clock->caps.pin_config = kzalloc(sizeof(struct ptp_pin_desc) * |
| 1082 | DP83640_N_PINS, GFP_KERNEL); |
| 1083 | if (!clock->caps.pin_config) { |
| 1084 | kfree(clock); |
| 1085 | clock = NULL; |
| 1086 | goto out; |
| 1087 | } |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1088 | dp83640_clock_init(clock, bus); |
| 1089 | list_add_tail(&phyter_clocks, &clock->list); |
| 1090 | out: |
| 1091 | mutex_unlock(&phyter_clocks_lock); |
| 1092 | |
| 1093 | return dp83640_clock_get(clock); |
| 1094 | } |
| 1095 | |
| 1096 | static void dp83640_clock_put(struct dp83640_clock *clock) |
| 1097 | { |
| 1098 | mutex_unlock(&clock->clock_lock); |
| 1099 | } |
| 1100 | |
| 1101 | static int dp83640_probe(struct phy_device *phydev) |
| 1102 | { |
| 1103 | struct dp83640_clock *clock; |
| 1104 | struct dp83640_private *dp83640; |
| 1105 | int err = -ENOMEM, i; |
| 1106 | |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 1107 | if (phydev->mdio.addr == BROADCAST_ADDR) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1108 | return 0; |
| 1109 | |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 1110 | clock = dp83640_clock_get_bus(phydev->mdio.bus); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1111 | if (!clock) |
| 1112 | goto no_clock; |
| 1113 | |
| 1114 | dp83640 = kzalloc(sizeof(struct dp83640_private), GFP_KERNEL); |
| 1115 | if (!dp83640) |
| 1116 | goto no_memory; |
| 1117 | |
| 1118 | dp83640->phydev = phydev; |
Stefan Sørensen | 4b06325 | 2015-11-03 09:34:05 +0100 | [diff] [blame] | 1119 | INIT_DELAYED_WORK(&dp83640->ts_work, rx_timestamp_work); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1120 | |
| 1121 | INIT_LIST_HEAD(&dp83640->rxts); |
| 1122 | INIT_LIST_HEAD(&dp83640->rxpool); |
| 1123 | for (i = 0; i < MAX_RXTS; i++) |
| 1124 | list_add(&dp83640->rx_pool_data[i].list, &dp83640->rxpool); |
| 1125 | |
| 1126 | phydev->priv = dp83640; |
| 1127 | |
| 1128 | spin_lock_init(&dp83640->rx_lock); |
| 1129 | skb_queue_head_init(&dp83640->rx_queue); |
| 1130 | skb_queue_head_init(&dp83640->tx_queue); |
| 1131 | |
| 1132 | dp83640->clock = clock; |
| 1133 | |
| 1134 | if (choose_this_phy(clock, phydev)) { |
| 1135 | clock->chosen = dp83640; |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 1136 | clock->ptp_clock = ptp_clock_register(&clock->caps, |
| 1137 | &phydev->mdio.dev); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1138 | if (IS_ERR(clock->ptp_clock)) { |
| 1139 | err = PTR_ERR(clock->ptp_clock); |
| 1140 | goto no_register; |
| 1141 | } |
| 1142 | } else |
| 1143 | list_add_tail(&dp83640->list, &clock->phylist); |
| 1144 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1145 | dp83640_clock_put(clock); |
| 1146 | return 0; |
| 1147 | |
| 1148 | no_register: |
| 1149 | clock->chosen = NULL; |
| 1150 | kfree(dp83640); |
| 1151 | no_memory: |
| 1152 | dp83640_clock_put(clock); |
| 1153 | no_clock: |
| 1154 | return err; |
| 1155 | } |
| 1156 | |
| 1157 | static void dp83640_remove(struct phy_device *phydev) |
| 1158 | { |
| 1159 | struct dp83640_clock *clock; |
| 1160 | struct list_head *this, *next; |
| 1161 | struct dp83640_private *tmp, *dp83640 = phydev->priv; |
| 1162 | |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 1163 | if (phydev->mdio.addr == BROADCAST_ADDR) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1164 | return; |
| 1165 | |
| 1166 | enable_status_frames(phydev, false); |
Stefan Sørensen | 4b06325 | 2015-11-03 09:34:05 +0100 | [diff] [blame] | 1167 | cancel_delayed_work_sync(&dp83640->ts_work); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1168 | |
Alexander Duyck | db91b72 | 2014-09-08 11:25:34 -0400 | [diff] [blame] | 1169 | skb_queue_purge(&dp83640->rx_queue); |
| 1170 | skb_queue_purge(&dp83640->tx_queue); |
Richard Cochran | 8b3408f | 2011-10-21 00:49:17 +0000 | [diff] [blame] | 1171 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1172 | clock = dp83640_clock_get(dp83640->clock); |
| 1173 | |
| 1174 | if (dp83640 == clock->chosen) { |
| 1175 | ptp_clock_unregister(clock->ptp_clock); |
| 1176 | clock->chosen = NULL; |
| 1177 | } else { |
| 1178 | list_for_each_safe(this, next, &clock->phylist) { |
| 1179 | tmp = list_entry(this, struct dp83640_private, list); |
| 1180 | if (tmp == dp83640) { |
| 1181 | list_del_init(&tmp->list); |
| 1182 | break; |
| 1183 | } |
| 1184 | } |
| 1185 | } |
| 1186 | |
| 1187 | dp83640_clock_put(clock); |
| 1188 | kfree(dp83640); |
| 1189 | } |
| 1190 | |
Stefan Sørensen | 62ad968 | 2014-02-03 15:36:58 +0100 | [diff] [blame] | 1191 | static int dp83640_config_init(struct phy_device *phydev) |
| 1192 | { |
Stefan Sørensen | 602b109 | 2014-02-13 15:26:57 +0100 | [diff] [blame] | 1193 | struct dp83640_private *dp83640 = phydev->priv; |
| 1194 | struct dp83640_clock *clock = dp83640->clock; |
| 1195 | |
| 1196 | if (clock->chosen && !list_empty(&clock->phylist)) |
| 1197 | recalibrate(clock); |
Richard Cochran | a935865 | 2015-05-25 11:55:44 +0200 | [diff] [blame] | 1198 | else { |
| 1199 | mutex_lock(&clock->extreg_lock); |
Stefan Sørensen | 602b109 | 2014-02-13 15:26:57 +0100 | [diff] [blame] | 1200 | enable_broadcast(phydev, clock->page, 1); |
Richard Cochran | a935865 | 2015-05-25 11:55:44 +0200 | [diff] [blame] | 1201 | mutex_unlock(&clock->extreg_lock); |
| 1202 | } |
Stefan Sørensen | 602b109 | 2014-02-13 15:26:57 +0100 | [diff] [blame] | 1203 | |
Stefan Sørensen | 62ad968 | 2014-02-03 15:36:58 +0100 | [diff] [blame] | 1204 | enable_status_frames(phydev, true); |
Richard Cochran | a935865 | 2015-05-25 11:55:44 +0200 | [diff] [blame] | 1205 | |
| 1206 | mutex_lock(&clock->extreg_lock); |
Stefan Sørensen | 62ad968 | 2014-02-03 15:36:58 +0100 | [diff] [blame] | 1207 | ext_write(0, phydev, PAGE4, PTP_CTL, PTP_ENABLE); |
Richard Cochran | a935865 | 2015-05-25 11:55:44 +0200 | [diff] [blame] | 1208 | mutex_unlock(&clock->extreg_lock); |
| 1209 | |
Stefan Sørensen | 62ad968 | 2014-02-03 15:36:58 +0100 | [diff] [blame] | 1210 | return 0; |
| 1211 | } |
| 1212 | |
Stephan Gatzka | 1642182 | 2012-12-04 10:21:38 +0000 | [diff] [blame] | 1213 | static int dp83640_ack_interrupt(struct phy_device *phydev) |
| 1214 | { |
| 1215 | int err = phy_read(phydev, MII_DP83640_MISR); |
| 1216 | |
| 1217 | if (err < 0) |
| 1218 | return err; |
| 1219 | |
| 1220 | return 0; |
| 1221 | } |
| 1222 | |
| 1223 | static int dp83640_config_intr(struct phy_device *phydev) |
| 1224 | { |
| 1225 | int micr; |
| 1226 | int misr; |
| 1227 | int err; |
| 1228 | |
| 1229 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { |
| 1230 | misr = phy_read(phydev, MII_DP83640_MISR); |
| 1231 | if (misr < 0) |
| 1232 | return misr; |
| 1233 | misr |= |
| 1234 | (MII_DP83640_MISR_ANC_INT_EN | |
| 1235 | MII_DP83640_MISR_DUP_INT_EN | |
| 1236 | MII_DP83640_MISR_SPD_INT_EN | |
| 1237 | MII_DP83640_MISR_LINK_INT_EN); |
| 1238 | err = phy_write(phydev, MII_DP83640_MISR, misr); |
| 1239 | if (err < 0) |
| 1240 | return err; |
| 1241 | |
| 1242 | micr = phy_read(phydev, MII_DP83640_MICR); |
| 1243 | if (micr < 0) |
| 1244 | return micr; |
| 1245 | micr |= |
| 1246 | (MII_DP83640_MICR_OE | |
| 1247 | MII_DP83640_MICR_IE); |
| 1248 | return phy_write(phydev, MII_DP83640_MICR, micr); |
| 1249 | } else { |
| 1250 | micr = phy_read(phydev, MII_DP83640_MICR); |
| 1251 | if (micr < 0) |
| 1252 | return micr; |
| 1253 | micr &= |
| 1254 | ~(MII_DP83640_MICR_OE | |
| 1255 | MII_DP83640_MICR_IE); |
| 1256 | err = phy_write(phydev, MII_DP83640_MICR, micr); |
| 1257 | if (err < 0) |
| 1258 | return err; |
| 1259 | |
| 1260 | misr = phy_read(phydev, MII_DP83640_MISR); |
| 1261 | if (misr < 0) |
| 1262 | return misr; |
| 1263 | misr &= |
| 1264 | ~(MII_DP83640_MISR_ANC_INT_EN | |
| 1265 | MII_DP83640_MISR_DUP_INT_EN | |
| 1266 | MII_DP83640_MISR_SPD_INT_EN | |
| 1267 | MII_DP83640_MISR_LINK_INT_EN); |
| 1268 | return phy_write(phydev, MII_DP83640_MISR, misr); |
| 1269 | } |
| 1270 | } |
| 1271 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1272 | static int dp83640_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) |
| 1273 | { |
| 1274 | struct dp83640_private *dp83640 = phydev->priv; |
| 1275 | struct hwtstamp_config cfg; |
| 1276 | u16 txcfg0, rxcfg0; |
| 1277 | |
| 1278 | if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) |
| 1279 | return -EFAULT; |
| 1280 | |
| 1281 | if (cfg.flags) /* reserved for future extensions */ |
| 1282 | return -EINVAL; |
| 1283 | |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 1284 | if (cfg.tx_type < 0 || cfg.tx_type > HWTSTAMP_TX_ONESTEP_SYNC) |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1285 | return -ERANGE; |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 1286 | |
| 1287 | dp83640->hwts_tx_en = cfg.tx_type; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1288 | |
| 1289 | switch (cfg.rx_filter) { |
| 1290 | case HWTSTAMP_FILTER_NONE: |
| 1291 | dp83640->hwts_rx_en = 0; |
| 1292 | dp83640->layer = 0; |
| 1293 | dp83640->version = 0; |
| 1294 | break; |
| 1295 | case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: |
| 1296 | case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: |
| 1297 | case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: |
| 1298 | dp83640->hwts_rx_en = 1; |
Stefan Sørensen | a1f8723 | 2015-11-03 09:34:08 +0100 | [diff] [blame] | 1299 | dp83640->layer = PTP_CLASS_L4; |
| 1300 | dp83640->version = PTP_CLASS_V1; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1301 | break; |
| 1302 | case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: |
| 1303 | case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: |
| 1304 | case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: |
| 1305 | dp83640->hwts_rx_en = 1; |
Stefan Sørensen | a1f8723 | 2015-11-03 09:34:08 +0100 | [diff] [blame] | 1306 | dp83640->layer = PTP_CLASS_L4; |
| 1307 | dp83640->version = PTP_CLASS_V2; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1308 | break; |
| 1309 | case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: |
| 1310 | case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: |
| 1311 | case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: |
| 1312 | dp83640->hwts_rx_en = 1; |
Stefan Sørensen | a1f8723 | 2015-11-03 09:34:08 +0100 | [diff] [blame] | 1313 | dp83640->layer = PTP_CLASS_L2; |
| 1314 | dp83640->version = PTP_CLASS_V2; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1315 | break; |
| 1316 | case HWTSTAMP_FILTER_PTP_V2_EVENT: |
| 1317 | case HWTSTAMP_FILTER_PTP_V2_SYNC: |
| 1318 | case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: |
| 1319 | dp83640->hwts_rx_en = 1; |
Stefan Sørensen | a1f8723 | 2015-11-03 09:34:08 +0100 | [diff] [blame] | 1320 | dp83640->layer = PTP_CLASS_L4 | PTP_CLASS_L2; |
| 1321 | dp83640->version = PTP_CLASS_V2; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1322 | break; |
| 1323 | default: |
| 1324 | return -ERANGE; |
| 1325 | } |
| 1326 | |
| 1327 | txcfg0 = (dp83640->version & TX_PTP_VER_MASK) << TX_PTP_VER_SHIFT; |
| 1328 | rxcfg0 = (dp83640->version & TX_PTP_VER_MASK) << TX_PTP_VER_SHIFT; |
| 1329 | |
Stefan Sørensen | a1f8723 | 2015-11-03 09:34:08 +0100 | [diff] [blame] | 1330 | if (dp83640->layer & PTP_CLASS_L2) { |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1331 | txcfg0 |= TX_L2_EN; |
| 1332 | rxcfg0 |= RX_L2_EN; |
| 1333 | } |
Stefan Sørensen | a1f8723 | 2015-11-03 09:34:08 +0100 | [diff] [blame] | 1334 | if (dp83640->layer & PTP_CLASS_L4) { |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1335 | txcfg0 |= TX_IPV6_EN | TX_IPV4_EN; |
| 1336 | rxcfg0 |= RX_IPV6_EN | RX_IPV4_EN; |
| 1337 | } |
| 1338 | |
| 1339 | if (dp83640->hwts_tx_en) |
| 1340 | txcfg0 |= TX_TS_EN; |
| 1341 | |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 1342 | if (dp83640->hwts_tx_en == HWTSTAMP_TX_ONESTEP_SYNC) |
| 1343 | txcfg0 |= SYNC_1STEP | CHK_1STEP; |
| 1344 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1345 | if (dp83640->hwts_rx_en) |
| 1346 | rxcfg0 |= RX_TS_EN; |
| 1347 | |
| 1348 | mutex_lock(&dp83640->clock->extreg_lock); |
| 1349 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1350 | ext_write(0, phydev, PAGE5, PTP_TXCFG0, txcfg0); |
| 1351 | ext_write(0, phydev, PAGE5, PTP_RXCFG0, rxcfg0); |
| 1352 | |
| 1353 | mutex_unlock(&dp83640->clock->extreg_lock); |
| 1354 | |
| 1355 | return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; |
| 1356 | } |
| 1357 | |
| 1358 | static void rx_timestamp_work(struct work_struct *work) |
| 1359 | { |
| 1360 | struct dp83640_private *dp83640 = |
Stefan Sørensen | 4b06325 | 2015-11-03 09:34:05 +0100 | [diff] [blame] | 1361 | container_of(work, struct dp83640_private, ts_work.work); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1362 | struct sk_buff *skb; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1363 | |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 1364 | /* Deliver expired packets. */ |
| 1365 | while ((skb = skb_dequeue(&dp83640->rx_queue))) { |
| 1366 | struct dp83640_skb_info *skb_info; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1367 | |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 1368 | skb_info = (struct dp83640_skb_info *)skb->cb; |
| 1369 | if (!time_after(jiffies, skb_info->tmo)) { |
| 1370 | skb_queue_head(&dp83640->rx_queue, skb); |
| 1371 | break; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1372 | } |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 1373 | |
Manfred Rudigier | 72092cc | 2012-01-09 23:52:15 +0000 | [diff] [blame] | 1374 | netif_rx_ni(skb); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1375 | } |
| 1376 | |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 1377 | if (!skb_queue_empty(&dp83640->rx_queue)) |
Stefan Sørensen | 4b06325 | 2015-11-03 09:34:05 +0100 | [diff] [blame] | 1378 | schedule_delayed_work(&dp83640->ts_work, SKB_TIMESTAMP_TIMEOUT); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1379 | } |
| 1380 | |
| 1381 | static bool dp83640_rxtstamp(struct phy_device *phydev, |
| 1382 | struct sk_buff *skb, int type) |
| 1383 | { |
| 1384 | struct dp83640_private *dp83640 = phydev->priv; |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 1385 | struct dp83640_skb_info *skb_info = (struct dp83640_skb_info *)skb->cb; |
| 1386 | struct list_head *this, *next; |
| 1387 | struct rxts *rxts; |
| 1388 | struct skb_shared_hwtstamps *shhwtstamps = NULL; |
| 1389 | unsigned long flags; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1390 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1391 | if (is_status_frame(skb, type)) { |
| 1392 | decode_status_frame(dp83640, skb); |
Richard Cochran | ae6e86b | 2011-06-14 23:55:20 +0000 | [diff] [blame] | 1393 | kfree_skb(skb); |
| 1394 | return true; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1395 | } |
| 1396 | |
Stefan Sørensen | a12f78c | 2014-06-25 14:40:16 +0200 | [diff] [blame] | 1397 | if (!dp83640->hwts_rx_en) |
| 1398 | return false; |
| 1399 | |
Stefan Sørensen | a1f8723 | 2015-11-03 09:34:08 +0100 | [diff] [blame] | 1400 | if ((type & dp83640->version) == 0 || (type & dp83640->layer) == 0) |
| 1401 | return false; |
| 1402 | |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 1403 | spin_lock_irqsave(&dp83640->rx_lock, flags); |
Stefan Sørensen | ccf6ee9 | 2015-11-03 09:34:06 +0100 | [diff] [blame] | 1404 | prune_rx_ts(dp83640); |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 1405 | list_for_each_safe(this, next, &dp83640->rxts) { |
| 1406 | rxts = list_entry(this, struct rxts, list); |
| 1407 | if (match(skb, type, rxts)) { |
| 1408 | shhwtstamps = skb_hwtstamps(skb); |
| 1409 | memset(shhwtstamps, 0, sizeof(*shhwtstamps)); |
| 1410 | shhwtstamps->hwtstamp = ns_to_ktime(rxts->ns); |
| 1411 | netif_rx_ni(skb); |
| 1412 | list_del_init(&rxts->list); |
| 1413 | list_add(&rxts->list, &dp83640->rxpool); |
| 1414 | break; |
| 1415 | } |
| 1416 | } |
| 1417 | spin_unlock_irqrestore(&dp83640->rx_lock, flags); |
| 1418 | |
| 1419 | if (!shhwtstamps) { |
| 1420 | skb_info->ptp_type = type; |
Stefan Sørensen | 4b06325 | 2015-11-03 09:34:05 +0100 | [diff] [blame] | 1421 | skb_info->tmo = jiffies + SKB_TIMESTAMP_TIMEOUT; |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 1422 | skb_queue_tail(&dp83640->rx_queue, skb); |
Stefan Sørensen | 4b06325 | 2015-11-03 09:34:05 +0100 | [diff] [blame] | 1423 | schedule_delayed_work(&dp83640->ts_work, SKB_TIMESTAMP_TIMEOUT); |
| 1424 | } else { |
| 1425 | netif_rx_ni(skb); |
Stefan Sørensen | 63502b8 | 2014-07-22 15:20:45 +0200 | [diff] [blame] | 1426 | } |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1427 | |
| 1428 | return true; |
| 1429 | } |
| 1430 | |
| 1431 | static void dp83640_txtstamp(struct phy_device *phydev, |
| 1432 | struct sk_buff *skb, int type) |
| 1433 | { |
| 1434 | struct dp83640_private *dp83640 = phydev->priv; |
| 1435 | |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 1436 | switch (dp83640->hwts_tx_en) { |
| 1437 | |
| 1438 | case HWTSTAMP_TX_ONESTEP_SYNC: |
| 1439 | if (is_sync(skb, type)) { |
Alexander Duyck | 62bccb8 | 2014-09-04 13:31:35 -0400 | [diff] [blame] | 1440 | kfree_skb(skb); |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 1441 | return; |
| 1442 | } |
| 1443 | /* fall through */ |
| 1444 | case HWTSTAMP_TX_ON: |
Stefan Sørensen | e2e2f51 | 2014-02-03 15:36:35 +0100 | [diff] [blame] | 1445 | skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 1446 | skb_queue_tail(&dp83640->tx_queue, skb); |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 1447 | break; |
| 1448 | |
| 1449 | case HWTSTAMP_TX_OFF: |
| 1450 | default: |
Alexander Duyck | 62bccb8 | 2014-09-04 13:31:35 -0400 | [diff] [blame] | 1451 | kfree_skb(skb); |
Richard Cochran | dccaa9e | 2011-09-20 01:43:16 +0000 | [diff] [blame] | 1452 | break; |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1453 | } |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1454 | } |
| 1455 | |
Richard Cochran | 7dff349 | 2012-04-03 22:59:18 +0000 | [diff] [blame] | 1456 | static int dp83640_ts_info(struct phy_device *dev, struct ethtool_ts_info *info) |
| 1457 | { |
| 1458 | struct dp83640_private *dp83640 = dev->priv; |
| 1459 | |
| 1460 | info->so_timestamping = |
| 1461 | SOF_TIMESTAMPING_TX_HARDWARE | |
| 1462 | SOF_TIMESTAMPING_RX_HARDWARE | |
| 1463 | SOF_TIMESTAMPING_RAW_HARDWARE; |
| 1464 | info->phc_index = ptp_clock_index(dp83640->clock->ptp_clock); |
| 1465 | info->tx_types = |
| 1466 | (1 << HWTSTAMP_TX_OFF) | |
| 1467 | (1 << HWTSTAMP_TX_ON) | |
| 1468 | (1 << HWTSTAMP_TX_ONESTEP_SYNC); |
| 1469 | info->rx_filters = |
| 1470 | (1 << HWTSTAMP_FILTER_NONE) | |
| 1471 | (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | |
Richard Cochran | 7dff349 | 2012-04-03 22:59:18 +0000 | [diff] [blame] | 1472 | (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | |
Richard Cochran | 7dff349 | 2012-04-03 22:59:18 +0000 | [diff] [blame] | 1473 | (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | |
Jacob Keller | 11b1544 | 2015-04-22 14:40:37 -0700 | [diff] [blame] | 1474 | (1 << HWTSTAMP_FILTER_PTP_V2_EVENT); |
Richard Cochran | 7dff349 | 2012-04-03 22:59:18 +0000 | [diff] [blame] | 1475 | return 0; |
| 1476 | } |
| 1477 | |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1478 | static struct phy_driver dp83640_driver = { |
| 1479 | .phy_id = DP83640_PHY_ID, |
| 1480 | .phy_id_mask = 0xfffffff0, |
| 1481 | .name = "NatSemi DP83640", |
| 1482 | .features = PHY_BASIC_FEATURES, |
Stephan Gatzka | 1642182 | 2012-12-04 10:21:38 +0000 | [diff] [blame] | 1483 | .flags = PHY_HAS_INTERRUPT, |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1484 | .probe = dp83640_probe, |
| 1485 | .remove = dp83640_remove, |
Stefan Sørensen | 62ad968 | 2014-02-03 15:36:58 +0100 | [diff] [blame] | 1486 | .config_init = dp83640_config_init, |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1487 | .config_aneg = genphy_config_aneg, |
| 1488 | .read_status = genphy_read_status, |
Stephan Gatzka | 1642182 | 2012-12-04 10:21:38 +0000 | [diff] [blame] | 1489 | .ack_interrupt = dp83640_ack_interrupt, |
| 1490 | .config_intr = dp83640_config_intr, |
Richard Cochran | 7dff349 | 2012-04-03 22:59:18 +0000 | [diff] [blame] | 1491 | .ts_info = dp83640_ts_info, |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1492 | .hwtstamp = dp83640_hwtstamp, |
| 1493 | .rxtstamp = dp83640_rxtstamp, |
| 1494 | .txtstamp = dp83640_txtstamp, |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1495 | }; |
| 1496 | |
| 1497 | static int __init dp83640_init(void) |
| 1498 | { |
Andrew Lunn | be01da7 | 2016-01-06 20:11:22 +0100 | [diff] [blame] | 1499 | return phy_driver_register(&dp83640_driver, THIS_MODULE); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1500 | } |
| 1501 | |
| 1502 | static void __exit dp83640_exit(void) |
| 1503 | { |
| 1504 | dp83640_free_clocks(); |
| 1505 | phy_driver_unregister(&dp83640_driver); |
| 1506 | } |
| 1507 | |
| 1508 | MODULE_DESCRIPTION("National Semiconductor DP83640 PHY driver"); |
Richard Cochran | fbf4b93 | 2014-03-20 22:21:56 +0100 | [diff] [blame] | 1509 | MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>"); |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1510 | MODULE_LICENSE("GPL"); |
| 1511 | |
| 1512 | module_init(dp83640_init); |
| 1513 | module_exit(dp83640_exit); |
| 1514 | |
John Stultz | 86ff9baa | 2011-05-23 13:32:11 -0700 | [diff] [blame] | 1515 | static struct mdio_device_id __maybe_unused dp83640_tbl[] = { |
Richard Cochran | cb646e2 | 2011-04-22 12:04:55 +0200 | [diff] [blame] | 1516 | { DP83640_PHY_ID, 0xfffffff0 }, |
| 1517 | { } |
| 1518 | }; |
| 1519 | |
| 1520 | MODULE_DEVICE_TABLE(mdio, dp83640_tbl); |