| ## This file is used by NFC NXP NCI HAL(external/libnfc-nci/halimpl/pn547) |
| ## and NFC Service Java Native Interface Extensions (packages/apps/Nfc/nci/jni/extns/pn547) |
| ############################################################################### |
| # Application options |
| # Logging Levels |
| # NXPLOG_DEFAULT_LOGLEVEL 0x01 |
| # ANDROID_LOG_DEBUG 0x03 |
| # ANDROID_LOG_WARN 0x02 |
| # ANDROID_LOG_ERROR 0x01 |
| # ANDROID_LOG_SILENT 0x00 |
| NXPLOG_EXTNS_LOGLEVEL=0x03 |
| NXPLOG_NCIHAL_LOGLEVEL=0x03 |
| NXPLOG_NCIX_LOGLEVEL=0x03 |
| NXPLOG_NCIR_LOGLEVEL=0x03 |
| NXPLOG_FWDNLD_LOGLEVEL=0x03 |
| NXPLOG_TML_LOGLEVEL=0x03 |
| |
| ############################################################################### |
| # Nfc Device Node name |
| NXP_NFC_DEV_NODE="/dev/nq-nci" |
| |
| ############################################################################### |
| # Extension for Mifare reader enable |
| MIFARE_READER_ENABLE=0x01 |
| |
| ############################################################################### |
| # Vzw Feature enable |
| VZW_FEATURE_ENABLE=0x01 |
| |
| ############################################################################### |
| # File name for Firmware |
| NXP_FW_NAME="libpn553_fw.so" |
| |
| ############################################################################### |
| # System clock source selection configuration |
| #define CLK_SRC_XTAL 1 |
| #define CLK_SRC_PLL 2 |
| NXP_SYS_CLK_SRC_SEL=0x02 |
| |
| ############################################################################### |
| # System clock frequency selection configuration |
| #define CLK_FREQ_13MHZ 1 |
| #define CLK_FREQ_19_2MHZ 2 |
| #define CLK_FREQ_24MHZ 3 |
| #define CLK_FREQ_26MHZ 4 |
| #define CLK_FREQ_32MHZ 5 |
| #define CLK_FREQ_38_4MHZ 6 |
| #define CLK_FREQ_52MHZ 7 |
| NXP_SYS_CLK_FREQ_SEL=0x02 |
| |
| ############################################################################### |
| # The timeout value to be used for clock request acknowledgment |
| # min value = 0x01 to max = 0x06 |
| NXP_SYS_CLOCK_TO_CFG=0x01 |
| |
| ############################################################################### |
| # NXP proprietary settings |
| NXP_ACT_PROP_EXTN={2F, 02, 00} |
| |
| ############################################################################### |
| # NFC forum profile settings |
| NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00} |
| |
| ############################################################################### |
| # NFCC Configuration Control |
| # Allow NFCC to manage RF Config 0x01 |
| # Don't allow NFCC to manage RF Config 0x00 |
| NXP_NFC_MERGE_RF_PARAMS={20, 02, 04, 01, 85, 01, 01} |
| |
| ############################################################################### |
| # Standby enable settings |
| #NXP_CORE_STANDBY={2F, 00, 01, 01} |
| |
| ############################################################################### |
| # NXP TVDD configurations settings |
| # Allow NFCC to configure External TVDD, two configurations (1 and 2) supported, |
| # out of them only one can be configured at a time. |
| NXP_EXT_TVDD_CFG=0x02 |
| |
| ############################################################################### |
| #config1:SLALM, 3.3V for both RM and CM |
| NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C} |
| |
| ############################################################################### |
| #config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM, |
| #monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms |
| NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, C2, 00, BA, 1E, 15, 00, D0, 0C} |
| |
| ############################################################################### |
| # NXP RF configuration ALM/PLM settings |
| # This section needs to be updated with the correct values based on the platform |
| # DPC deactivated |
| NXP_RF_CONF_BLK_1={ |
| 20, 02, FC, 1F, |
| A0, 0D, 03, 02, 43, A0, |
| A0, 0D, 04, 00, 42, FF, FF, |
| A0, 0D, 06, 02, 44, 00, 08, F6, 00, |
| A0, 0D, 06, 02, 45, 80, 40, 00, 00, |
| A0, 0D, 06, 02, 4A, 00, 00, 00, 00, |
| A0, 0D, 03, 02, 40, 00, |
| A0, 0D, 03, 02, 47, 00, |
| A0, 0D, 06, 02, 35, 00, 3E, 00, 00, |
| A0, 0D, 06, 02, 33, 0F, 40, 04, 00, |
| A0, 0D, 06, 04, 35, F4, 05, 70, 02, |
| A0, 0D, 06, 04, 42, F8, 40, FF, FF, |
| A0, 0D, 06, C2, 35, 00, 3E, 00, 03, |
| A0, 0D, 06, C2, 34, F7, 7F, 10, 08, |
| A0, 0D, 06, C2, 33, 03, 40, 04, 80, |
| A0, 0D, 06, 06, 2D, 0D, 25, 2C, 01, |
| A0, 0D, 06, 06, 44, 04, 04, C4, 00, |
| A0, 0D, 06, 06, 30, 70, 00, 18, 00, |
| A0, 0D, 06, 06, 45, 83, 60, 40, 05, |
| A0, 0D, 06, 06, 42, 00, 02, FF, FF, |
| A0, 0D, 06, 06, 16, 6E, 00, 1F, 00, |
| A0, 0D, 03, 06, 15, 00, |
| A0, 0D, 06, 06, 37, 08, 76, 00, 00, |
| A0, 0D, 06, 07, 30, 00, 00, 00, 00, |
| A0, 0D, 06, 07, 37, 00, 00, 00, 00, |
| A0, 0D, 06, 07, 42, 01, 10, FF, FF, |
| A0, 0D, 03, 07, 3F, 08, |
| A0, 0D, 03, 32, 03, 3D, |
| A0, 0D, 04, 32, 42, F8, 40, |
| A0, 0D, 03, 32, 16, 01, |
| A0, 0D, 03, 32, 15, 01, |
| A0, 0D, 06, 32, 4A, 53, 07, 00, 1B |
| } |
| |
| ############################################################################### |
| # NXP RF configuration ALM/PLM settings |
| # This section needs to be updated with the correct values based on the platform |
| # DLMA Deactivated |
| |
| NXP_RF_CONF_BLK_2={ |
| 20, 02, FB, 22, |
| A0, 0D, 03, 32, 0D, 24, |
| A0, 0D, 03, 32, 14, 24, |
| A0, 0D, 06, 34, 2D, DC, 20, 04, 00, |
| A0, 0D, 06, 34, 44, 77, 0B, 00, 00, |
| A0, 0D, 06, 3A, 4A, 56, 07, 01, 1B, |
| A0, 0D, 04, 3A, 42, 68, 40, |
| A0, 0D, 03, 3A, 16, 00, |
| A0, 0D, 03, 3A, 15, 00, |
| A0, 0D, 03, 3A, 0D, 11, |
| A0, 0D, 03, 3A, 14, 11, |
| A0, 0D, 06, 3C, 2D, 05, 35, 1E, 01, |
| A0, 0D, 06, 3C, 44, 65, 09, 00, 00, |
| A0, 0D, 06, 3E, 4A, 56, 07, 01, 1B, |
| A0, 0D, 04, 3E, 42, 68, 40, |
| A0, 0D, 03, 3E, 16, 00, |
| A0, 0D, 03, 3E, 15, 00, |
| A0, 0D, 03, 3E, 0D, 08, |
| A0, 0D, 03, 3E, 14, 08, |
| A0, 0D, 06, 40, 2D, 05, 45, 1E, 01, |
| A0, 0D, 06, 40, 44, 65, 09, 00, 00, |
| A0, 0D, 04, 42, 42, F0, 40, |
| A0, 0D, 06, 42, 4A, 11, 07, 01, 1B, |
| A0, 0D, 03, 42, 16, 00, |
| A0, 0D, 03, 42, 15, 00, |
| A0, 0D, 03, 42, 0D, 04, |
| A0, 0D, 03, 42, 14, 04, |
| A0, 0D, 06, 48, 44, 65, 0A, 00, 00, |
| A0, 0D, 06, 48, 2D, 15, 34, 1F, 01, |
| A0, 0D, 06, 46, 0F, 6C, 01, 04, 00, |
| A0, 0D, 06, 46, 4A, 33, 07, 00, 07, |
| A0, 0D, 04, 46, 42, 68, 40, |
| A0, 0D, 03, 46, 16, 00, |
| A0, 0D, 03, 46, 15, 00, |
| A0, 0D, 06, 4C, 44, 65, 09, 00, 00 |
| } |
| |
| ############################################################################### |
| # NXP RF configuration ALM/PLM settings |
| # This section needs to be updated with the correct values based on the platform |
| |
| NXP_RF_CONF_BLK_3={ |
| 20, 02, F9, 21, |
| A0, 0D, 06, 4C, 2D, 05, 35, 1E, 01, |
| A0, 0D, 06, 4A, 4A, 13, 07, 01, 07, |
| A0, 0D, 04, 4A, 42, 68, 40, |
| A0, 0D, 03, 4A, 16, 00, |
| A0, 0D, 03, 4A, 15, 00, |
| A0, 0D, 06, 50, 44, 65, 09, 00, 00, |
| A0, 0D, 06, 50, 2D, 05, 35, 1E, 01, |
| A0, 0D, 06, 4E, 4A, 12, 07, 01, 07, |
| A0, 0D, 04, 4E, 42, 68, 40, |
| A0, 0D, 03, 4E, 16, 00, |
| A0, 0D, 03, 4E, 15, 00, |
| A0, 0D, 04, 52, 42, 68, 40, |
| A0, 0D, 06, 52, 4A, 11, 07, 01, 07, |
| A0, 0D, 03, 52, 16, 00, |
| A0, 0D, 03, 52, 15, 00, |
| A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01, |
| A0, 0D, 06, 58, 44, 55, 08, 00, 00, |
| A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01, |
| A0, 0D, 06, 5E, 44, 55, 08, 00, 00, |
| A0, 0D, 04, 56, 42, 78, 40, |
| A0, 0D, 06, 56, 4A, 43, 07, 00, 07, |
| A0, 0D, 03, 56, 16, 00, |
| A0, 0D, 03, 56, 15, 00, |
| A0, 0D, 04, 5C, 42, 80, 40, |
| A0, 0D, 06, 5C, 4A, 11, 07, 01, 07, |
| A0, 0D, 03, 5C, 16, 00, |
| A0, 0D, 03, 5C, 15, 00, |
| A0, 0D, 06, 30, 44, 05, 04, C4, 00, |
| A0, 0D, 03, 24, 03, 7F, |
| A0, 0D, 06, 7A, 16, 8E, 00, 1F, 00, |
| A0, 0D, 03, 28, 16, 00, |
| A0, 0D, 03, 2C, 16, 00, |
| A0, 0D, 06, 70, 44, 04, 04, C4, 00 |
| } |
| |
| ############################################################################### |
| # NXP RF configuration ALM/PLM settings |
| # This section needs to be updated with the correct values based on the platform |
| |
| NXP_RF_CONF_BLK_4={ |
| 20, 02, FA, 1F, |
| A0, 0D, 06, 74, 30, E0, 00, 30, 00, |
| A0, 0D, 03, 74, 45, 70, |
| A0, 0D, 03, 75, 45, 60, |
| A0, 0D, 06, 78, 30, 40, 00, 20, 00, |
| A0, 0D, 06, 78, 44, 02, 04, C4, 00, |
| A0, 0D, 06, 7C, 30, 26, 00, 08, 00, |
| A0, 0D, 06, 7C, 44, 11, 00, C4, 00, |
| A0, 0D, 06, 80, 30, 70, 00, 18, 00, |
| A0, 0D, 06, 80, 44, 04, 04, C4, 00, |
| A0, 0D, 06, 84, 30, B0, 00, 45, 00, |
| A0, 0D, 06, 88, 30, B0, 00, 45, 00, |
| A0, 0D, 06, 8C, 30, 70, 00, 18, 00, |
| A0, 0D, 03, 92, 30, 00, |
| A0, 0D, 03, 93, 30, 00, |
| A0, 0D, 06, 08, 45, C3, 82, 71, 05, |
| A0, 0D, 03, 0A, 44, 60, |
| A0, 0D, 06, 0A, 30, 70, 00, 18, 00, |
| A0, 0D, 03, 0A, 48, 10, |
| A0, 0D, 06, 0A, 45, 80, 40, 00, 00, |
| A0, 0D, 06, 0A, 2D, 0D, 25, 2C, 01, |
| A0, 0D, 03, 0A, 35, 0C, |
| A0, 0D, 06, 0B, 30, 00, 00, 00, 00, |
| A0, 0D, 03, 0B, 48, 00, |
| A0, 0D, 06, 0B, 85, 00, 00, 00, 00, |
| A0, 0D, 06, 1E, 44, 05, 04, C4, 00, |
| A0, 0D, 06, 36, 44, 04, 04, C4, 00, |
| A0, 0D, 03, 10, 16, 00, |
| A0, 0D, 06, 10, 37, 00, 00, 00, 00, |
| A0, 0D, 03, 10, 35, 0C, |
| A0, 0D, 06, C4, 42, F8, 40, FF, FF, |
| A0, 0D, 06, C4, 4A, 53, 07, 00, 1B |
| } |
| |
| ############################################################################### |
| # NXP RF configuration ALM/PLM settings |
| # This section needs to be updated with the correct values based on the platform |
| |
| NXP_RF_CONF_BLK_5={ |
| 20, 02, BC, 0E, |
| A0, 0D, 06, C6, 42, 78, 40, FF, FF, |
| A0, 0D, 06, C6, 4A, 43, 07, 00, 07, |
| A0, 0D, 06, C8, 42, 80, 40, FF, FF, |
| A0, 0D, 06, C8, 4A, 11, 07, 01, 07, |
| A0, 0D, 03, 6C, 16, 01, |
| A0, 0D, 03, 6C, 15, 01, |
| A0, 0D, 03, 90, 16, 00, |
| A0, 0D, 03, 90, 15, 00, |
| A0, 0D, 03, 96, 16, 00, |
| A0, 0D, 03, 96, 15, 00, |
| A0, 0D, 04, CA, 42, 68, 40, |
| A0, 0D, 06, CA, 44, 65, 0A, 00, 00, |
| A0, 0D, 06, CA, 2D, 15, 34, 1F, 01, |
| A0, 0B, 57, 12, 12, 90, 78, 0F, 4E, 00, 3D, 95, 00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, 9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, 9F, 00, 00, A7, 9F, 00, 00, B0, 9F, 00, 00, B9, 1F, 00, 00 |
| } |
| |
| ############################################################################### |
| # NXP RF configuration ALM/PLM settings |
| # This section needs to be updated with the correct values based on the platform |
| |
| NXP_RF_CONF_BLK_6={ |
| 20, 02, D6, 01, |
| A0, 34, D2, 23, 04, 18, 07, 40, 00, 20, 40, 00, BE, 23, 60, 00, 2B, 13, 40, 00, B8, 21, 60, 00, 38, 35, 00, 00, 18, 46, 08, 00, DE, 54, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 07, 00, 20, 40, 00, BE, 23, 60, 00, 2B, 13, 40, 00, B8, 21, 60, 00, 38, 35, 00, 00, 18, 46, 08, 00, DE, 54, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 00, 00 |
| } |
| |
| ############################################################################### |
| # Set configuration optimization decision setting |
| # Enable = 0x01 |
| # Disable = 0x00 |
| NXP_SET_CONFIG_ALWAYS=0x00 |
| |
| ############################################################################### |
| # Core configuration extensions |
| # It includes |
| # Wired mode settings A0ED, A0EE |
| # Tag Detector A040, A041, A043 |
| # Low Power mode A007 |
| # Clock settings A002, A003 |
| # PbF settings A008 |
| # Clock timeout settings A004 |
| # eSE (SVDD) PWR REQ settings A0F2 |
| # How eSE connected to PN553 A012 |
| # UICC2 bit rate A0D1 |
| # SWP1A interface A0D4 |
| # DWP intf behavior config, SVDD Load activated by default if set to 0x31 - A037 |
| NXP_CORE_CONF_EXTN={20, 02, 40, 0D, |
| A0, EC, 01, 01, |
| A0, ED, 01, 00, |
| A0, 5E, 01, 01, |
| A0, 12, 01, 02, |
| A0, 40, 01, 01, |
| A0, 43, 01, 05, |
| A0, DD, 01, 2D, |
| A0, D1, 01, 02, |
| A0, D4, 01, 01, |
| A0, 37, 01, 35, |
| A0, B1, 02, DC, 05, |
| A0, 38, 04, 14, 0B, 0B, 00, |
| A0, 3A, 08, E6, 00, E6, 00, E6, 00, E6, 00 |
| } |
| # A0, F2, 01, 01, |
| # A0, 41, 01, 02, |
| # A0, 02, 01, 01, |
| # A0, 03, 01, 11, |
| # A0, 07, 01, 03, |
| # A0, 08, 01, 01 |
| # } |
| |
| ############################################################################### |
| # Core configuration rf field filter settings to enable set to 01 to disable set |
| # to 00 last bit |
| NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00 } |
| |
| ############################################################################### |
| # To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set |
| # to 0x00 |
| NXP_I2C_FRAGMENTATION_ENABLED=0x00 |
| |
| ############################################################################### |
| # Core configuration settings |
| NXP_CORE_CONF={ 20, 02, 2A, 0E, |
| 28, 01, 00, |
| 21, 01, 00, |
| 30, 01, 08, |
| 31, 01, 03, |
| 32, 01, 60, |
| 38, 01, 01, |
| 33, 00, |
| 54, 01, 06, |
| 50, 01, 02, |
| 5B, 01, 00, |
| 80, 01, 01, |
| 81, 01, 01, |
| 82, 01, 0E, |
| 18, 01, 01 |
| } |
| |
| ############################################################################### |
| # Mifare Classic Key settings |
| #NXP_CORE_MFCKEY_SETTING={20, 02, 25,04, A0, 51, 06, A0, A1, A2, A3, A4, A5, |
| # A0, 52, 06, D3, F7, D3, F7, D3, F7, |
| # A0, 53, 06, FF, FF, FF, FF, FF, FF, |
| # A0, 54, 06, 00, 00, 00, 00, 00, 00} |
| |
| |
| ############################################################################### |
| # Default SE Options |
| # No secure element 0x00 |
| # eSE 0x01 |
| # UICC 0x02 |
| # UICC2 0x04 |
| |
| NXP_DEFAULT_SE=0x02 |
| |
| ############################################################################### |
| #Enable SWP full power mode when phone is power off |
| NXP_SWP_FULL_PWR_ON=0x00 |
| |
| ############################################################################### |
| #### Select the CHIP #### |
| #PN547C2 0x01 |
| #PN65T 0x02 |
| #PN548AD 0x03 |
| #PN66T 0x04 |
| #PN551 0x05 |
| #PN67T 0x06 |
| #PN553 0x07 |
| #PN80T 0x08 |
| NXP_NFC_CHIP=0x07 |
| |
| ############################################################################### |
| # CE when Screen state is locked |
| # This setting is for DEFAULT_AID_ROUTE, |
| # DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE |
| # Disable 0x00 |
| # Enable 0x01 |
| NXP_CE_ROUTE_STRICT_DISABLE=0x01 |
| |
| ############################################################################### |
| #Timeout in secs to get NFCEE Discover notification |
| NXP_DEFAULT_NFCEE_DISC_TIMEOUT=20 |
| |
| ############################################################################### |
| NXP_DEFAULT_NFCEE_TIMEOUT=20 |
| |
| ############################################################################### |
| #Timeout in secs |
| NXP_SWP_RD_START_TIMEOUT=0x0A |
| |
| ############################################################################### |
| #Timeout in secs |
| NXP_SWP_RD_TAG_OP_TIMEOUT=0x01 |
| |
| ############################################################################### |
| #Set the default AID route Location : |
| #This settings will be used when application does not set this parameter |
| # host 0x00 |
| # eSE 0x01 |
| # UICC 0x02 |
| DEFAULT_AID_ROUTE=0x02 |
| |
| ############################################################################### |
| # Configure the default NfcA/IsoDep techology and protocol route. Can be |
| # either a secure element (e.g. 0xF4) or the host (0x00) |
| # host 0x00 |
| # eSE 0x01 |
| # UICC 0x02 |
| DEFAULT_ISODEP_ROUTE=0x02 |
| |
| ############################################################################### |
| # Configure the single default SE to use. The default is to use the first |
| # SE that is detected by the stack. This value might be used when the phone |
| # supports multiple SE (e.g. 0xC0 and 0x80) but you want to force it to use |
| # one of them (e.g. 0xC0). |
| # host 0x00 |
| # eSE 0x01 |
| # UICC 0x02 |
| DEFAULT_OFFHOST_ROUTE=0x02 |
| |
| ############################################################################### |
| # Configure the single default SE to use. The default is to use the first |
| # SE that is detected by the stack. This value might be used when the phone |
| # supports multiple SE (e.g. 0xF3 and 0xF4) but you want to force it to use |
| # one of them (e.g. 0xF4). |
| # host 0x00 |
| # eSE 0x01 |
| # UICC 0x02 |
| DEFAULT_NFCF_ROUTE=0x02 |
| |
| ############################################################################### |
| #Set the default Felica T3T System Code OffHost route Location : |
| #This settings will be used when application does not set this parameter |
| # host 0x00 |
| # eSE 0x01 |
| DEFAULT_SYS_CODE_ROUTE=0x01 |
| |
| ############################################################################### |
| #Set the default AID Power state : |
| #This settings will be used when application does not set this parameter |
| # bit pos 0 = Switch On |
| # bit pos 1 = Switch Off |
| # bit pos 2 = Battery Off |
| # bit pos 3 = Screen Off |
| # bit pos 4 = Screen Lock |
| DEFAULT_AID_PWR_STATE=0x1B |
| |
| ############################################################################### |
| #Set the Mifare Desfire Power state : |
| #This settings will be used when application does not set this parameter |
| # bit pos 0 = Switch On |
| # bit pos 1 = Switch Off |
| # bit pos 2 = Battery Off |
| # bit pos 3 = Screen Off |
| # bit pos 4 = Screen Lock |
| DEFAULT_ISODEP_PWR_STATE=0x1B |
| |
| ############################################################################### |
| #Set the Mifare CLT Power state : |
| #This settings will be used when application does not set this parameter |
| # bit pos 0 = Switch On |
| # bit pos 1 = Switch Off |
| # bit pos 2 = Battery Off |
| # bit pos 3 = Screen Off |
| # bit pos 4 = Screen Lock |
| DEFAULT_OFFHOST_PWR_STATE=0x1B |
| |
| ############################################################################### |
| #Set the Felica CLT Power state : |
| #This settings will be used when application does not set this parameter |
| # bit pos 0 = Switch On |
| # bit pos 1 = Switch Off |
| # bit pos 2 = Battery Off |
| # bit pos 3 = Screen Off |
| # bit pos 4 = Screen Lock |
| DEFAULT_NFCF_PWR_STATE=0x1B |
| |
| ############################################################################### |
| #Set the SYS_CODE Power state : |
| #This settings will be used when application does not set this parameter |
| # bit pos 0 = Switch On |
| # bit pos 1 = Switch Off |
| # bit pos 2 = Battery Off |
| # bit pos 3 = Screen Off |
| # bit pos 4 = Screen Lock |
| DEFAULT_SYS_CODE_PWR_STATE=0x1B |
| |
| ############################################################################### |
| # Configure the NFC Extras to open and use a static pipe. If the value is |
| # not set or set to 0, then the default is use a dynamic pipe based on a |
| # destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value |
| # for each UICC (where F3="UICC0" and F4="UICC1") |
| OFF_HOST_ESE_PIPE_ID=0x19 |
| OFF_HOST_SIM_PIPE_ID=0x0A |
| |
| ############################################################################### |
| # Bail out mode |
| # If set to 1, NFCC is using bail out mode for either Type A or Type B poll. |
| NFA_POLL_BAIL_OUT_MODE=0x01 |
| |
| ############################################################################### |
| # AID Matching platform options |
| # AID_MATCHING_L 0x01 |
| # AID_MATCHING_K 0x02 |
| AID_MATCHING_PLATFORM=0x01 |
| |
| ############################################################################### |
| #CHINA_TIANJIN_RF_SETTING |
| #Enable 0x01 |
| #Disable 0x00 |
| NXP_CHINA_TIANJIN_RF_ENABLED=0x01 |
| |
| ############################################################################### |
| #SWP_SWITCH_TIMEOUT_SETTING |
| # Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60]. |
| # Timeout in milliseconds, for example |
| # No Timeout 0x00 |
| # 10 millisecond timeout 0x0A |
| NXP_SWP_SWITCH_TIMEOUT=0x0A |
| |
| ############################################################################### |
| # Loader service version |
| # NFC service checks for LS version 2.0 or 2.1 |
| # LS2.0 0x20 |
| # LS2.1 0x21 |
| # LS2.2 0x22 |
| # AT NFC service intialization |
| NXP_LOADER_SERVICE_VERSION=0x22 |
| |
| ############################################################################### |
| #Timeout value in milliseconds for NFCC standby mode.The range is between 5000 |
| #msec to 20000 msec and zero is to disable. |
| NXP_NFCC_STANDBY_TIMEOUT=20000 |
| |
| ############################################################################### |
| #Dynamic RSSI feature enable |
| # Disable 0x00 |
| # Enable 0x01 |
| NXP_AGC_DEBUG_ENABLE=0x00 |
| |
| ############################################################################### |
| #Virtual Mode ESE and Wired Mode ongoing delay Wired Mode |
| # For Technology routing to ESE Technology Mask = 4 |
| # For ISO-DEP Protocol routing to ESE Mask = 2 |
| # It can also take TECH|PROTO = 6 |
| # To ignore the delay set mask to = 0 |
| NXP_ESE_WIRED_PRT_MASK=0x00 |
| |
| ############################################################################### |
| #Virtual Mode UICC and Wired Mode ongoing delay Wired Mode |
| #For Technology routing to UICC Technology Mask = 4 |
| #For ISO-DEP Protocol routing to UICC set Mask = 2 |
| #For Select AID Routing to UICC set Mask = 1 |
| #It can also take values TECH|PROTO|SELECT_AID = 7 , 6 , 5 ,3 .To ignore delay |
| #set mask = 0 |
| NXP_UICC_WIRED_PRT_MASK=0x00 |
| |
| ############################################################################### |
| #RF field true delay Wired Mode |
| # delay wired mode = 1 |
| # allow wired mode = 0 |
| NXP_WIRED_MODE_RF_FIELD_ENABLE=0x00 |
| |
| ############################################################################### |
| #Config to allow adding aids |
| #NFC on/off is required after this config |
| #1 = enabling adding aid to NFCC routing table. |
| #0 = disabling adding aid to NFCC routing table. |
| NXP_ENABLE_ADD_AID=0x01 |
| |
| ############################################################################### |
| # JCOP-3.3 continuous process timeout in msec and value should be in Hexadecimal |
| # JCOP CP TIMEOUT |
| NXP_CP_TIMEOUT={00, 77} |
| |
| ############################################################################### |
| # Enable/Disable checking default proto SE Id |
| # Disable 0x00 |
| # Enable 0x01 |
| NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01 |
| |
| ############################################################################### |
| #NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE |
| #Enable/Disable block number checks for china transit use case |
| #Enable 0x01 |
| #Disable 0x00 |
| NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01 |
| |
| ############################################################################### |
| #Enable NXP NCI runtime parser library |
| #Enable 0x01 |
| #Disable 0x00 |
| NXP_NCI_PARSER_LIBRARY=0x00 |
| |
| ############################################################################### |
| #This config will enable different level of Rf transaction debugs based on the |
| #following values provided. Decoded information will be printed in adb logcat |
| #Debug Mode Levels |
| #Disable Debug 0x00 |
| #L1 Debug 0x01 |
| #L2 Debug 0x02 |
| #L1 & L2 Debug 0x03 |
| #L1 & L2 & RSSI 0x04 |
| #L1 & L2 & Felica 0x05 |
| #NXP_CORE_PROP_SYSTEM_DEBUG=0x00 |
| |
| ############################################################################### |
| # Enable/Disable Block Route feature. |
| # Block Route will restrict routing to first matched rule |
| # Block Route enable 0x01 |
| # Block Route disable 0x00 |
| AID_BLOCK_ROUTE=0x00 |
| |
| ############################################################################### |
| # Enable or Disable RF_STATUS_UPDATE to EseHal module |
| # Disable 0x00 |
| # Enable 0x01 |
| RF_STATUS_UPDATE_ENABLE=0x00 |
| |
| ############################################################################### |
| # Timeout value in milliseconds to send response for Felica command received |
| NXP_HCEF_CMD_RSP_TIMEOUT_VALUE=5000 |
| ############################################################################### |
| # Vendor Specific Proprietary Protocol & Discovery Configuration |
| # Set to 0xFF if unsupported |
| # byte[0] NCI_PROTOCOL_18092_ACTIVE |
| # byte[1] NCI_PROTOCOL_B_PRIME |
| # byte[2] NCI_PROTOCOL_DUAL |
| # byte[3] NCI_PROTOCOL_15693 |
| # byte[4] NCI_PROTOCOL_KOVIO |
| # byte[5] NCI_PROTOCOL_MIFARE |
| # byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO |
| # byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME |
| # byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME |
| NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, 70, FF, FF} |
| |
| ############################################################################### |
| #White list of Hosts |
| #This values will be the Hosts(NFCEEs) in the HCI Network. |
| DEVICE_HOST_WHITE_LIST={C0, 02} |
| |
| ############################################################################### |
| #OffHost UICC route location for MultiSE |
| #UICC1 = 02 |
| #UICC2 = 03 |
| OFFHOST_ROUTE_UICC={02} |
| |
| ############################################################################### |
| # Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1. |
| # 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm |
| # 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block |
| # 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check |
| PRESENCE_CHECK_ALGORITHM=2 |
| |
| ############################################################################### |
| # Extended APDU length for ISO_DEP |
| ISO_DEP_MAX_TRANSCEIVE=0xFEFF |
| |
| ############################################################################### |