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AJFISH8bbf0f02010-01-12 18:53:38 +00001#/** @file
2# ARM processor package.
3#
hhtiand6ebcab2010-04-29 12:15:47 +00004# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
AJFISH8bbf0f02010-01-12 18:53:38 +00005#
hhtiand6ebcab2010-04-29 12:15:47 +00006# This program and the accompanying materials
AJFISH8bbf0f02010-01-12 18:53:38 +00007# are licensed and made available under the terms and conditions of the BSD License
8# which accompanies this distribution. The full text of the license may be found at
9# http://opensource.org/licenses/bsd-license.php
10#
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13#
14#**/
15
AJFISH2ef2b012009-12-06 01:57:05 +000016[Defines]
17 DEC_SPECIFICATION = 0x00010005
18 PACKAGE_NAME = ArmPkg
19 PACKAGE_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F
20 PACKAGE_VERSION = 0.1
21
22################################################################################
23#
24# Include Section - list of Include Paths that are provided by this package.
25# Comments are used for Keywords and Module Types.
26#
27# Supported Module Types:
28# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
29#
30################################################################################
31[Includes.common]
32 Include # Root include for the package
33
34[LibraryClasses.common]
AJFISH8bbf0f02010-01-12 18:53:38 +000035 ArmLib|Include/Library/ArmLib.h
AJFISH2ef2b012009-12-06 01:57:05 +000036 SemihostLib|Include/Library/Semihosting.h
AJFISH8bbf0f02010-01-12 18:53:38 +000037 UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h
andrewfish6f72e282010-01-27 02:47:47 +000038 DefaultExceptioHandlerLib|Include/Library/DefaultExceptioHandlerLib.h
andrewfish097bd462010-02-01 18:25:18 +000039 ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
40
AJFISH2ef2b012009-12-06 01:57:05 +000041[Guids.common]
42 gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
43
44[Protocols.common]
AJFISH8bbf0f02010-01-12 18:53:38 +000045 gVirtualUncachedPagesProtocolGuid = { 0xAD651C7D, 0x3C22, 0x4DBF, { 0x92, 0xe8, 0x38, 0xa7, 0xcd, 0xae, 0x87, 0xb2 } }
AJFISH2ef2b012009-12-06 01:57:05 +000046
andrewfish1bfda052011-02-02 22:35:30 +000047 ## Include/Protocol/MmcHost.h
48 gEfiMmcHostProtocolGuid = { 0x3e591c00, 0x9e4a, 0x11df, {0x92, 0x44, 0x00, 0x02, 0xA5, 0xD5, 0xC5, 0x1B }}
49
AJFISH2ef2b012009-12-06 01:57:05 +000050[PcdsFeatureFlag.common]
51 gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001
52
andrewfish1bfda052011-02-02 22:35:30 +000053 # On ARM Architecture with the Security Extension, the address for the
54 # Vector Table can be mapped anywhere in the memory map. It means we can
55 # point the Exception Vector Table to its location in CpuDxe.
56 # By default we copy the Vector Table at PcdGet32(PcdCpuVectorBaseAddress)
57 gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022
58
59 gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered|FALSE|BOOLEAN|0x00000025
60 gArmTokenSpaceGuid.PcdSkipPeiCore|FALSE|BOOLEAN|0x00000026
61
AJFISH2ef2b012009-12-06 01:57:05 +000062[PcdsFixedAtBuild.common]
andrewfish1bfda052011-02-02 22:35:30 +000063 # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.
64 # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
65 gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024
66
AJFISH2ef2b012009-12-06 01:57:05 +000067 gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002
68 gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003
69 gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xfff00000|UINT32|0x00000004
70 gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
andrewfish1bfda052011-02-02 22:35:30 +000071
72 #
73 # ARM PL180 MCI
74 #
75 gArmTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000006
76 gArmTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000007
77
78 #
79 # ARM PL390 General Interrupt Controller
80 #
81 gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
82 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
83 gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
84
85 #
86 # ARM Secure SEC PCDs
87 #
88 gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
89 gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
90
91 #
92 # ARM MPCore MailBox PCDs
93 #
94 # Address to Set/Get to Mailbox in Multicore system
95 gArmTokenSpaceGuid.PcdMPCoreMailboxSetAddress|0|UINT32|0x00000017
96 gArmTokenSpaceGuid.PcdMPCoreMailboxGetAddress|0|UINT32|0x00000018
97 # Address/Value to clear Mailbox in Multicore system
98 gArmTokenSpaceGuid.PcdMPCoreMailboxClearAddress|0|UINT32|0x00000019
99 gArmTokenSpaceGuid.PcdMPCoreMailboxClearValue|0|UINT32|0x0000001A
100
101 #
102 # ARM L2x0 PCDs
103 #
104 gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B
105
106 #
107 # ARM PL390 General Interrupt Controller
108 #
109 gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000001C
110 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000001D
111
112 #
113 # BdsLib
114 #
115 gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E
116 gArmTokenSpaceGuid.PcdLinuxKernelDP|L""|VOID*|0x0000001F
117 gArmTokenSpaceGuid.PcdLinuxAtag|""|VOID*|0x00000020
118 gArmTokenSpaceGuid.PcdFdtDP|L""|VOID*|0x00000021
119