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Aart Bikf8f5a162017-02-06 15:35:29 -08001/*
2 * Copyright (C) 2017 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_OPTIMIZING_NODES_VECTOR_H_
18#define ART_COMPILER_OPTIMIZING_NODES_VECTOR_H_
19
20// This #include should never be used by compilation, because this header file (nodes_vector.h)
21// is included in the header file nodes.h itself. However it gives editing tools better context.
22#include "nodes.h"
23
24namespace art {
25
26// Memory alignment, represented as an offset relative to a base, where 0 <= offset < base,
27// and base is a power of two. For example, the value Alignment(16, 0) means memory is
28// perfectly aligned at a 16-byte boundary, whereas the value Alignment(16, 4) means
29// memory is always exactly 4 bytes above such a boundary.
30class Alignment {
31 public:
32 Alignment(size_t base, size_t offset) : base_(base), offset_(offset) {
33 DCHECK_LT(offset, base);
34 DCHECK(IsPowerOfTwo(base));
35 }
36
Aart Bik46b6dbc2017-10-03 11:37:37 -070037 // Returns true if memory is at least aligned at the given boundary.
Aart Bikf8f5a162017-02-06 15:35:29 -080038 // Assumes requested base is power of two.
39 bool IsAlignedAt(size_t base) const {
40 DCHECK_NE(0u, base);
41 DCHECK(IsPowerOfTwo(base));
42 return ((offset_ | base_) & (base - 1u)) == 0;
43 }
44
Aart Bik46b6dbc2017-10-03 11:37:37 -070045 size_t Base() const { return base_; }
46
47 size_t Offset() const { return offset_; }
48
Aart Bikf8f5a162017-02-06 15:35:29 -080049 std::string ToString() const {
50 return "ALIGN(" + std::to_string(base_) + "," + std::to_string(offset_) + ")";
51 }
52
Aart Bikb79f4ac2017-07-10 10:10:37 -070053 bool operator==(const Alignment& other) const {
54 return base_ == other.base_ && offset_ == other.offset_;
55 }
56
Aart Bikf8f5a162017-02-06 15:35:29 -080057 private:
58 size_t base_;
59 size_t offset_;
60};
61
62//
63// Definitions of abstract vector operations in HIR.
64//
65
66// Abstraction of a vector operation, i.e., an operation that performs
67// GetVectorLength() x GetPackedType() operations simultaneously.
68class HVecOperation : public HVariableInputSizeInstruction {
69 public:
Aart Bik0148de42017-09-05 09:25:01 -070070 // A SIMD operation looks like a FPU location.
71 // TODO: we could introduce SIMD types in HIR.
Vladimir Marko0ebe0d82017-09-21 22:50:39 +010072 static constexpr DataType::Type kSIMDType = DataType::Type::kFloat64;
Aart Bik0148de42017-09-05 09:25:01 -070073
Vladimir Markoe764d2e2017-10-05 14:35:55 +010074 HVecOperation(ArenaAllocator* allocator,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +010075 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -080076 SideEffects side_effects,
77 size_t number_of_inputs,
78 size_t vector_length,
79 uint32_t dex_pc)
80 : HVariableInputSizeInstruction(side_effects,
81 dex_pc,
Vladimir Markoe764d2e2017-10-05 14:35:55 +010082 allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -080083 number_of_inputs,
84 kArenaAllocVectorNode),
85 vector_length_(vector_length) {
86 SetPackedField<TypeField>(packed_type);
87 DCHECK_LT(1u, vector_length);
88 }
89
90 // Returns the number of elements packed in a vector.
91 size_t GetVectorLength() const {
92 return vector_length_;
93 }
94
95 // Returns the number of bytes in a full vector.
96 size_t GetVectorNumberOfBytes() const {
Vladimir Marko0ebe0d82017-09-21 22:50:39 +010097 return vector_length_ * DataType::Size(GetPackedType());
Aart Bikf8f5a162017-02-06 15:35:29 -080098 }
99
Aart Bik0148de42017-09-05 09:25:01 -0700100 // Returns the type of the vector operation.
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100101 DataType::Type GetType() const OVERRIDE {
Aart Bik0148de42017-09-05 09:25:01 -0700102 return kSIMDType;
Aart Bikf8f5a162017-02-06 15:35:29 -0800103 }
104
105 // Returns the true component type packed in a vector.
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100106 DataType::Type GetPackedType() const {
Aart Bikf8f5a162017-02-06 15:35:29 -0800107 return GetPackedField<TypeField>();
108 }
109
Aart Bikb79f4ac2017-07-10 10:10:37 -0700110 // Assumes vector nodes cannot be moved by default. Each concrete implementation
111 // that can be moved should override this method and return true.
112 bool CanBeMoved() const OVERRIDE { return false; }
113
114 // Tests if all data of a vector node (vector length and packed type) is equal.
115 // Each concrete implementation that adds more fields should test equality of
116 // those fields in its own method *and* call all super methods.
117 bool InstructionDataEquals(const HInstruction* other) const OVERRIDE {
118 DCHECK(other->IsVecOperation());
119 const HVecOperation* o = other->AsVecOperation();
120 return GetVectorLength() == o->GetVectorLength() && GetPackedType() == o->GetPackedType();
121 }
122
Aart Bik46b6dbc2017-10-03 11:37:37 -0700123 // Maps an integral type to the same-size signed type and leaves other types alone.
124 // Can be used to test relaxed type consistency in which packed same-size integral
125 // types can co-exist, but other type mixes are an error.
126 static DataType::Type ToSignedType(DataType::Type type) {
127 switch (type) {
128 case DataType::Type::kBool: // 1-byte storage unit
129 case DataType::Type::kUint8:
130 return DataType::Type::kInt8;
131 case DataType::Type::kUint16:
132 return DataType::Type::kInt16;
133 default:
134 DCHECK(type != DataType::Type::kVoid && type != DataType::Type::kReference) << type;
135 return type;
136 }
137 }
138
Aart Bik4d1a9d42017-10-19 14:40:55 -0700139 // Maps an integral type to the same-size unsigned type and leaves other types alone.
140 static DataType::Type ToUnsignedType(DataType::Type type) {
141 switch (type) {
142 case DataType::Type::kBool: // 1-byte storage unit
143 case DataType::Type::kInt8:
144 return DataType::Type::kUint8;
145 case DataType::Type::kInt16:
146 return DataType::Type::kUint16;
147 default:
148 DCHECK(type != DataType::Type::kVoid && type != DataType::Type::kReference) << type;
149 return type;
150 }
151 }
152
Aart Bikf8f5a162017-02-06 15:35:29 -0800153 DECLARE_ABSTRACT_INSTRUCTION(VecOperation);
154
Aart Bikdb14fcf2017-04-25 15:53:58 -0700155 protected:
Aart Bikf8f5a162017-02-06 15:35:29 -0800156 // Additional packed bits.
157 static constexpr size_t kFieldType = HInstruction::kNumberOfGenericPackedBits;
158 static constexpr size_t kFieldTypeSize =
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100159 MinimumBitsToStore(static_cast<size_t>(DataType::Type::kLast));
Aart Bikf8f5a162017-02-06 15:35:29 -0800160 static constexpr size_t kNumberOfVectorOpPackedBits = kFieldType + kFieldTypeSize;
161 static_assert(kNumberOfVectorOpPackedBits <= kMaxNumberOfPackedBits, "Too many packed fields.");
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100162 using TypeField = BitField<DataType::Type, kFieldType, kFieldTypeSize>;
Aart Bikf8f5a162017-02-06 15:35:29 -0800163
Artem Serovcced8ba2017-07-19 18:18:09 +0100164 DEFAULT_COPY_CONSTRUCTOR(VecOperation);
165
Aart Bikdb14fcf2017-04-25 15:53:58 -0700166 private:
Aart Bikf8f5a162017-02-06 15:35:29 -0800167 const size_t vector_length_;
Aart Bikf8f5a162017-02-06 15:35:29 -0800168};
169
170// Abstraction of a unary vector operation.
171class HVecUnaryOperation : public HVecOperation {
172 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100173 HVecUnaryOperation(ArenaAllocator* allocator,
Aart Bik8de59162017-04-21 09:42:01 -0700174 HInstruction* input,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100175 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800176 size_t vector_length,
177 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100178 : HVecOperation(allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800179 packed_type,
180 SideEffects::None(),
Aart Bik8de59162017-04-21 09:42:01 -0700181 /* number_of_inputs */ 1,
Aart Bikf8f5a162017-02-06 15:35:29 -0800182 vector_length,
Aart Bik8de59162017-04-21 09:42:01 -0700183 dex_pc) {
184 SetRawInputAt(0, input);
185 }
186
187 HInstruction* GetInput() const { return InputAt(0); }
188
Aart Bikf8f5a162017-02-06 15:35:29 -0800189 DECLARE_ABSTRACT_INSTRUCTION(VecUnaryOperation);
Aart Bik8de59162017-04-21 09:42:01 -0700190
Artem Serovcced8ba2017-07-19 18:18:09 +0100191 protected:
192 DEFAULT_COPY_CONSTRUCTOR(VecUnaryOperation);
Aart Bikf8f5a162017-02-06 15:35:29 -0800193};
194
195// Abstraction of a binary vector operation.
196class HVecBinaryOperation : public HVecOperation {
197 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100198 HVecBinaryOperation(ArenaAllocator* allocator,
Aart Bik8de59162017-04-21 09:42:01 -0700199 HInstruction* left,
200 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100201 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800202 size_t vector_length,
203 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100204 : HVecOperation(allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800205 packed_type,
206 SideEffects::None(),
Aart Bik8de59162017-04-21 09:42:01 -0700207 /* number_of_inputs */ 2,
Aart Bikf8f5a162017-02-06 15:35:29 -0800208 vector_length,
Aart Bik8de59162017-04-21 09:42:01 -0700209 dex_pc) {
210 SetRawInputAt(0, left);
211 SetRawInputAt(1, right);
212 }
Artem Serovf34dd202017-04-10 17:41:46 +0100213
214 HInstruction* GetLeft() const { return InputAt(0); }
215 HInstruction* GetRight() const { return InputAt(1); }
216
Aart Bikf8f5a162017-02-06 15:35:29 -0800217 DECLARE_ABSTRACT_INSTRUCTION(VecBinaryOperation);
Aart Bik8de59162017-04-21 09:42:01 -0700218
Artem Serovcced8ba2017-07-19 18:18:09 +0100219 protected:
220 DEFAULT_COPY_CONSTRUCTOR(VecBinaryOperation);
Aart Bikf8f5a162017-02-06 15:35:29 -0800221};
222
223// Abstraction of a vector operation that references memory, with an alignment.
Aart Bik46b6dbc2017-10-03 11:37:37 -0700224// The Android runtime guarantees elements have at least natural alignment.
Aart Bikf8f5a162017-02-06 15:35:29 -0800225class HVecMemoryOperation : public HVecOperation {
226 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100227 HVecMemoryOperation(ArenaAllocator* allocator,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100228 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800229 SideEffects side_effects,
230 size_t number_of_inputs,
231 size_t vector_length,
232 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100233 : HVecOperation(allocator,
234 packed_type,
235 side_effects,
236 number_of_inputs,
237 vector_length,
238 dex_pc),
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100239 alignment_(DataType::Size(packed_type), 0) {
Artem Serove1811ed2017-04-27 16:50:47 +0100240 DCHECK_GE(number_of_inputs, 2u);
241 }
Aart Bikf8f5a162017-02-06 15:35:29 -0800242
243 void SetAlignment(Alignment alignment) { alignment_ = alignment; }
244
245 Alignment GetAlignment() const { return alignment_; }
246
Artem Serove1811ed2017-04-27 16:50:47 +0100247 HInstruction* GetArray() const { return InputAt(0); }
248 HInstruction* GetIndex() const { return InputAt(1); }
249
Aart Bikb79f4ac2017-07-10 10:10:37 -0700250 bool InstructionDataEquals(const HInstruction* other) const OVERRIDE {
251 DCHECK(other->IsVecMemoryOperation());
252 const HVecMemoryOperation* o = other->AsVecMemoryOperation();
253 return HVecOperation::InstructionDataEquals(o) && GetAlignment() == o->GetAlignment();
254 }
255
Aart Bikf8f5a162017-02-06 15:35:29 -0800256 DECLARE_ABSTRACT_INSTRUCTION(VecMemoryOperation);
257
Artem Serovcced8ba2017-07-19 18:18:09 +0100258 protected:
259 DEFAULT_COPY_CONSTRUCTOR(VecMemoryOperation);
260
Aart Bikf8f5a162017-02-06 15:35:29 -0800261 private:
262 Alignment alignment_;
Aart Bikf8f5a162017-02-06 15:35:29 -0800263};
264
Aart Bik0148de42017-09-05 09:25:01 -0700265// Packed type consistency checker ("same vector length" integral types may mix freely).
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100266inline static bool HasConsistentPackedTypes(HInstruction* input, DataType::Type type) {
Aart Bik0148de42017-09-05 09:25:01 -0700267 if (input->IsPhi()) {
268 return input->GetType() == HVecOperation::kSIMDType; // carries SIMD
269 }
Aart Bikd58bc322017-05-01 14:49:18 -0700270 DCHECK(input->IsVecOperation());
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100271 DataType::Type input_type = input->AsVecOperation()->GetPackedType();
Aart Bik4d1a9d42017-10-19 14:40:55 -0700272 DCHECK_EQ(HVecOperation::ToUnsignedType(input_type) == HVecOperation::ToUnsignedType(type),
273 HVecOperation::ToSignedType(input_type) == HVecOperation::ToSignedType(type));
Aart Bik46b6dbc2017-10-03 11:37:37 -0700274 return HVecOperation::ToSignedType(input_type) == HVecOperation::ToSignedType(type);
Aart Bikd58bc322017-05-01 14:49:18 -0700275}
276
Aart Bikf8f5a162017-02-06 15:35:29 -0800277//
Aart Bik8de59162017-04-21 09:42:01 -0700278// Definitions of concrete unary vector operations in HIR.
Aart Bikf8f5a162017-02-06 15:35:29 -0800279//
280
281// Replicates the given scalar into a vector,
282// viz. replicate(x) = [ x, .. , x ].
283class HVecReplicateScalar FINAL : public HVecUnaryOperation {
284 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100285 HVecReplicateScalar(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800286 HInstruction* scalar,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100287 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800288 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700289 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100290 : HVecUnaryOperation(allocator, scalar, packed_type, vector_length, dex_pc) {
Aart Bik8de59162017-04-21 09:42:01 -0700291 DCHECK(!scalar->IsVecOperation());
Aart Bikf8f5a162017-02-06 15:35:29 -0800292 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700293
294 // A replicate needs to stay in place, since SIMD registers are not
295 // kept alive across vector loop boundaries (yet).
296 bool CanBeMoved() const OVERRIDE { return false; }
297
Aart Bikf8f5a162017-02-06 15:35:29 -0800298 DECLARE_INSTRUCTION(VecReplicateScalar);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700299
Artem Serovcced8ba2017-07-19 18:18:09 +0100300 protected:
301 DEFAULT_COPY_CONSTRUCTOR(VecReplicateScalar);
Aart Bikf8f5a162017-02-06 15:35:29 -0800302};
303
Aart Bik0148de42017-09-05 09:25:01 -0700304// Extracts a particular scalar from the given vector,
305// viz. extract[ x1, .. , xn ] = x_i.
306//
307// TODO: for now only i == 1 case supported.
308class HVecExtractScalar FINAL : public HVecUnaryOperation {
309 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100310 HVecExtractScalar(ArenaAllocator* allocator,
Aart Bik0148de42017-09-05 09:25:01 -0700311 HInstruction* input,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100312 DataType::Type packed_type,
Aart Bik0148de42017-09-05 09:25:01 -0700313 size_t vector_length,
314 size_t index,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700315 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100316 : HVecUnaryOperation(allocator, input, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700317 DCHECK(HasConsistentPackedTypes(input, packed_type));
Aart Bik0148de42017-09-05 09:25:01 -0700318 DCHECK_LT(index, vector_length);
319 DCHECK_EQ(index, 0u);
320 }
321
322 // Yields a single component in the vector.
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100323 DataType::Type GetType() const OVERRIDE {
Aart Bik0148de42017-09-05 09:25:01 -0700324 return GetPackedType();
325 }
326
327 // An extract needs to stay in place, since SIMD registers are not
328 // kept alive across vector loop boundaries (yet).
329 bool CanBeMoved() const OVERRIDE { return false; }
330
331 DECLARE_INSTRUCTION(VecExtractScalar);
332
Artem Serovcced8ba2017-07-19 18:18:09 +0100333 protected:
334 DEFAULT_COPY_CONSTRUCTOR(VecExtractScalar);
Aart Bik0148de42017-09-05 09:25:01 -0700335};
336
337// Reduces the given vector into the first element as sum/min/max,
338// viz. sum-reduce[ x1, .. , xn ] = [ y, ---- ], where y = sum xi
339// and the "-" denotes "don't care" (implementation dependent).
340class HVecReduce FINAL : public HVecUnaryOperation {
341 public:
342 enum ReductionKind {
343 kSum = 1,
344 kMin = 2,
345 kMax = 3
346 };
347
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100348 HVecReduce(ArenaAllocator* allocator,
Aart Bik0148de42017-09-05 09:25:01 -0700349 HInstruction* input,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100350 DataType::Type packed_type,
Aart Bik0148de42017-09-05 09:25:01 -0700351 size_t vector_length,
352 ReductionKind kind,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700353 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100354 : HVecUnaryOperation(allocator, input, packed_type, vector_length, dex_pc),
Aart Bik0148de42017-09-05 09:25:01 -0700355 kind_(kind) {
356 DCHECK(HasConsistentPackedTypes(input, packed_type));
Aart Bikcfa59b42017-08-31 09:08:13 -0700357 }
358
Aart Bik0148de42017-09-05 09:25:01 -0700359 ReductionKind GetKind() const { return kind_; }
Aart Bikf8f5a162017-02-06 15:35:29 -0800360
Aart Bikb79f4ac2017-07-10 10:10:37 -0700361 bool CanBeMoved() const OVERRIDE { return true; }
362
Aart Bik0148de42017-09-05 09:25:01 -0700363 bool InstructionDataEquals(const HInstruction* other) const OVERRIDE {
364 DCHECK(other->IsVecReduce());
365 const HVecReduce* o = other->AsVecReduce();
366 return HVecOperation::InstructionDataEquals(o) && GetKind() == o->GetKind();
367 }
368
369 DECLARE_INSTRUCTION(VecReduce);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700370
Artem Serovcced8ba2017-07-19 18:18:09 +0100371 protected:
372 DEFAULT_COPY_CONSTRUCTOR(VecReduce);
373
Aart Bikf8f5a162017-02-06 15:35:29 -0800374 private:
Aart Bik0148de42017-09-05 09:25:01 -0700375 const ReductionKind kind_;
Aart Bikf8f5a162017-02-06 15:35:29 -0800376};
377
378// Converts every component in the vector,
379// viz. cnv[ x1, .. , xn ] = [ cnv(x1), .. , cnv(xn) ].
380class HVecCnv FINAL : public HVecUnaryOperation {
381 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100382 HVecCnv(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800383 HInstruction* input,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100384 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800385 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700386 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100387 : HVecUnaryOperation(allocator, input, packed_type, vector_length, dex_pc) {
Aart Bikf8f5a162017-02-06 15:35:29 -0800388 DCHECK(input->IsVecOperation());
Aart Bikd58bc322017-05-01 14:49:18 -0700389 DCHECK_NE(GetInputType(), GetResultType()); // actual convert
Aart Bikf8f5a162017-02-06 15:35:29 -0800390 }
391
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100392 DataType::Type GetInputType() const { return InputAt(0)->AsVecOperation()->GetPackedType(); }
393 DataType::Type GetResultType() const { return GetPackedType(); }
Aart Bikf8f5a162017-02-06 15:35:29 -0800394
Aart Bikb79f4ac2017-07-10 10:10:37 -0700395 bool CanBeMoved() const OVERRIDE { return true; }
396
Aart Bikf8f5a162017-02-06 15:35:29 -0800397 DECLARE_INSTRUCTION(VecCnv);
398
Artem Serovcced8ba2017-07-19 18:18:09 +0100399 protected:
400 DEFAULT_COPY_CONSTRUCTOR(VecCnv);
Aart Bikf8f5a162017-02-06 15:35:29 -0800401};
402
403// Negates every component in the vector,
404// viz. neg[ x1, .. , xn ] = [ -x1, .. , -xn ].
405class HVecNeg FINAL : public HVecUnaryOperation {
406 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100407 HVecNeg(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800408 HInstruction* input,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100409 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800410 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700411 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100412 : HVecUnaryOperation(allocator, input, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700413 DCHECK(HasConsistentPackedTypes(input, packed_type));
Aart Bikf8f5a162017-02-06 15:35:29 -0800414 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700415
416 bool CanBeMoved() const OVERRIDE { return true; }
417
Aart Bikf8f5a162017-02-06 15:35:29 -0800418 DECLARE_INSTRUCTION(VecNeg);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700419
Artem Serovcced8ba2017-07-19 18:18:09 +0100420 protected:
421 DEFAULT_COPY_CONSTRUCTOR(VecNeg);
Aart Bikf8f5a162017-02-06 15:35:29 -0800422};
423
Aart Bik6daebeb2017-04-03 14:35:41 -0700424// Takes absolute value of every component in the vector,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700425// viz. abs[ x1, .. , xn ] = [ |x1|, .. , |xn| ]
426// for signed operand x.
Aart Bik6daebeb2017-04-03 14:35:41 -0700427class HVecAbs FINAL : public HVecUnaryOperation {
428 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100429 HVecAbs(ArenaAllocator* allocator,
Aart Bik6daebeb2017-04-03 14:35:41 -0700430 HInstruction* input,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100431 DataType::Type packed_type,
Aart Bik6daebeb2017-04-03 14:35:41 -0700432 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700433 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100434 : HVecUnaryOperation(allocator, input, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700435 DCHECK(HasConsistentPackedTypes(input, packed_type));
Aart Bik6daebeb2017-04-03 14:35:41 -0700436 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700437
438 bool CanBeMoved() const OVERRIDE { return true; }
439
Aart Bik6daebeb2017-04-03 14:35:41 -0700440 DECLARE_INSTRUCTION(VecAbs);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700441
Artem Serovcced8ba2017-07-19 18:18:09 +0100442 protected:
443 DEFAULT_COPY_CONSTRUCTOR(VecAbs);
Aart Bik6daebeb2017-04-03 14:35:41 -0700444};
445
Aart Bikf8f5a162017-02-06 15:35:29 -0800446// Bitwise- or boolean-nots every component in the vector,
447// viz. not[ x1, .. , xn ] = [ ~x1, .. , ~xn ], or
448// not[ x1, .. , xn ] = [ !x1, .. , !xn ] for boolean.
449class HVecNot FINAL : public HVecUnaryOperation {
450 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100451 HVecNot(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800452 HInstruction* input,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100453 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800454 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700455 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100456 : HVecUnaryOperation(allocator, input, packed_type, vector_length, dex_pc) {
Aart Bikf8f5a162017-02-06 15:35:29 -0800457 DCHECK(input->IsVecOperation());
Aart Bikf8f5a162017-02-06 15:35:29 -0800458 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700459
460 bool CanBeMoved() const OVERRIDE { return true; }
461
Aart Bikf8f5a162017-02-06 15:35:29 -0800462 DECLARE_INSTRUCTION(VecNot);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700463
Artem Serovcced8ba2017-07-19 18:18:09 +0100464 protected:
465 DEFAULT_COPY_CONSTRUCTOR(VecNot);
Aart Bikf8f5a162017-02-06 15:35:29 -0800466};
467
Aart Bik8de59162017-04-21 09:42:01 -0700468//
469// Definitions of concrete binary vector operations in HIR.
470//
471
Aart Bikf8f5a162017-02-06 15:35:29 -0800472// Adds every component in the two vectors,
473// viz. [ x1, .. , xn ] + [ y1, .. , yn ] = [ x1 + y1, .. , xn + yn ].
474class HVecAdd FINAL : public HVecBinaryOperation {
475 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100476 HVecAdd(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800477 HInstruction* left,
478 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100479 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800480 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700481 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100482 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700483 DCHECK(HasConsistentPackedTypes(left, packed_type));
484 DCHECK(HasConsistentPackedTypes(right, packed_type));
Aart Bikf8f5a162017-02-06 15:35:29 -0800485 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700486
487 bool CanBeMoved() const OVERRIDE { return true; }
488
Aart Bikf8f5a162017-02-06 15:35:29 -0800489 DECLARE_INSTRUCTION(VecAdd);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700490
Artem Serovcced8ba2017-07-19 18:18:09 +0100491 protected:
492 DEFAULT_COPY_CONSTRUCTOR(VecAdd);
Aart Bikf8f5a162017-02-06 15:35:29 -0800493};
494
Aart Bikf3e61ee2017-04-12 17:09:20 -0700495// Performs halving add on every component in the two vectors, viz.
Aart Bikdbbac8f2017-09-01 13:06:08 -0700496// rounded [ x1, .. , xn ] hradd [ y1, .. , yn ] = [ (x1 + y1 + 1) >> 1, .. , (xn + yn + 1) >> 1 ]
497// truncated [ x1, .. , xn ] hadd [ y1, .. , yn ] = [ (x1 + y1) >> 1, .. , (xn + yn ) >> 1 ]
Aart Bik46b6dbc2017-10-03 11:37:37 -0700498// for either both signed or both unsigned operands x, y.
Aart Bikf3e61ee2017-04-12 17:09:20 -0700499class HVecHalvingAdd FINAL : public HVecBinaryOperation {
500 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100501 HVecHalvingAdd(ArenaAllocator* allocator,
Aart Bikf3e61ee2017-04-12 17:09:20 -0700502 HInstruction* left,
503 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100504 DataType::Type packed_type,
Aart Bikf3e61ee2017-04-12 17:09:20 -0700505 size_t vector_length,
Aart Bikf3e61ee2017-04-12 17:09:20 -0700506 bool is_rounded,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700507 bool is_unsigned,
508 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100509 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Vladimir Markod5d2f2c2017-09-26 12:37:26 +0100510 // The `is_unsigned` flag should be used exclusively with the Int32 or Int64.
511 // This flag is a temporary measure while we do not have the Uint32 and Uint64 data types.
512 DCHECK(!is_unsigned ||
513 packed_type == DataType::Type::kInt32 ||
514 packed_type == DataType::Type::kInt64) << packed_type;
Aart Bikd58bc322017-05-01 14:49:18 -0700515 DCHECK(HasConsistentPackedTypes(left, packed_type));
516 DCHECK(HasConsistentPackedTypes(right, packed_type));
Aart Bikdb14fcf2017-04-25 15:53:58 -0700517 SetPackedFlag<kFieldHAddIsUnsigned>(is_unsigned);
518 SetPackedFlag<kFieldHAddIsRounded>(is_rounded);
Aart Bikf3e61ee2017-04-12 17:09:20 -0700519 }
520
Aart Bikdb14fcf2017-04-25 15:53:58 -0700521 bool IsUnsigned() const { return GetPackedFlag<kFieldHAddIsUnsigned>(); }
522 bool IsRounded() const { return GetPackedFlag<kFieldHAddIsRounded>(); }
Aart Bikf3e61ee2017-04-12 17:09:20 -0700523
Aart Bikb79f4ac2017-07-10 10:10:37 -0700524 bool CanBeMoved() const OVERRIDE { return true; }
525
526 bool InstructionDataEquals(const HInstruction* other) const OVERRIDE {
527 DCHECK(other->IsVecHalvingAdd());
528 const HVecHalvingAdd* o = other->AsVecHalvingAdd();
529 return HVecOperation::InstructionDataEquals(o) &&
530 IsUnsigned() == o->IsUnsigned() &&
531 IsRounded() == o->IsRounded();
532 }
533
Aart Bikf3e61ee2017-04-12 17:09:20 -0700534 DECLARE_INSTRUCTION(VecHalvingAdd);
535
Artem Serovcced8ba2017-07-19 18:18:09 +0100536 protected:
537 DEFAULT_COPY_CONSTRUCTOR(VecHalvingAdd);
538
Aart Bikf3e61ee2017-04-12 17:09:20 -0700539 private:
Aart Bikdb14fcf2017-04-25 15:53:58 -0700540 // Additional packed bits.
541 static constexpr size_t kFieldHAddIsUnsigned = HVecOperation::kNumberOfVectorOpPackedBits;
542 static constexpr size_t kFieldHAddIsRounded = kFieldHAddIsUnsigned + 1;
543 static constexpr size_t kNumberOfHAddPackedBits = kFieldHAddIsRounded + 1;
544 static_assert(kNumberOfHAddPackedBits <= kMaxNumberOfPackedBits, "Too many packed fields.");
Aart Bikf3e61ee2017-04-12 17:09:20 -0700545};
546
Aart Bikf8f5a162017-02-06 15:35:29 -0800547// Subtracts every component in the two vectors,
548// viz. [ x1, .. , xn ] - [ y1, .. , yn ] = [ x1 - y1, .. , xn - yn ].
549class HVecSub FINAL : public HVecBinaryOperation {
550 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100551 HVecSub(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800552 HInstruction* left,
553 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100554 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800555 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700556 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100557 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700558 DCHECK(HasConsistentPackedTypes(left, packed_type));
559 DCHECK(HasConsistentPackedTypes(right, packed_type));
Aart Bikf8f5a162017-02-06 15:35:29 -0800560 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700561
562 bool CanBeMoved() const OVERRIDE { return true; }
563
Aart Bikf8f5a162017-02-06 15:35:29 -0800564 DECLARE_INSTRUCTION(VecSub);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700565
Artem Serovcced8ba2017-07-19 18:18:09 +0100566 protected:
567 DEFAULT_COPY_CONSTRUCTOR(VecSub);
Aart Bikf8f5a162017-02-06 15:35:29 -0800568};
569
570// Multiplies every component in the two vectors,
571// viz. [ x1, .. , xn ] * [ y1, .. , yn ] = [ x1 * y1, .. , xn * yn ].
572class HVecMul FINAL : public HVecBinaryOperation {
573 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100574 HVecMul(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800575 HInstruction* left,
576 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100577 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800578 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700579 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100580 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700581 DCHECK(HasConsistentPackedTypes(left, packed_type));
582 DCHECK(HasConsistentPackedTypes(right, packed_type));
Aart Bikf8f5a162017-02-06 15:35:29 -0800583 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700584
585 bool CanBeMoved() const OVERRIDE { return true; }
586
Aart Bikf8f5a162017-02-06 15:35:29 -0800587 DECLARE_INSTRUCTION(VecMul);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700588
Artem Serovcced8ba2017-07-19 18:18:09 +0100589 protected:
590 DEFAULT_COPY_CONSTRUCTOR(VecMul);
Aart Bikf8f5a162017-02-06 15:35:29 -0800591};
592
593// Divides every component in the two vectors,
594// viz. [ x1, .. , xn ] / [ y1, .. , yn ] = [ x1 / y1, .. , xn / yn ].
595class HVecDiv FINAL : public HVecBinaryOperation {
596 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100597 HVecDiv(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800598 HInstruction* left,
599 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100600 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800601 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700602 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100603 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700604 DCHECK(HasConsistentPackedTypes(left, packed_type));
605 DCHECK(HasConsistentPackedTypes(right, packed_type));
Aart Bikf8f5a162017-02-06 15:35:29 -0800606 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700607
608 bool CanBeMoved() const OVERRIDE { return true; }
609
Aart Bikf8f5a162017-02-06 15:35:29 -0800610 DECLARE_INSTRUCTION(VecDiv);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700611
Artem Serovcced8ba2017-07-19 18:18:09 +0100612 protected:
613 DEFAULT_COPY_CONSTRUCTOR(VecDiv);
Aart Bikf8f5a162017-02-06 15:35:29 -0800614};
615
Aart Bikf3e61ee2017-04-12 17:09:20 -0700616// Takes minimum of every component in the two vectors,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700617// viz. MIN( [ x1, .. , xn ] , [ y1, .. , yn ]) = [ min(x1, y1), .. , min(xn, yn) ]
618// for either both signed or both unsigned operands x, y.
Aart Bikf3e61ee2017-04-12 17:09:20 -0700619class HVecMin FINAL : public HVecBinaryOperation {
620 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100621 HVecMin(ArenaAllocator* allocator,
Aart Bikf3e61ee2017-04-12 17:09:20 -0700622 HInstruction* left,
623 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100624 DataType::Type packed_type,
Aart Bikf3e61ee2017-04-12 17:09:20 -0700625 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700626 bool is_unsigned,
627 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100628 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Vladimir Markod5d2f2c2017-09-26 12:37:26 +0100629 // The `is_unsigned` flag should be used exclusively with the Int32 or Int64.
630 // This flag is a temporary measure while we do not have the Uint32 and Uint64 data types.
631 DCHECK(!is_unsigned ||
632 packed_type == DataType::Type::kInt32 ||
633 packed_type == DataType::Type::kInt64) << packed_type;
Aart Bikd58bc322017-05-01 14:49:18 -0700634 DCHECK(HasConsistentPackedTypes(left, packed_type));
635 DCHECK(HasConsistentPackedTypes(right, packed_type));
Aart Bikc8e93c72017-05-10 10:49:22 -0700636 SetPackedFlag<kFieldMinOpIsUnsigned>(is_unsigned);
Aart Bikf3e61ee2017-04-12 17:09:20 -0700637 }
Aart Bikc8e93c72017-05-10 10:49:22 -0700638
639 bool IsUnsigned() const { return GetPackedFlag<kFieldMinOpIsUnsigned>(); }
640
Aart Bikb79f4ac2017-07-10 10:10:37 -0700641 bool CanBeMoved() const OVERRIDE { return true; }
642
643 bool InstructionDataEquals(const HInstruction* other) const OVERRIDE {
644 DCHECK(other->IsVecMin());
645 const HVecMin* o = other->AsVecMin();
646 return HVecOperation::InstructionDataEquals(o) && IsUnsigned() == o->IsUnsigned();
647 }
648
Aart Bikf3e61ee2017-04-12 17:09:20 -0700649 DECLARE_INSTRUCTION(VecMin);
Aart Bikc8e93c72017-05-10 10:49:22 -0700650
Artem Serovcced8ba2017-07-19 18:18:09 +0100651 protected:
652 DEFAULT_COPY_CONSTRUCTOR(VecMin);
653
Aart Bikf3e61ee2017-04-12 17:09:20 -0700654 private:
Aart Bikc8e93c72017-05-10 10:49:22 -0700655 // Additional packed bits.
656 static constexpr size_t kFieldMinOpIsUnsigned = HVecOperation::kNumberOfVectorOpPackedBits;
657 static constexpr size_t kNumberOfMinOpPackedBits = kFieldMinOpIsUnsigned + 1;
658 static_assert(kNumberOfMinOpPackedBits <= kMaxNumberOfPackedBits, "Too many packed fields.");
Aart Bikf3e61ee2017-04-12 17:09:20 -0700659};
660
661// Takes maximum of every component in the two vectors,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700662// viz. MAX( [ x1, .. , xn ] , [ y1, .. , yn ]) = [ max(x1, y1), .. , max(xn, yn) ]
663// for either both signed or both unsigned operands x, y.
Aart Bikf3e61ee2017-04-12 17:09:20 -0700664class HVecMax FINAL : public HVecBinaryOperation {
665 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100666 HVecMax(ArenaAllocator* allocator,
Aart Bikf3e61ee2017-04-12 17:09:20 -0700667 HInstruction* left,
668 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100669 DataType::Type packed_type,
Aart Bikf3e61ee2017-04-12 17:09:20 -0700670 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700671 bool is_unsigned,
672 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100673 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Vladimir Markod5d2f2c2017-09-26 12:37:26 +0100674 // The `is_unsigned` flag should be used exclusively with the Int32 or Int64.
675 // This flag is a temporary measure while we do not have the Uint32 and Uint64 data types.
676 DCHECK(!is_unsigned ||
677 packed_type == DataType::Type::kInt32 ||
678 packed_type == DataType::Type::kInt64) << packed_type;
Aart Bikd58bc322017-05-01 14:49:18 -0700679 DCHECK(HasConsistentPackedTypes(left, packed_type));
680 DCHECK(HasConsistentPackedTypes(right, packed_type));
Aart Bikc8e93c72017-05-10 10:49:22 -0700681 SetPackedFlag<kFieldMaxOpIsUnsigned>(is_unsigned);
Aart Bikf3e61ee2017-04-12 17:09:20 -0700682 }
Aart Bikc8e93c72017-05-10 10:49:22 -0700683
684 bool IsUnsigned() const { return GetPackedFlag<kFieldMaxOpIsUnsigned>(); }
685
Aart Bikb79f4ac2017-07-10 10:10:37 -0700686 bool CanBeMoved() const OVERRIDE { return true; }
687
688 bool InstructionDataEquals(const HInstruction* other) const OVERRIDE {
689 DCHECK(other->IsVecMax());
690 const HVecMax* o = other->AsVecMax();
691 return HVecOperation::InstructionDataEquals(o) && IsUnsigned() == o->IsUnsigned();
692 }
693
Aart Bikf3e61ee2017-04-12 17:09:20 -0700694 DECLARE_INSTRUCTION(VecMax);
Aart Bikc8e93c72017-05-10 10:49:22 -0700695
Artem Serovcced8ba2017-07-19 18:18:09 +0100696 protected:
697 DEFAULT_COPY_CONSTRUCTOR(VecMax);
698
Aart Bikf3e61ee2017-04-12 17:09:20 -0700699 private:
Aart Bikc8e93c72017-05-10 10:49:22 -0700700 // Additional packed bits.
701 static constexpr size_t kFieldMaxOpIsUnsigned = HVecOperation::kNumberOfVectorOpPackedBits;
702 static constexpr size_t kNumberOfMaxOpPackedBits = kFieldMaxOpIsUnsigned + 1;
703 static_assert(kNumberOfMaxOpPackedBits <= kMaxNumberOfPackedBits, "Too many packed fields.");
Aart Bikf3e61ee2017-04-12 17:09:20 -0700704};
705
Aart Bikf8f5a162017-02-06 15:35:29 -0800706// Bitwise-ands every component in the two vectors,
707// viz. [ x1, .. , xn ] & [ y1, .. , yn ] = [ x1 & y1, .. , xn & yn ].
708class HVecAnd FINAL : public HVecBinaryOperation {
709 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100710 HVecAnd(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800711 HInstruction* left,
712 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100713 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800714 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700715 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100716 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikf8f5a162017-02-06 15:35:29 -0800717 DCHECK(left->IsVecOperation() && right->IsVecOperation());
Aart Bikf8f5a162017-02-06 15:35:29 -0800718 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700719
720 bool CanBeMoved() const OVERRIDE { return true; }
721
Aart Bikf8f5a162017-02-06 15:35:29 -0800722 DECLARE_INSTRUCTION(VecAnd);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700723
Artem Serovcced8ba2017-07-19 18:18:09 +0100724 protected:
725 DEFAULT_COPY_CONSTRUCTOR(VecAnd);
Aart Bikf8f5a162017-02-06 15:35:29 -0800726};
727
728// Bitwise-and-nots every component in the two vectors,
729// viz. [ x1, .. , xn ] and-not [ y1, .. , yn ] = [ ~x1 & y1, .. , ~xn & yn ].
730class HVecAndNot FINAL : public HVecBinaryOperation {
731 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100732 HVecAndNot(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800733 HInstruction* left,
734 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100735 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800736 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700737 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100738 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikf8f5a162017-02-06 15:35:29 -0800739 DCHECK(left->IsVecOperation() && right->IsVecOperation());
Aart Bikf8f5a162017-02-06 15:35:29 -0800740 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700741
742 bool CanBeMoved() const OVERRIDE { return true; }
743
Aart Bikf8f5a162017-02-06 15:35:29 -0800744 DECLARE_INSTRUCTION(VecAndNot);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700745
Artem Serovcced8ba2017-07-19 18:18:09 +0100746 protected:
747 DEFAULT_COPY_CONSTRUCTOR(VecAndNot);
Aart Bikf8f5a162017-02-06 15:35:29 -0800748};
749
750// Bitwise-ors every component in the two vectors,
751// viz. [ x1, .. , xn ] | [ y1, .. , yn ] = [ x1 | y1, .. , xn | yn ].
752class HVecOr FINAL : public HVecBinaryOperation {
753 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100754 HVecOr(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800755 HInstruction* left,
756 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100757 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800758 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700759 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100760 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikf8f5a162017-02-06 15:35:29 -0800761 DCHECK(left->IsVecOperation() && right->IsVecOperation());
Aart Bikf8f5a162017-02-06 15:35:29 -0800762 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700763
764 bool CanBeMoved() const OVERRIDE { return true; }
765
Aart Bikf8f5a162017-02-06 15:35:29 -0800766 DECLARE_INSTRUCTION(VecOr);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700767
Artem Serovcced8ba2017-07-19 18:18:09 +0100768 protected:
769 DEFAULT_COPY_CONSTRUCTOR(VecOr);
Aart Bikf8f5a162017-02-06 15:35:29 -0800770};
771
772// Bitwise-xors every component in the two vectors,
773// viz. [ x1, .. , xn ] ^ [ y1, .. , yn ] = [ x1 ^ y1, .. , xn ^ yn ].
774class HVecXor FINAL : public HVecBinaryOperation {
775 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100776 HVecXor(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800777 HInstruction* left,
778 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100779 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800780 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700781 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100782 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikf8f5a162017-02-06 15:35:29 -0800783 DCHECK(left->IsVecOperation() && right->IsVecOperation());
Aart Bikf8f5a162017-02-06 15:35:29 -0800784 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700785
786 bool CanBeMoved() const OVERRIDE { return true; }
787
Aart Bikf8f5a162017-02-06 15:35:29 -0800788 DECLARE_INSTRUCTION(VecXor);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700789
Artem Serovcced8ba2017-07-19 18:18:09 +0100790 protected:
791 DEFAULT_COPY_CONSTRUCTOR(VecXor);
Aart Bikf8f5a162017-02-06 15:35:29 -0800792};
793
794// Logically shifts every component in the vector left by the given distance,
795// viz. [ x1, .. , xn ] << d = [ x1 << d, .. , xn << d ].
796class HVecShl FINAL : public HVecBinaryOperation {
797 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100798 HVecShl(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800799 HInstruction* left,
800 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100801 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800802 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700803 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100804 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700805 DCHECK(HasConsistentPackedTypes(left, packed_type));
Aart Bikf8f5a162017-02-06 15:35:29 -0800806 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700807
808 bool CanBeMoved() const OVERRIDE { return true; }
809
Aart Bikf8f5a162017-02-06 15:35:29 -0800810 DECLARE_INSTRUCTION(VecShl);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700811
Artem Serovcced8ba2017-07-19 18:18:09 +0100812 protected:
813 DEFAULT_COPY_CONSTRUCTOR(VecShl);
Aart Bikf8f5a162017-02-06 15:35:29 -0800814};
815
816// Arithmetically shifts every component in the vector right by the given distance,
817// viz. [ x1, .. , xn ] >> d = [ x1 >> d, .. , xn >> d ].
818class HVecShr FINAL : public HVecBinaryOperation {
819 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100820 HVecShr(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800821 HInstruction* left,
822 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100823 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800824 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700825 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100826 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700827 DCHECK(HasConsistentPackedTypes(left, packed_type));
Aart Bikf8f5a162017-02-06 15:35:29 -0800828 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700829
830 bool CanBeMoved() const OVERRIDE { return true; }
831
Aart Bikf8f5a162017-02-06 15:35:29 -0800832 DECLARE_INSTRUCTION(VecShr);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700833
Artem Serovcced8ba2017-07-19 18:18:09 +0100834 protected:
835 DEFAULT_COPY_CONSTRUCTOR(VecShr);
Aart Bikf8f5a162017-02-06 15:35:29 -0800836};
837
838// Logically shifts every component in the vector right by the given distance,
839// viz. [ x1, .. , xn ] >>> d = [ x1 >>> d, .. , xn >>> d ].
840class HVecUShr FINAL : public HVecBinaryOperation {
841 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100842 HVecUShr(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800843 HInstruction* left,
844 HInstruction* right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100845 DataType::Type packed_type,
Aart Bikf8f5a162017-02-06 15:35:29 -0800846 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700847 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100848 : HVecBinaryOperation(allocator, left, right, packed_type, vector_length, dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -0700849 DCHECK(HasConsistentPackedTypes(left, packed_type));
Aart Bikf8f5a162017-02-06 15:35:29 -0800850 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700851
852 bool CanBeMoved() const OVERRIDE { return true; }
853
Aart Bikf8f5a162017-02-06 15:35:29 -0800854 DECLARE_INSTRUCTION(VecUShr);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700855
Artem Serovcced8ba2017-07-19 18:18:09 +0100856 protected:
857 DEFAULT_COPY_CONSTRUCTOR(VecUShr);
Aart Bikf8f5a162017-02-06 15:35:29 -0800858};
859
Aart Bik8de59162017-04-21 09:42:01 -0700860//
861// Definitions of concrete miscellaneous vector operations in HIR.
862//
863
864// Assigns the given scalar elements to a vector,
Aart Bikdbbac8f2017-09-01 13:06:08 -0700865// viz. set( array(x1, .. , xn) ) = [ x1, .. , xn ] if n == m,
866// set( array(x1, .. , xm) ) = [ x1, .. , xm, 0, .. , 0 ] if m < n.
Aart Bik8de59162017-04-21 09:42:01 -0700867class HVecSetScalars FINAL : public HVecOperation {
Aart Bik0148de42017-09-05 09:25:01 -0700868 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100869 HVecSetScalars(ArenaAllocator* allocator,
Aart Bik5e3afa92017-09-20 14:11:11 -0700870 HInstruction* scalars[],
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100871 DataType::Type packed_type,
Aart Bik8de59162017-04-21 09:42:01 -0700872 size_t vector_length,
Aart Bik0148de42017-09-05 09:25:01 -0700873 size_t number_of_scalars,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700874 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100875 : HVecOperation(allocator,
Aart Bik8de59162017-04-21 09:42:01 -0700876 packed_type,
877 SideEffects::None(),
Aart Bik0148de42017-09-05 09:25:01 -0700878 number_of_scalars,
Aart Bik8de59162017-04-21 09:42:01 -0700879 vector_length,
880 dex_pc) {
Aart Bik0148de42017-09-05 09:25:01 -0700881 for (size_t i = 0; i < number_of_scalars; i++) {
Aart Bik5e3afa92017-09-20 14:11:11 -0700882 DCHECK(!scalars[i]->IsVecOperation() || scalars[i]->IsVecExtractScalar());
Aart Bik8de59162017-04-21 09:42:01 -0700883 SetRawInputAt(0, scalars[i]);
884 }
885 }
Aart Bikb79f4ac2017-07-10 10:10:37 -0700886
887 // Setting scalars needs to stay in place, since SIMD registers are not
888 // kept alive across vector loop boundaries (yet).
889 bool CanBeMoved() const OVERRIDE { return false; }
890
Aart Bik8de59162017-04-21 09:42:01 -0700891 DECLARE_INSTRUCTION(VecSetScalars);
Aart Bikb79f4ac2017-07-10 10:10:37 -0700892
Artem Serovcced8ba2017-07-19 18:18:09 +0100893 protected:
894 DEFAULT_COPY_CONSTRUCTOR(VecSetScalars);
Aart Bik8de59162017-04-21 09:42:01 -0700895};
896
Aart Bikdbbac8f2017-09-01 13:06:08 -0700897// Multiplies every component in the two vectors, adds the result vector to the accumulator vector,
898// viz. [ a1, .. , an ] + [ x1, .. , xn ] * [ y1, .. , yn ] = [ a1 + x1 * y1, .. , an + xn * yn ].
Artem Serovf34dd202017-04-10 17:41:46 +0100899class HVecMultiplyAccumulate FINAL : public HVecOperation {
900 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100901 HVecMultiplyAccumulate(ArenaAllocator* allocator,
Artem Serovf34dd202017-04-10 17:41:46 +0100902 InstructionKind op,
903 HInstruction* accumulator,
904 HInstruction* mul_left,
905 HInstruction* mul_right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100906 DataType::Type packed_type,
Artem Serovf34dd202017-04-10 17:41:46 +0100907 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700908 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100909 : HVecOperation(allocator,
Artem Serovf34dd202017-04-10 17:41:46 +0100910 packed_type,
911 SideEffects::None(),
Aart Bik8de59162017-04-21 09:42:01 -0700912 /* number_of_inputs */ 3,
Artem Serovf34dd202017-04-10 17:41:46 +0100913 vector_length,
914 dex_pc),
915 op_kind_(op) {
916 DCHECK(op == InstructionKind::kAdd || op == InstructionKind::kSub);
Aart Bikd58bc322017-05-01 14:49:18 -0700917 DCHECK(HasConsistentPackedTypes(accumulator, packed_type));
918 DCHECK(HasConsistentPackedTypes(mul_left, packed_type));
919 DCHECK(HasConsistentPackedTypes(mul_right, packed_type));
Aart Bikdbbac8f2017-09-01 13:06:08 -0700920 SetRawInputAt(0, accumulator);
921 SetRawInputAt(1, mul_left);
922 SetRawInputAt(2, mul_right);
Artem Serovf34dd202017-04-10 17:41:46 +0100923 }
924
Nicolas Geoffray9858bf72017-07-08 12:34:55 +0000925 bool CanBeMoved() const OVERRIDE { return true; }
926
Artem Serovf34dd202017-04-10 17:41:46 +0100927 bool InstructionDataEquals(const HInstruction* other) const OVERRIDE {
Aart Bikb79f4ac2017-07-10 10:10:37 -0700928 DCHECK(other->IsVecMultiplyAccumulate());
929 const HVecMultiplyAccumulate* o = other->AsVecMultiplyAccumulate();
930 return HVecOperation::InstructionDataEquals(o) && GetOpKind() == o->GetOpKind();
Artem Serovf34dd202017-04-10 17:41:46 +0100931 }
932
933 InstructionKind GetOpKind() const { return op_kind_; }
934
935 DECLARE_INSTRUCTION(VecMultiplyAccumulate);
936
Artem Serovcced8ba2017-07-19 18:18:09 +0100937 protected:
938 DEFAULT_COPY_CONSTRUCTOR(VecMultiplyAccumulate);
939
Artem Serovf34dd202017-04-10 17:41:46 +0100940 private:
941 // Indicates if this is a MADD or MSUB.
942 const InstructionKind op_kind_;
Artem Serovf34dd202017-04-10 17:41:46 +0100943};
944
Aart Bikdbbac8f2017-09-01 13:06:08 -0700945// Takes the absolute difference of two vectors, and adds the results to
946// same-precision or wider-precision components in the accumulator,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700947// viz. SAD([ a1, .. , am ], [ x1, .. , xn ], [ y1, .. , yn ]) =
Aart Bikdbbac8f2017-09-01 13:06:08 -0700948// [ a1 + sum abs(xi-yi), .. , am + sum abs(xj-yj) ],
Aart Bik46b6dbc2017-10-03 11:37:37 -0700949// for m <= n, non-overlapping sums, and signed operands x, y.
Aart Bikdbbac8f2017-09-01 13:06:08 -0700950class HVecSADAccumulate FINAL : public HVecOperation {
951 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100952 HVecSADAccumulate(ArenaAllocator* allocator,
Aart Bikdbbac8f2017-09-01 13:06:08 -0700953 HInstruction* accumulator,
954 HInstruction* sad_left,
955 HInstruction* sad_right,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100956 DataType::Type packed_type,
Aart Bikdbbac8f2017-09-01 13:06:08 -0700957 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700958 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100959 : HVecOperation(allocator,
Aart Bikdbbac8f2017-09-01 13:06:08 -0700960 packed_type,
961 SideEffects::None(),
962 /* number_of_inputs */ 3,
963 vector_length,
964 dex_pc) {
965 DCHECK(HasConsistentPackedTypes(accumulator, packed_type));
966 DCHECK(sad_left->IsVecOperation());
967 DCHECK(sad_right->IsVecOperation());
Vladimir Marko61b92282017-10-11 13:23:17 +0100968 DCHECK_EQ(ToSignedType(sad_left->AsVecOperation()->GetPackedType()),
969 ToSignedType(sad_right->AsVecOperation()->GetPackedType()));
Aart Bikdbbac8f2017-09-01 13:06:08 -0700970 SetRawInputAt(0, accumulator);
971 SetRawInputAt(1, sad_left);
972 SetRawInputAt(2, sad_right);
973 }
974
975 DECLARE_INSTRUCTION(VecSADAccumulate);
976
Artem Serovcced8ba2017-07-19 18:18:09 +0100977 protected:
978 DEFAULT_COPY_CONSTRUCTOR(VecSADAccumulate);
Aart Bikdbbac8f2017-09-01 13:06:08 -0700979};
980
Aart Bikf8f5a162017-02-06 15:35:29 -0800981// Loads a vector from memory, viz. load(mem, 1)
982// yield the vector [ mem(1), .. , mem(n) ].
983class HVecLoad FINAL : public HVecMemoryOperation {
984 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100985 HVecLoad(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800986 HInstruction* base,
987 HInstruction* index,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +0100988 DataType::Type packed_type,
Vladimir Markod5d2f2c2017-09-26 12:37:26 +0100989 SideEffects side_effects,
Aart Bikf8f5a162017-02-06 15:35:29 -0800990 size_t vector_length,
Aart Bikdb14fcf2017-04-25 15:53:58 -0700991 bool is_string_char_at,
Aart Bik46b6dbc2017-10-03 11:37:37 -0700992 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +0100993 : HVecMemoryOperation(allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -0800994 packed_type,
Vladimir Markod5d2f2c2017-09-26 12:37:26 +0100995 side_effects,
Aart Bik8de59162017-04-21 09:42:01 -0700996 /* number_of_inputs */ 2,
Aart Bikf8f5a162017-02-06 15:35:29 -0800997 vector_length,
998 dex_pc) {
999 SetRawInputAt(0, base);
1000 SetRawInputAt(1, index);
Aart Bikdb14fcf2017-04-25 15:53:58 -07001001 SetPackedFlag<kFieldIsStringCharAt>(is_string_char_at);
Aart Bikf8f5a162017-02-06 15:35:29 -08001002 }
Aart Bikdb14fcf2017-04-25 15:53:58 -07001003
1004 bool IsStringCharAt() const { return GetPackedFlag<kFieldIsStringCharAt>(); }
1005
Aart Bikb79f4ac2017-07-10 10:10:37 -07001006 bool CanBeMoved() const OVERRIDE { return true; }
1007
1008 bool InstructionDataEquals(const HInstruction* other) const OVERRIDE {
1009 DCHECK(other->IsVecLoad());
1010 const HVecLoad* o = other->AsVecLoad();
1011 return HVecMemoryOperation::InstructionDataEquals(o) && IsStringCharAt() == o->IsStringCharAt();
1012 }
1013
1014 DECLARE_INSTRUCTION(VecLoad);
1015
Artem Serovcced8ba2017-07-19 18:18:09 +01001016 protected:
1017 DEFAULT_COPY_CONSTRUCTOR(VecLoad);
1018
Aart Bikf8f5a162017-02-06 15:35:29 -08001019 private:
Aart Bikdb14fcf2017-04-25 15:53:58 -07001020 // Additional packed bits.
1021 static constexpr size_t kFieldIsStringCharAt = HVecOperation::kNumberOfVectorOpPackedBits;
1022 static constexpr size_t kNumberOfVecLoadPackedBits = kFieldIsStringCharAt + 1;
1023 static_assert(kNumberOfVecLoadPackedBits <= kMaxNumberOfPackedBits, "Too many packed fields.");
Aart Bikf8f5a162017-02-06 15:35:29 -08001024};
1025
1026// Stores a vector to memory, viz. store(m, 1, [x1, .. , xn] )
1027// sets mem(1) = x1, .. , mem(n) = xn.
1028class HVecStore FINAL : public HVecMemoryOperation {
1029 public:
Vladimir Markoe764d2e2017-10-05 14:35:55 +01001030 HVecStore(ArenaAllocator* allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -08001031 HInstruction* base,
1032 HInstruction* index,
1033 HInstruction* value,
Vladimir Marko0ebe0d82017-09-21 22:50:39 +01001034 DataType::Type packed_type,
Vladimir Markod5d2f2c2017-09-26 12:37:26 +01001035 SideEffects side_effects,
Aart Bikf8f5a162017-02-06 15:35:29 -08001036 size_t vector_length,
Aart Bik46b6dbc2017-10-03 11:37:37 -07001037 uint32_t dex_pc)
Vladimir Markoe764d2e2017-10-05 14:35:55 +01001038 : HVecMemoryOperation(allocator,
Aart Bikf8f5a162017-02-06 15:35:29 -08001039 packed_type,
Vladimir Markod5d2f2c2017-09-26 12:37:26 +01001040 side_effects,
Aart Bik8de59162017-04-21 09:42:01 -07001041 /* number_of_inputs */ 3,
Aart Bikf8f5a162017-02-06 15:35:29 -08001042 vector_length,
1043 dex_pc) {
Aart Bikd58bc322017-05-01 14:49:18 -07001044 DCHECK(HasConsistentPackedTypes(value, packed_type));
Aart Bikf8f5a162017-02-06 15:35:29 -08001045 SetRawInputAt(0, base);
1046 SetRawInputAt(1, index);
1047 SetRawInputAt(2, value);
1048 }
Aart Bikb79f4ac2017-07-10 10:10:37 -07001049
1050 // A store needs to stay in place.
1051 bool CanBeMoved() const OVERRIDE { return false; }
1052
Aart Bikf8f5a162017-02-06 15:35:29 -08001053 DECLARE_INSTRUCTION(VecStore);
Aart Bikb79f4ac2017-07-10 10:10:37 -07001054
Artem Serovcced8ba2017-07-19 18:18:09 +01001055 protected:
1056 DEFAULT_COPY_CONSTRUCTOR(VecStore)
Aart Bikf8f5a162017-02-06 15:35:29 -08001057};
1058
1059} // namespace art
1060
1061#endif // ART_COMPILER_OPTIMIZING_NODES_VECTOR_H_