Chris Larsen | 3add9cb | 2016-04-14 14:01:33 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2016 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "assembler_mips.h" |
| 18 | |
| 19 | #include <map> |
| 20 | |
| 21 | #include "base/stl_util.h" |
| 22 | #include "utils/assembler_test.h" |
| 23 | |
| 24 | #define __ GetAssembler()-> |
| 25 | |
| 26 | namespace art { |
| 27 | |
| 28 | struct MIPSCpuRegisterCompare { |
| 29 | bool operator()(const mips::Register& a, const mips::Register& b) const { |
| 30 | return a < b; |
| 31 | } |
| 32 | }; |
| 33 | |
| 34 | class AssemblerMIPS32r6Test : public AssemblerTest<mips::MipsAssembler, |
| 35 | mips::Register, |
| 36 | mips::FRegister, |
| 37 | uint32_t> { |
| 38 | public: |
| 39 | typedef AssemblerTest<mips::MipsAssembler, mips::Register, mips::FRegister, uint32_t> Base; |
| 40 | |
| 41 | AssemblerMIPS32r6Test() : |
| 42 | instruction_set_features_(MipsInstructionSetFeatures::FromVariant("mips32r6", nullptr)) { |
| 43 | } |
| 44 | |
| 45 | protected: |
| 46 | // Get the typically used name for this architecture, e.g., aarch64, x86-64, ... |
| 47 | std::string GetArchitectureString() OVERRIDE { |
| 48 | return "mips"; |
| 49 | } |
| 50 | |
Alexey Frunze | e3fb245 | 2016-05-10 16:08:05 -0700 | [diff] [blame] | 51 | std::string GetAssemblerCmdName() OVERRIDE { |
| 52 | // We assemble and link for MIPS32R6. See GetAssemblerParameters() for details. |
| 53 | return "gcc"; |
| 54 | } |
| 55 | |
Chris Larsen | 3add9cb | 2016-04-14 14:01:33 -0700 | [diff] [blame] | 56 | std::string GetAssemblerParameters() OVERRIDE { |
Alexey Frunze | e3fb245 | 2016-05-10 16:08:05 -0700 | [diff] [blame] | 57 | // We assemble and link for MIPS32R6. The reason is that object files produced for MIPS32R6 |
| 58 | // (and MIPS64R6) with the GNU assembler don't have correct final offsets in PC-relative |
| 59 | // branches in the .text section and so they require a relocation pass (there's a relocation |
| 60 | // section, .rela.text, that has the needed info to fix up the branches). |
| 61 | // We use "-modd-spreg" so we can use odd-numbered single precision FPU registers. |
| 62 | // We put the code at address 0x1000000 (instead of 0) to avoid overlapping with the |
| 63 | // .MIPS.abiflags section (there doesn't seem to be a way to suppress its generation easily). |
| 64 | return " -march=mips32r6 -modd-spreg -Wa,--no-warn" |
| 65 | " -Wl,-Ttext=0x1000000 -Wl,-e0x1000000 -nostdlib"; |
| 66 | } |
| 67 | |
| 68 | void Pad(std::vector<uint8_t>& data) OVERRIDE { |
| 69 | // The GNU linker unconditionally pads the code segment with NOPs to a size that is a multiple |
| 70 | // of 16 and there doesn't appear to be a way to suppress this padding. Our assembler doesn't |
| 71 | // pad, so, in order for two assembler outputs to match, we need to match the padding as well. |
| 72 | // NOP is encoded as four zero bytes on MIPS. |
| 73 | size_t pad_size = RoundUp(data.size(), 16u) - data.size(); |
| 74 | data.insert(data.end(), pad_size, 0); |
Chris Larsen | 3add9cb | 2016-04-14 14:01:33 -0700 | [diff] [blame] | 75 | } |
| 76 | |
| 77 | std::string GetDisassembleParameters() OVERRIDE { |
| 78 | return " -D -bbinary -mmips:isa32r6"; |
| 79 | } |
| 80 | |
| 81 | mips::MipsAssembler* CreateAssembler(ArenaAllocator* arena) OVERRIDE { |
| 82 | return new (arena) mips::MipsAssembler(arena, instruction_set_features_.get()); |
| 83 | } |
| 84 | |
| 85 | void SetUpHelpers() OVERRIDE { |
| 86 | if (registers_.size() == 0) { |
| 87 | registers_.push_back(new mips::Register(mips::ZERO)); |
| 88 | registers_.push_back(new mips::Register(mips::AT)); |
| 89 | registers_.push_back(new mips::Register(mips::V0)); |
| 90 | registers_.push_back(new mips::Register(mips::V1)); |
| 91 | registers_.push_back(new mips::Register(mips::A0)); |
| 92 | registers_.push_back(new mips::Register(mips::A1)); |
| 93 | registers_.push_back(new mips::Register(mips::A2)); |
| 94 | registers_.push_back(new mips::Register(mips::A3)); |
| 95 | registers_.push_back(new mips::Register(mips::T0)); |
| 96 | registers_.push_back(new mips::Register(mips::T1)); |
| 97 | registers_.push_back(new mips::Register(mips::T2)); |
| 98 | registers_.push_back(new mips::Register(mips::T3)); |
| 99 | registers_.push_back(new mips::Register(mips::T4)); |
| 100 | registers_.push_back(new mips::Register(mips::T5)); |
| 101 | registers_.push_back(new mips::Register(mips::T6)); |
| 102 | registers_.push_back(new mips::Register(mips::T7)); |
| 103 | registers_.push_back(new mips::Register(mips::S0)); |
| 104 | registers_.push_back(new mips::Register(mips::S1)); |
| 105 | registers_.push_back(new mips::Register(mips::S2)); |
| 106 | registers_.push_back(new mips::Register(mips::S3)); |
| 107 | registers_.push_back(new mips::Register(mips::S4)); |
| 108 | registers_.push_back(new mips::Register(mips::S5)); |
| 109 | registers_.push_back(new mips::Register(mips::S6)); |
| 110 | registers_.push_back(new mips::Register(mips::S7)); |
| 111 | registers_.push_back(new mips::Register(mips::T8)); |
| 112 | registers_.push_back(new mips::Register(mips::T9)); |
| 113 | registers_.push_back(new mips::Register(mips::K0)); |
| 114 | registers_.push_back(new mips::Register(mips::K1)); |
| 115 | registers_.push_back(new mips::Register(mips::GP)); |
| 116 | registers_.push_back(new mips::Register(mips::SP)); |
| 117 | registers_.push_back(new mips::Register(mips::FP)); |
| 118 | registers_.push_back(new mips::Register(mips::RA)); |
| 119 | |
| 120 | secondary_register_names_.emplace(mips::Register(mips::ZERO), "zero"); |
| 121 | secondary_register_names_.emplace(mips::Register(mips::AT), "at"); |
| 122 | secondary_register_names_.emplace(mips::Register(mips::V0), "v0"); |
| 123 | secondary_register_names_.emplace(mips::Register(mips::V1), "v1"); |
| 124 | secondary_register_names_.emplace(mips::Register(mips::A0), "a0"); |
| 125 | secondary_register_names_.emplace(mips::Register(mips::A1), "a1"); |
| 126 | secondary_register_names_.emplace(mips::Register(mips::A2), "a2"); |
| 127 | secondary_register_names_.emplace(mips::Register(mips::A3), "a3"); |
| 128 | secondary_register_names_.emplace(mips::Register(mips::T0), "t0"); |
| 129 | secondary_register_names_.emplace(mips::Register(mips::T1), "t1"); |
| 130 | secondary_register_names_.emplace(mips::Register(mips::T2), "t2"); |
| 131 | secondary_register_names_.emplace(mips::Register(mips::T3), "t3"); |
| 132 | secondary_register_names_.emplace(mips::Register(mips::T4), "t4"); |
| 133 | secondary_register_names_.emplace(mips::Register(mips::T5), "t5"); |
| 134 | secondary_register_names_.emplace(mips::Register(mips::T6), "t6"); |
| 135 | secondary_register_names_.emplace(mips::Register(mips::T7), "t7"); |
| 136 | secondary_register_names_.emplace(mips::Register(mips::S0), "s0"); |
| 137 | secondary_register_names_.emplace(mips::Register(mips::S1), "s1"); |
| 138 | secondary_register_names_.emplace(mips::Register(mips::S2), "s2"); |
| 139 | secondary_register_names_.emplace(mips::Register(mips::S3), "s3"); |
| 140 | secondary_register_names_.emplace(mips::Register(mips::S4), "s4"); |
| 141 | secondary_register_names_.emplace(mips::Register(mips::S5), "s5"); |
| 142 | secondary_register_names_.emplace(mips::Register(mips::S6), "s6"); |
| 143 | secondary_register_names_.emplace(mips::Register(mips::S7), "s7"); |
| 144 | secondary_register_names_.emplace(mips::Register(mips::T8), "t8"); |
| 145 | secondary_register_names_.emplace(mips::Register(mips::T9), "t9"); |
| 146 | secondary_register_names_.emplace(mips::Register(mips::K0), "k0"); |
| 147 | secondary_register_names_.emplace(mips::Register(mips::K1), "k1"); |
| 148 | secondary_register_names_.emplace(mips::Register(mips::GP), "gp"); |
| 149 | secondary_register_names_.emplace(mips::Register(mips::SP), "sp"); |
| 150 | secondary_register_names_.emplace(mips::Register(mips::FP), "fp"); |
| 151 | secondary_register_names_.emplace(mips::Register(mips::RA), "ra"); |
| 152 | |
| 153 | fp_registers_.push_back(new mips::FRegister(mips::F0)); |
| 154 | fp_registers_.push_back(new mips::FRegister(mips::F1)); |
| 155 | fp_registers_.push_back(new mips::FRegister(mips::F2)); |
| 156 | fp_registers_.push_back(new mips::FRegister(mips::F3)); |
| 157 | fp_registers_.push_back(new mips::FRegister(mips::F4)); |
| 158 | fp_registers_.push_back(new mips::FRegister(mips::F5)); |
| 159 | fp_registers_.push_back(new mips::FRegister(mips::F6)); |
| 160 | fp_registers_.push_back(new mips::FRegister(mips::F7)); |
| 161 | fp_registers_.push_back(new mips::FRegister(mips::F8)); |
| 162 | fp_registers_.push_back(new mips::FRegister(mips::F9)); |
| 163 | fp_registers_.push_back(new mips::FRegister(mips::F10)); |
| 164 | fp_registers_.push_back(new mips::FRegister(mips::F11)); |
| 165 | fp_registers_.push_back(new mips::FRegister(mips::F12)); |
| 166 | fp_registers_.push_back(new mips::FRegister(mips::F13)); |
| 167 | fp_registers_.push_back(new mips::FRegister(mips::F14)); |
| 168 | fp_registers_.push_back(new mips::FRegister(mips::F15)); |
| 169 | fp_registers_.push_back(new mips::FRegister(mips::F16)); |
| 170 | fp_registers_.push_back(new mips::FRegister(mips::F17)); |
| 171 | fp_registers_.push_back(new mips::FRegister(mips::F18)); |
| 172 | fp_registers_.push_back(new mips::FRegister(mips::F19)); |
| 173 | fp_registers_.push_back(new mips::FRegister(mips::F20)); |
| 174 | fp_registers_.push_back(new mips::FRegister(mips::F21)); |
| 175 | fp_registers_.push_back(new mips::FRegister(mips::F22)); |
| 176 | fp_registers_.push_back(new mips::FRegister(mips::F23)); |
| 177 | fp_registers_.push_back(new mips::FRegister(mips::F24)); |
| 178 | fp_registers_.push_back(new mips::FRegister(mips::F25)); |
| 179 | fp_registers_.push_back(new mips::FRegister(mips::F26)); |
| 180 | fp_registers_.push_back(new mips::FRegister(mips::F27)); |
| 181 | fp_registers_.push_back(new mips::FRegister(mips::F28)); |
| 182 | fp_registers_.push_back(new mips::FRegister(mips::F29)); |
| 183 | fp_registers_.push_back(new mips::FRegister(mips::F30)); |
| 184 | fp_registers_.push_back(new mips::FRegister(mips::F31)); |
| 185 | } |
| 186 | } |
| 187 | |
| 188 | void TearDown() OVERRIDE { |
| 189 | AssemblerTest::TearDown(); |
| 190 | STLDeleteElements(®isters_); |
| 191 | STLDeleteElements(&fp_registers_); |
| 192 | } |
| 193 | |
| 194 | std::vector<mips::Register*> GetRegisters() OVERRIDE { |
| 195 | return registers_; |
| 196 | } |
| 197 | |
| 198 | std::vector<mips::FRegister*> GetFPRegisters() OVERRIDE { |
| 199 | return fp_registers_; |
| 200 | } |
| 201 | |
| 202 | uint32_t CreateImmediate(int64_t imm_value) OVERRIDE { |
| 203 | return imm_value; |
| 204 | } |
| 205 | |
| 206 | std::string GetSecondaryRegisterName(const mips::Register& reg) OVERRIDE { |
| 207 | CHECK(secondary_register_names_.find(reg) != secondary_register_names_.end()); |
| 208 | return secondary_register_names_[reg]; |
| 209 | } |
| 210 | |
| 211 | std::string RepeatInsn(size_t count, const std::string& insn) { |
| 212 | std::string result; |
| 213 | for (; count != 0u; --count) { |
| 214 | result += insn; |
| 215 | } |
| 216 | return result; |
| 217 | } |
| 218 | |
| 219 | void BranchCondTwoRegsHelper(void (mips::MipsAssembler::*f)(mips::Register, |
| 220 | mips::Register, |
| 221 | mips::MipsLabel*), |
Andreas Gampe | 2e965ac | 2016-11-03 17:24:15 -0700 | [diff] [blame] | 222 | const std::string& instr_name) { |
Chris Larsen | 3add9cb | 2016-04-14 14:01:33 -0700 | [diff] [blame] | 223 | mips::MipsLabel label; |
| 224 | (Base::GetAssembler()->*f)(mips::A0, mips::A1, &label); |
| 225 | constexpr size_t kAdduCount1 = 63; |
| 226 | for (size_t i = 0; i != kAdduCount1; ++i) { |
| 227 | __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); |
| 228 | } |
| 229 | __ Bind(&label); |
| 230 | constexpr size_t kAdduCount2 = 64; |
| 231 | for (size_t i = 0; i != kAdduCount2; ++i) { |
| 232 | __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); |
| 233 | } |
| 234 | (Base::GetAssembler()->*f)(mips::A2, mips::A3, &label); |
| 235 | |
| 236 | std::string expected = |
| 237 | ".set noreorder\n" + |
| 238 | instr_name + " $a0, $a1, 1f\n" |
| 239 | "nop\n" + |
| 240 | RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") + |
| 241 | "1:\n" + |
| 242 | RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") + |
| 243 | instr_name + " $a2, $a3, 1b\n" |
| 244 | "nop\n"; |
| 245 | DriverStr(expected, instr_name); |
| 246 | } |
| 247 | |
| 248 | private: |
| 249 | std::vector<mips::Register*> registers_; |
| 250 | std::map<mips::Register, std::string, MIPSCpuRegisterCompare> secondary_register_names_; |
| 251 | |
| 252 | std::vector<mips::FRegister*> fp_registers_; |
| 253 | std::unique_ptr<const MipsInstructionSetFeatures> instruction_set_features_; |
| 254 | }; |
| 255 | |
| 256 | |
| 257 | TEST_F(AssemblerMIPS32r6Test, Toolchain) { |
| 258 | EXPECT_TRUE(CheckTools()); |
| 259 | } |
| 260 | |
| 261 | TEST_F(AssemblerMIPS32r6Test, MulR6) { |
| 262 | DriverStr(RepeatRRR(&mips::MipsAssembler::MulR6, "mul ${reg1}, ${reg2}, ${reg3}"), "MulR6"); |
| 263 | } |
| 264 | |
| 265 | TEST_F(AssemblerMIPS32r6Test, MuhR6) { |
| 266 | DriverStr(RepeatRRR(&mips::MipsAssembler::MuhR6, "muh ${reg1}, ${reg2}, ${reg3}"), "MuhR6"); |
| 267 | } |
| 268 | |
| 269 | TEST_F(AssemblerMIPS32r6Test, MuhuR6) { |
| 270 | DriverStr(RepeatRRR(&mips::MipsAssembler::MuhuR6, "muhu ${reg1}, ${reg2}, ${reg3}"), "MuhuR6"); |
| 271 | } |
| 272 | |
| 273 | TEST_F(AssemblerMIPS32r6Test, DivR6) { |
| 274 | DriverStr(RepeatRRR(&mips::MipsAssembler::DivR6, "div ${reg1}, ${reg2}, ${reg3}"), "DivR6"); |
| 275 | } |
| 276 | |
| 277 | TEST_F(AssemblerMIPS32r6Test, ModR6) { |
| 278 | DriverStr(RepeatRRR(&mips::MipsAssembler::ModR6, "mod ${reg1}, ${reg2}, ${reg3}"), "ModR6"); |
| 279 | } |
| 280 | |
| 281 | TEST_F(AssemblerMIPS32r6Test, DivuR6) { |
| 282 | DriverStr(RepeatRRR(&mips::MipsAssembler::DivuR6, "divu ${reg1}, ${reg2}, ${reg3}"), "DivuR6"); |
| 283 | } |
| 284 | |
| 285 | TEST_F(AssemblerMIPS32r6Test, ModuR6) { |
| 286 | DriverStr(RepeatRRR(&mips::MipsAssembler::ModuR6, "modu ${reg1}, ${reg2}, ${reg3}"), "ModuR6"); |
| 287 | } |
| 288 | |
| 289 | ////////// |
| 290 | // MISC // |
| 291 | ////////// |
| 292 | |
| 293 | TEST_F(AssemblerMIPS32r6Test, Aui) { |
| 294 | DriverStr(RepeatRRIb(&mips::MipsAssembler::Aui, 16, "aui ${reg1}, ${reg2}, {imm}"), "Aui"); |
| 295 | } |
| 296 | |
Alexey Frunze | e3fb245 | 2016-05-10 16:08:05 -0700 | [diff] [blame] | 297 | TEST_F(AssemblerMIPS32r6Test, Auipc) { |
| 298 | DriverStr(RepeatRIb(&mips::MipsAssembler::Auipc, 16, "auipc ${reg}, {imm}"), "Auipc"); |
| 299 | } |
| 300 | |
| 301 | TEST_F(AssemblerMIPS32r6Test, Lwpc) { |
| 302 | // Lwpc() takes an unsigned 19-bit immediate, while the GNU assembler needs a signed offset, |
| 303 | // hence the sign extension from bit 18 with `imm - ((imm & 0x40000) << 1)`. |
| 304 | // The GNU assembler also wants the offset to be a multiple of 4, which it will shift right |
| 305 | // by 2 positions when encoding, hence `<< 2` to compensate for that shift. |
| 306 | // We capture the value of the immediate with `.set imm, {imm}` because the value is needed |
| 307 | // twice for the sign extension, but `{imm}` is substituted only once. |
| 308 | const char* code = ".set imm, {imm}\nlw ${reg}, ((imm - ((imm & 0x40000) << 1)) << 2)($pc)"; |
| 309 | DriverStr(RepeatRIb(&mips::MipsAssembler::Lwpc, 19, code), "Lwpc"); |
| 310 | } |
| 311 | |
Alexey Frunze | 96b6682 | 2016-09-10 02:32:44 -0700 | [diff] [blame] | 312 | TEST_F(AssemblerMIPS32r6Test, Addiupc) { |
| 313 | // The comment from the Lwpc() test applies to this Addiupc() test as well. |
| 314 | const char* code = ".set imm, {imm}\naddiupc ${reg}, (imm - ((imm & 0x40000) << 1)) << 2"; |
| 315 | DriverStr(RepeatRIb(&mips::MipsAssembler::Addiupc, 19, code), "Addiupc"); |
| 316 | } |
| 317 | |
Chris Larsen | 3add9cb | 2016-04-14 14:01:33 -0700 | [diff] [blame] | 318 | TEST_F(AssemblerMIPS32r6Test, Bitswap) { |
| 319 | DriverStr(RepeatRR(&mips::MipsAssembler::Bitswap, "bitswap ${reg1}, ${reg2}"), "bitswap"); |
| 320 | } |
| 321 | |
| 322 | TEST_F(AssemblerMIPS32r6Test, Seleqz) { |
| 323 | DriverStr(RepeatRRR(&mips::MipsAssembler::Seleqz, "seleqz ${reg1}, ${reg2}, ${reg3}"), |
| 324 | "seleqz"); |
| 325 | } |
| 326 | |
| 327 | TEST_F(AssemblerMIPS32r6Test, Selnez) { |
| 328 | DriverStr(RepeatRRR(&mips::MipsAssembler::Selnez, "selnez ${reg1}, ${reg2}, ${reg3}"), |
| 329 | "selnez"); |
| 330 | } |
| 331 | |
| 332 | TEST_F(AssemblerMIPS32r6Test, ClzR6) { |
| 333 | DriverStr(RepeatRR(&mips::MipsAssembler::ClzR6, "clz ${reg1}, ${reg2}"), "clzR6"); |
| 334 | } |
| 335 | |
| 336 | TEST_F(AssemblerMIPS32r6Test, CloR6) { |
| 337 | DriverStr(RepeatRR(&mips::MipsAssembler::CloR6, "clo ${reg1}, ${reg2}"), "cloR6"); |
| 338 | } |
| 339 | |
| 340 | //////////////////// |
| 341 | // FLOATING POINT // |
| 342 | //////////////////// |
| 343 | |
| 344 | TEST_F(AssemblerMIPS32r6Test, SelS) { |
| 345 | DriverStr(RepeatFFF(&mips::MipsAssembler::SelS, "sel.s ${reg1}, ${reg2}, ${reg3}"), "sel.s"); |
| 346 | } |
| 347 | |
| 348 | TEST_F(AssemblerMIPS32r6Test, SelD) { |
| 349 | DriverStr(RepeatFFF(&mips::MipsAssembler::SelD, "sel.d ${reg1}, ${reg2}, ${reg3}"), "sel.d"); |
| 350 | } |
| 351 | |
Alexey Frunze | 674b9ee | 2016-09-20 14:54:15 -0700 | [diff] [blame] | 352 | TEST_F(AssemblerMIPS32r6Test, SeleqzS) { |
| 353 | DriverStr(RepeatFFF(&mips::MipsAssembler::SeleqzS, "seleqz.s ${reg1}, ${reg2}, ${reg3}"), |
| 354 | "seleqz.s"); |
| 355 | } |
| 356 | |
| 357 | TEST_F(AssemblerMIPS32r6Test, SeleqzD) { |
| 358 | DriverStr(RepeatFFF(&mips::MipsAssembler::SeleqzD, "seleqz.d ${reg1}, ${reg2}, ${reg3}"), |
| 359 | "seleqz.d"); |
| 360 | } |
| 361 | |
| 362 | TEST_F(AssemblerMIPS32r6Test, SelnezS) { |
| 363 | DriverStr(RepeatFFF(&mips::MipsAssembler::SelnezS, "selnez.s ${reg1}, ${reg2}, ${reg3}"), |
| 364 | "selnez.s"); |
| 365 | } |
| 366 | |
| 367 | TEST_F(AssemblerMIPS32r6Test, SelnezD) { |
| 368 | DriverStr(RepeatFFF(&mips::MipsAssembler::SelnezD, "selnez.d ${reg1}, ${reg2}, ${reg3}"), |
| 369 | "selnez.d"); |
| 370 | } |
| 371 | |
Chris Larsen | 3add9cb | 2016-04-14 14:01:33 -0700 | [diff] [blame] | 372 | TEST_F(AssemblerMIPS32r6Test, ClassS) { |
| 373 | DriverStr(RepeatFF(&mips::MipsAssembler::ClassS, "class.s ${reg1}, ${reg2}"), "class.s"); |
| 374 | } |
| 375 | |
| 376 | TEST_F(AssemblerMIPS32r6Test, ClassD) { |
| 377 | DriverStr(RepeatFF(&mips::MipsAssembler::ClassD, "class.d ${reg1}, ${reg2}"), "class.d"); |
| 378 | } |
| 379 | |
| 380 | TEST_F(AssemblerMIPS32r6Test, MinS) { |
| 381 | DriverStr(RepeatFFF(&mips::MipsAssembler::MinS, "min.s ${reg1}, ${reg2}, ${reg3}"), "min.s"); |
| 382 | } |
| 383 | |
| 384 | TEST_F(AssemblerMIPS32r6Test, MinD) { |
| 385 | DriverStr(RepeatFFF(&mips::MipsAssembler::MinD, "min.d ${reg1}, ${reg2}, ${reg3}"), "min.d"); |
| 386 | } |
| 387 | |
| 388 | TEST_F(AssemblerMIPS32r6Test, MaxS) { |
| 389 | DriverStr(RepeatFFF(&mips::MipsAssembler::MaxS, "max.s ${reg1}, ${reg2}, ${reg3}"), "max.s"); |
| 390 | } |
| 391 | |
| 392 | TEST_F(AssemblerMIPS32r6Test, MaxD) { |
| 393 | DriverStr(RepeatFFF(&mips::MipsAssembler::MaxD, "max.d ${reg1}, ${reg2}, ${reg3}"), "max.d"); |
| 394 | } |
| 395 | |
| 396 | TEST_F(AssemblerMIPS32r6Test, CmpUnS) { |
| 397 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUnS, "cmp.un.s ${reg1}, ${reg2}, ${reg3}"), |
| 398 | "cmp.un.s"); |
| 399 | } |
| 400 | |
| 401 | TEST_F(AssemblerMIPS32r6Test, CmpEqS) { |
| 402 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpEqS, "cmp.eq.s ${reg1}, ${reg2}, ${reg3}"), |
| 403 | "cmp.eq.s"); |
| 404 | } |
| 405 | |
| 406 | TEST_F(AssemblerMIPS32r6Test, CmpUeqS) { |
| 407 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUeqS, "cmp.ueq.s ${reg1}, ${reg2}, ${reg3}"), |
| 408 | "cmp.ueq.s"); |
| 409 | } |
| 410 | |
| 411 | TEST_F(AssemblerMIPS32r6Test, CmpLtS) { |
| 412 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpLtS, "cmp.lt.s ${reg1}, ${reg2}, ${reg3}"), |
| 413 | "cmp.lt.s"); |
| 414 | } |
| 415 | |
| 416 | TEST_F(AssemblerMIPS32r6Test, CmpUltS) { |
| 417 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUltS, "cmp.ult.s ${reg1}, ${reg2}, ${reg3}"), |
| 418 | "cmp.ult.s"); |
| 419 | } |
| 420 | |
| 421 | TEST_F(AssemblerMIPS32r6Test, CmpLeS) { |
| 422 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpLeS, "cmp.le.s ${reg1}, ${reg2}, ${reg3}"), |
| 423 | "cmp.le.s"); |
| 424 | } |
| 425 | |
| 426 | TEST_F(AssemblerMIPS32r6Test, CmpUleS) { |
| 427 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUleS, "cmp.ule.s ${reg1}, ${reg2}, ${reg3}"), |
| 428 | "cmp.ule.s"); |
| 429 | } |
| 430 | |
| 431 | TEST_F(AssemblerMIPS32r6Test, CmpOrS) { |
| 432 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpOrS, "cmp.or.s ${reg1}, ${reg2}, ${reg3}"), |
| 433 | "cmp.or.s"); |
| 434 | } |
| 435 | |
| 436 | TEST_F(AssemblerMIPS32r6Test, CmpUneS) { |
| 437 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUneS, "cmp.une.s ${reg1}, ${reg2}, ${reg3}"), |
| 438 | "cmp.une.s"); |
| 439 | } |
| 440 | |
| 441 | TEST_F(AssemblerMIPS32r6Test, CmpNeS) { |
| 442 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpNeS, "cmp.ne.s ${reg1}, ${reg2}, ${reg3}"), |
| 443 | "cmp.ne.s"); |
| 444 | } |
| 445 | |
| 446 | TEST_F(AssemblerMIPS32r6Test, CmpUnD) { |
| 447 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUnD, "cmp.un.d ${reg1}, ${reg2}, ${reg3}"), |
| 448 | "cmp.un.d"); |
| 449 | } |
| 450 | |
| 451 | TEST_F(AssemblerMIPS32r6Test, CmpEqD) { |
| 452 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpEqD, "cmp.eq.d ${reg1}, ${reg2}, ${reg3}"), |
| 453 | "cmp.eq.d"); |
| 454 | } |
| 455 | |
| 456 | TEST_F(AssemblerMIPS32r6Test, CmpUeqD) { |
| 457 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUeqD, "cmp.ueq.d ${reg1}, ${reg2}, ${reg3}"), |
| 458 | "cmp.ueq.d"); |
| 459 | } |
| 460 | |
| 461 | TEST_F(AssemblerMIPS32r6Test, CmpLtD) { |
| 462 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpLtD, "cmp.lt.d ${reg1}, ${reg2}, ${reg3}"), |
| 463 | "cmp.lt.d"); |
| 464 | } |
| 465 | |
| 466 | TEST_F(AssemblerMIPS32r6Test, CmpUltD) { |
| 467 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUltD, "cmp.ult.d ${reg1}, ${reg2}, ${reg3}"), |
| 468 | "cmp.ult.d"); |
| 469 | } |
| 470 | |
| 471 | TEST_F(AssemblerMIPS32r6Test, CmpLeD) { |
| 472 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpLeD, "cmp.le.d ${reg1}, ${reg2}, ${reg3}"), |
| 473 | "cmp.le.d"); |
| 474 | } |
| 475 | |
| 476 | TEST_F(AssemblerMIPS32r6Test, CmpUleD) { |
| 477 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUleD, "cmp.ule.d ${reg1}, ${reg2}, ${reg3}"), |
| 478 | "cmp.ule.d"); |
| 479 | } |
| 480 | |
| 481 | TEST_F(AssemblerMIPS32r6Test, CmpOrD) { |
| 482 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpOrD, "cmp.or.d ${reg1}, ${reg2}, ${reg3}"), |
| 483 | "cmp.or.d"); |
| 484 | } |
| 485 | |
| 486 | TEST_F(AssemblerMIPS32r6Test, CmpUneD) { |
| 487 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUneD, "cmp.une.d ${reg1}, ${reg2}, ${reg3}"), |
| 488 | "cmp.une.d"); |
| 489 | } |
| 490 | |
| 491 | TEST_F(AssemblerMIPS32r6Test, CmpNeD) { |
| 492 | DriverStr(RepeatFFF(&mips::MipsAssembler::CmpNeD, "cmp.ne.d ${reg1}, ${reg2}, ${reg3}"), |
| 493 | "cmp.ne.d"); |
| 494 | } |
| 495 | |
| 496 | TEST_F(AssemblerMIPS32r6Test, LoadDFromOffset) { |
| 497 | __ LoadDFromOffset(mips::F0, mips::A0, -0x8000); |
| 498 | __ LoadDFromOffset(mips::F0, mips::A0, +0); |
| 499 | __ LoadDFromOffset(mips::F0, mips::A0, +0x7FF8); |
| 500 | __ LoadDFromOffset(mips::F0, mips::A0, +0x7FFB); |
| 501 | __ LoadDFromOffset(mips::F0, mips::A0, +0x7FFC); |
| 502 | __ LoadDFromOffset(mips::F0, mips::A0, +0x7FFF); |
| 503 | __ LoadDFromOffset(mips::F0, mips::A0, -0xFFF0); |
| 504 | __ LoadDFromOffset(mips::F0, mips::A0, -0x8008); |
| 505 | __ LoadDFromOffset(mips::F0, mips::A0, -0x8001); |
| 506 | __ LoadDFromOffset(mips::F0, mips::A0, +0x8000); |
| 507 | __ LoadDFromOffset(mips::F0, mips::A0, +0xFFF0); |
| 508 | __ LoadDFromOffset(mips::F0, mips::A0, -0x17FE8); |
| 509 | __ LoadDFromOffset(mips::F0, mips::A0, -0x0FFF8); |
| 510 | __ LoadDFromOffset(mips::F0, mips::A0, -0x0FFF1); |
| 511 | __ LoadDFromOffset(mips::F0, mips::A0, +0x0FFF1); |
| 512 | __ LoadDFromOffset(mips::F0, mips::A0, +0x0FFF8); |
| 513 | __ LoadDFromOffset(mips::F0, mips::A0, +0x17FE8); |
| 514 | __ LoadDFromOffset(mips::F0, mips::A0, -0x17FF0); |
| 515 | __ LoadDFromOffset(mips::F0, mips::A0, -0x17FE9); |
| 516 | __ LoadDFromOffset(mips::F0, mips::A0, +0x17FE9); |
| 517 | __ LoadDFromOffset(mips::F0, mips::A0, +0x17FF0); |
| 518 | __ LoadDFromOffset(mips::F0, mips::A0, +0x12345678); |
| 519 | |
| 520 | const char* expected = |
| 521 | "ldc1 $f0, -0x8000($a0)\n" |
| 522 | "ldc1 $f0, 0($a0)\n" |
| 523 | "ldc1 $f0, 0x7FF8($a0)\n" |
| 524 | "lwc1 $f0, 0x7FFB($a0)\n" |
| 525 | "lw $t8, 0x7FFF($a0)\n" |
| 526 | "mthc1 $t8, $f0\n" |
| 527 | "addiu $at, $a0, 0x7FF8\n" |
| 528 | "lwc1 $f0, 4($at)\n" |
| 529 | "lw $t8, 8($at)\n" |
| 530 | "mthc1 $t8, $f0\n" |
| 531 | "addiu $at, $a0, 0x7FF8\n" |
| 532 | "lwc1 $f0, 7($at)\n" |
| 533 | "lw $t8, 11($at)\n" |
| 534 | "mthc1 $t8, $f0\n" |
| 535 | "addiu $at, $a0, -0x7FF8\n" |
| 536 | "ldc1 $f0, -0x7FF8($at)\n" |
| 537 | "addiu $at, $a0, -0x7FF8\n" |
| 538 | "ldc1 $f0, -0x10($at)\n" |
| 539 | "addiu $at, $a0, -0x7FF8\n" |
| 540 | "lwc1 $f0, -9($at)\n" |
| 541 | "lw $t8, -5($at)\n" |
| 542 | "mthc1 $t8, $f0\n" |
| 543 | "addiu $at, $a0, 0x7FF8\n" |
| 544 | "ldc1 $f0, 8($at)\n" |
| 545 | "addiu $at, $a0, 0x7FF8\n" |
| 546 | "ldc1 $f0, 0x7FF8($at)\n" |
| 547 | "aui $at, $a0, 0xFFFF\n" |
| 548 | "ldc1 $f0, -0x7FE8($at)\n" |
| 549 | "aui $at, $a0, 0xFFFF\n" |
| 550 | "ldc1 $f0, 0x8($at)\n" |
| 551 | "aui $at, $a0, 0xFFFF\n" |
| 552 | "lwc1 $f0, 0xF($at)\n" |
| 553 | "lw $t8, 0x13($at)\n" |
| 554 | "mthc1 $t8, $f0\n" |
| 555 | "aui $at, $a0, 0x1\n" |
| 556 | "lwc1 $f0, -0xF($at)\n" |
| 557 | "lw $t8, -0xB($at)\n" |
| 558 | "mthc1 $t8, $f0\n" |
| 559 | "aui $at, $a0, 0x1\n" |
| 560 | "ldc1 $f0, -0x8($at)\n" |
| 561 | "aui $at, $a0, 0x1\n" |
| 562 | "ldc1 $f0, 0x7FE8($at)\n" |
| 563 | "aui $at, $a0, 0xFFFF\n" |
| 564 | "ldc1 $f0, -0x7FF0($at)\n" |
| 565 | "aui $at, $a0, 0xFFFF\n" |
| 566 | "lwc1 $f0, -0x7FE9($at)\n" |
| 567 | "lw $t8, -0x7FE5($at)\n" |
| 568 | "mthc1 $t8, $f0\n" |
| 569 | "aui $at, $a0, 0x1\n" |
| 570 | "lwc1 $f0, 0x7FE9($at)\n" |
| 571 | "lw $t8, 0x7FED($at)\n" |
| 572 | "mthc1 $t8, $f0\n" |
| 573 | "aui $at, $a0, 0x1\n" |
| 574 | "ldc1 $f0, 0x7FF0($at)\n" |
| 575 | "aui $at, $a0, 0x1234\n" |
| 576 | "ldc1 $f0, 0x5678($at)\n"; |
| 577 | DriverStr(expected, "LoadDFromOffset"); |
| 578 | } |
| 579 | |
| 580 | TEST_F(AssemblerMIPS32r6Test, StoreDToOffset) { |
| 581 | __ StoreDToOffset(mips::F0, mips::A0, -0x8000); |
| 582 | __ StoreDToOffset(mips::F0, mips::A0, +0); |
| 583 | __ StoreDToOffset(mips::F0, mips::A0, +0x7FF8); |
| 584 | __ StoreDToOffset(mips::F0, mips::A0, +0x7FFB); |
| 585 | __ StoreDToOffset(mips::F0, mips::A0, +0x7FFC); |
| 586 | __ StoreDToOffset(mips::F0, mips::A0, +0x7FFF); |
| 587 | __ StoreDToOffset(mips::F0, mips::A0, -0xFFF0); |
| 588 | __ StoreDToOffset(mips::F0, mips::A0, -0x8008); |
| 589 | __ StoreDToOffset(mips::F0, mips::A0, -0x8001); |
| 590 | __ StoreDToOffset(mips::F0, mips::A0, +0x8000); |
| 591 | __ StoreDToOffset(mips::F0, mips::A0, +0xFFF0); |
| 592 | __ StoreDToOffset(mips::F0, mips::A0, -0x17FE8); |
| 593 | __ StoreDToOffset(mips::F0, mips::A0, -0x0FFF8); |
| 594 | __ StoreDToOffset(mips::F0, mips::A0, -0x0FFF1); |
| 595 | __ StoreDToOffset(mips::F0, mips::A0, +0x0FFF1); |
| 596 | __ StoreDToOffset(mips::F0, mips::A0, +0x0FFF8); |
| 597 | __ StoreDToOffset(mips::F0, mips::A0, +0x17FE8); |
| 598 | __ StoreDToOffset(mips::F0, mips::A0, -0x17FF0); |
| 599 | __ StoreDToOffset(mips::F0, mips::A0, -0x17FE9); |
| 600 | __ StoreDToOffset(mips::F0, mips::A0, +0x17FE9); |
| 601 | __ StoreDToOffset(mips::F0, mips::A0, +0x17FF0); |
| 602 | __ StoreDToOffset(mips::F0, mips::A0, +0x12345678); |
| 603 | |
| 604 | const char* expected = |
| 605 | "sdc1 $f0, -0x8000($a0)\n" |
| 606 | "sdc1 $f0, 0($a0)\n" |
| 607 | "sdc1 $f0, 0x7FF8($a0)\n" |
| 608 | "mfhc1 $t8, $f0\n" |
| 609 | "swc1 $f0, 0x7FFB($a0)\n" |
| 610 | "sw $t8, 0x7FFF($a0)\n" |
| 611 | "addiu $at, $a0, 0x7FF8\n" |
| 612 | "mfhc1 $t8, $f0\n" |
| 613 | "swc1 $f0, 4($at)\n" |
| 614 | "sw $t8, 8($at)\n" |
| 615 | "addiu $at, $a0, 0x7FF8\n" |
| 616 | "mfhc1 $t8, $f0\n" |
| 617 | "swc1 $f0, 7($at)\n" |
| 618 | "sw $t8, 11($at)\n" |
| 619 | "addiu $at, $a0, -0x7FF8\n" |
| 620 | "sdc1 $f0, -0x7FF8($at)\n" |
| 621 | "addiu $at, $a0, -0x7FF8\n" |
| 622 | "sdc1 $f0, -0x10($at)\n" |
| 623 | "addiu $at, $a0, -0x7FF8\n" |
| 624 | "mfhc1 $t8, $f0\n" |
| 625 | "swc1 $f0, -9($at)\n" |
| 626 | "sw $t8, -5($at)\n" |
| 627 | "addiu $at, $a0, 0x7FF8\n" |
| 628 | "sdc1 $f0, 8($at)\n" |
| 629 | "addiu $at, $a0, 0x7FF8\n" |
| 630 | "sdc1 $f0, 0x7FF8($at)\n" |
| 631 | "aui $at, $a0, 0xFFFF\n" |
| 632 | "sdc1 $f0, -0x7FE8($at)\n" |
| 633 | "aui $at, $a0, 0xFFFF\n" |
| 634 | "sdc1 $f0, 0x8($at)\n" |
| 635 | "aui $at, $a0, 0xFFFF\n" |
| 636 | "mfhc1 $t8, $f0\n" |
| 637 | "swc1 $f0, 0xF($at)\n" |
| 638 | "sw $t8, 0x13($at)\n" |
| 639 | "aui $at, $a0, 0x1\n" |
| 640 | "mfhc1 $t8, $f0\n" |
| 641 | "swc1 $f0, -0xF($at)\n" |
| 642 | "sw $t8, -0xB($at)\n" |
| 643 | "aui $at, $a0, 0x1\n" |
| 644 | "sdc1 $f0, -0x8($at)\n" |
| 645 | "aui $at, $a0, 0x1\n" |
| 646 | "sdc1 $f0, 0x7FE8($at)\n" |
| 647 | "aui $at, $a0, 0xFFFF\n" |
| 648 | "sdc1 $f0, -0x7FF0($at)\n" |
| 649 | "aui $at, $a0, 0xFFFF\n" |
| 650 | "mfhc1 $t8, $f0\n" |
| 651 | "swc1 $f0, -0x7FE9($at)\n" |
| 652 | "sw $t8, -0x7FE5($at)\n" |
| 653 | "aui $at, $a0, 0x1\n" |
| 654 | "mfhc1 $t8, $f0\n" |
| 655 | "swc1 $f0, 0x7FE9($at)\n" |
| 656 | "sw $t8, 0x7FED($at)\n" |
| 657 | "aui $at, $a0, 0x1\n" |
| 658 | "sdc1 $f0, 0x7FF0($at)\n" |
| 659 | "aui $at, $a0, 0x1234\n" |
| 660 | "sdc1 $f0, 0x5678($at)\n"; |
| 661 | DriverStr(expected, "StoreDToOffset"); |
| 662 | } |
| 663 | |
Alexey Frunze | 96b6682 | 2016-09-10 02:32:44 -0700 | [diff] [blame] | 664 | TEST_F(AssemblerMIPS32r6Test, LoadFarthestNearLabelAddress) { |
| 665 | mips::MipsLabel label; |
| 666 | __ LoadLabelAddress(mips::V0, mips::ZERO, &label); |
| 667 | constexpr size_t kAdduCount = 0x3FFDE; |
| 668 | for (size_t i = 0; i != kAdduCount; ++i) { |
| 669 | __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); |
| 670 | } |
| 671 | __ Bind(&label); |
| 672 | |
| 673 | std::string expected = |
| 674 | "lapc $v0, 1f\n" + |
| 675 | RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + |
| 676 | "1:\n"; |
| 677 | DriverStr(expected, "LoadFarthestNearLabelAddress"); |
| 678 | } |
| 679 | |
| 680 | TEST_F(AssemblerMIPS32r6Test, LoadNearestFarLabelAddress) { |
| 681 | mips::MipsLabel label; |
| 682 | __ LoadLabelAddress(mips::V0, mips::ZERO, &label); |
| 683 | constexpr size_t kAdduCount = 0x3FFDF; |
| 684 | for (size_t i = 0; i != kAdduCount; ++i) { |
| 685 | __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); |
| 686 | } |
| 687 | __ Bind(&label); |
| 688 | |
| 689 | std::string expected = |
| 690 | "1:\n" |
| 691 | "auipc $at, %hi(2f - 1b)\n" |
| 692 | "addiu $v0, $at, %lo(2f - 1b)\n" + |
| 693 | RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + |
| 694 | "2:\n"; |
| 695 | DriverStr(expected, "LoadNearestFarLabelAddress"); |
| 696 | } |
| 697 | |
Alexey Frunze | e3fb245 | 2016-05-10 16:08:05 -0700 | [diff] [blame] | 698 | TEST_F(AssemblerMIPS32r6Test, LoadFarthestNearLiteral) { |
| 699 | mips::Literal* literal = __ NewLiteral<uint32_t>(0x12345678); |
| 700 | __ LoadLiteral(mips::V0, mips::ZERO, literal); |
| 701 | constexpr size_t kAdduCount = 0x3FFDE; |
| 702 | for (size_t i = 0; i != kAdduCount; ++i) { |
| 703 | __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); |
| 704 | } |
| 705 | |
| 706 | std::string expected = |
| 707 | "lwpc $v0, 1f\n" + |
| 708 | RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + |
| 709 | "1:\n" |
| 710 | ".word 0x12345678\n"; |
| 711 | DriverStr(expected, "LoadFarthestNearLiteral"); |
| 712 | } |
| 713 | |
| 714 | TEST_F(AssemblerMIPS32r6Test, LoadNearestFarLiteral) { |
| 715 | mips::Literal* literal = __ NewLiteral<uint32_t>(0x12345678); |
| 716 | __ LoadLiteral(mips::V0, mips::ZERO, literal); |
| 717 | constexpr size_t kAdduCount = 0x3FFDF; |
| 718 | for (size_t i = 0; i != kAdduCount; ++i) { |
| 719 | __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); |
| 720 | } |
| 721 | |
| 722 | std::string expected = |
| 723 | "1:\n" |
| 724 | "auipc $at, %hi(2f - 1b)\n" |
| 725 | "lw $v0, %lo(2f - 1b)($at)\n" + |
| 726 | RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") + |
| 727 | "2:\n" |
| 728 | ".word 0x12345678\n"; |
| 729 | DriverStr(expected, "LoadNearestFarLiteral"); |
| 730 | } |
| 731 | |
Chris Larsen | 3add9cb | 2016-04-14 14:01:33 -0700 | [diff] [blame] | 732 | ////////////// |
| 733 | // BRANCHES // |
| 734 | ////////////// |
| 735 | |
Alexey Frunze | 57eb0f5 | 2016-07-29 22:04:46 -0700 | [diff] [blame] | 736 | TEST_F(AssemblerMIPS32r6Test, ImpossibleReordering) { |
| 737 | mips::MipsLabel label; |
| 738 | __ SetReorder(true); |
| 739 | __ Bind(&label); |
| 740 | |
| 741 | __ CmpLtD(mips::F0, mips::F2, mips::F4); |
| 742 | __ Bc1nez(mips::F0, &label); // F0 dependency. |
| 743 | |
| 744 | __ MulD(mips::F10, mips::F2, mips::F4); |
| 745 | __ Bc1eqz(mips::F10, &label); // F10 dependency. |
| 746 | |
| 747 | std::string expected = |
| 748 | ".set noreorder\n" |
| 749 | "1:\n" |
| 750 | |
| 751 | "cmp.lt.d $f0, $f2, $f4\n" |
| 752 | "bc1nez $f0, 1b\n" |
| 753 | "nop\n" |
| 754 | |
| 755 | "mul.d $f10, $f2, $f4\n" |
| 756 | "bc1eqz $f10, 1b\n" |
| 757 | "nop\n"; |
| 758 | DriverStr(expected, "ImpossibleReordering"); |
| 759 | } |
| 760 | |
| 761 | TEST_F(AssemblerMIPS32r6Test, Reordering) { |
| 762 | mips::MipsLabel label; |
| 763 | __ SetReorder(true); |
| 764 | __ Bind(&label); |
| 765 | |
| 766 | __ CmpLtD(mips::F0, mips::F2, mips::F4); |
| 767 | __ Bc1nez(mips::F2, &label); |
| 768 | |
| 769 | __ MulD(mips::F0, mips::F2, mips::F4); |
| 770 | __ Bc1eqz(mips::F4, &label); |
| 771 | |
| 772 | std::string expected = |
| 773 | ".set noreorder\n" |
| 774 | "1:\n" |
| 775 | |
| 776 | "bc1nez $f2, 1b\n" |
| 777 | "cmp.lt.d $f0, $f2, $f4\n" |
| 778 | |
| 779 | "bc1eqz $f4, 1b\n" |
| 780 | "mul.d $f0, $f2, $f4\n"; |
| 781 | DriverStr(expected, "Reordering"); |
| 782 | } |
| 783 | |
| 784 | TEST_F(AssemblerMIPS32r6Test, SetReorder) { |
| 785 | mips::MipsLabel label1, label2, label3, label4; |
| 786 | |
| 787 | __ SetReorder(true); |
| 788 | __ Bind(&label1); |
| 789 | __ Addu(mips::T0, mips::T1, mips::T2); |
| 790 | __ Bc1nez(mips::F0, &label1); |
| 791 | |
| 792 | __ SetReorder(false); |
| 793 | __ Bind(&label2); |
| 794 | __ Addu(mips::T0, mips::T1, mips::T2); |
| 795 | __ Bc1nez(mips::F0, &label2); |
| 796 | |
| 797 | __ SetReorder(true); |
| 798 | __ Bind(&label3); |
| 799 | __ Addu(mips::T0, mips::T1, mips::T2); |
| 800 | __ Bc1eqz(mips::F0, &label3); |
| 801 | |
| 802 | __ SetReorder(false); |
| 803 | __ Bind(&label4); |
| 804 | __ Addu(mips::T0, mips::T1, mips::T2); |
| 805 | __ Bc1eqz(mips::F0, &label4); |
| 806 | |
| 807 | std::string expected = |
| 808 | ".set noreorder\n" |
| 809 | "1:\n" |
| 810 | "bc1nez $f0, 1b\n" |
| 811 | "addu $t0, $t1, $t2\n" |
| 812 | |
| 813 | "2:\n" |
| 814 | "addu $t0, $t1, $t2\n" |
| 815 | "bc1nez $f0, 2b\n" |
| 816 | "nop\n" |
| 817 | |
| 818 | "3:\n" |
| 819 | "bc1eqz $f0, 3b\n" |
| 820 | "addu $t0, $t1, $t2\n" |
| 821 | |
| 822 | "4:\n" |
| 823 | "addu $t0, $t1, $t2\n" |
| 824 | "bc1eqz $f0, 4b\n" |
| 825 | "nop\n"; |
| 826 | DriverStr(expected, "SetReorder"); |
| 827 | } |
| 828 | |
| 829 | TEST_F(AssemblerMIPS32r6Test, LongBranchReorder) { |
| 830 | mips::MipsLabel label; |
| 831 | __ SetReorder(true); |
| 832 | __ Subu(mips::T0, mips::T1, mips::T2); |
| 833 | __ Bc1nez(mips::F0, &label); |
| 834 | constexpr uint32_t kAdduCount1 = (1u << 15) + 1; |
| 835 | for (uint32_t i = 0; i != kAdduCount1; ++i) { |
| 836 | __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); |
| 837 | } |
| 838 | __ Bind(&label); |
| 839 | constexpr uint32_t kAdduCount2 = (1u << 15) + 1; |
| 840 | for (uint32_t i = 0; i != kAdduCount2; ++i) { |
| 841 | __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); |
| 842 | } |
| 843 | __ Subu(mips::T0, mips::T1, mips::T2); |
| 844 | __ Bc1eqz(mips::F0, &label); |
| 845 | |
| 846 | uint32_t offset_forward = 2 + kAdduCount1; // 2: account for auipc and jic. |
| 847 | offset_forward <<= 2; |
| 848 | offset_forward += (offset_forward & 0x8000) << 1; // Account for sign extension in jic. |
| 849 | |
| 850 | uint32_t offset_back = -(kAdduCount2 + 2); // 2: account for subu and bc1nez. |
| 851 | offset_back <<= 2; |
| 852 | offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jic. |
| 853 | |
| 854 | std::ostringstream oss; |
| 855 | oss << |
| 856 | ".set noreorder\n" |
| 857 | "subu $t0, $t1, $t2\n" |
| 858 | "bc1eqz $f0, 1f\n" |
| 859 | "auipc $at, 0x" << std::hex << High16Bits(offset_forward) << "\n" |
| 860 | "jic $at, 0x" << std::hex << Low16Bits(offset_forward) << "\n" |
| 861 | "1:\n" << |
| 862 | RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") << |
| 863 | "2:\n" << |
| 864 | RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") << |
| 865 | "subu $t0, $t1, $t2\n" |
| 866 | "bc1nez $f0, 3f\n" |
| 867 | "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n" |
| 868 | "jic $at, 0x" << std::hex << Low16Bits(offset_back) << "\n" |
| 869 | "3:\n"; |
| 870 | std::string expected = oss.str(); |
| 871 | DriverStr(expected, "LongBeqc"); |
| 872 | } |
| 873 | |
Alexey Frunze | 96b6682 | 2016-09-10 02:32:44 -0700 | [diff] [blame] | 874 | // TODO: MipsAssembler::Bc |
Chris Larsen | 3add9cb | 2016-04-14 14:01:33 -0700 | [diff] [blame] | 875 | // MipsAssembler::Jic |
| 876 | // MipsAssembler::Jialc |
| 877 | // MipsAssembler::Bltc |
| 878 | // MipsAssembler::Bltzc |
| 879 | // MipsAssembler::Bgtzc |
| 880 | // MipsAssembler::Bgec |
| 881 | // MipsAssembler::Bgezc |
| 882 | // MipsAssembler::Blezc |
| 883 | // MipsAssembler::Bltuc |
| 884 | // MipsAssembler::Bgeuc |
| 885 | // MipsAssembler::Beqc |
| 886 | // MipsAssembler::Bnec |
| 887 | // MipsAssembler::Beqzc |
| 888 | // MipsAssembler::Bnezc |
| 889 | // MipsAssembler::Bc1eqz |
| 890 | // MipsAssembler::Bc1nez |
| 891 | // MipsAssembler::Buncond |
| 892 | // MipsAssembler::Bcond |
| 893 | // MipsAssembler::Call |
| 894 | |
| 895 | // TODO: AssemblerMIPS32r6Test.B |
| 896 | // AssemblerMIPS32r6Test.Beq |
| 897 | // AssemblerMIPS32r6Test.Bne |
| 898 | // AssemblerMIPS32r6Test.Beqz |
| 899 | // AssemblerMIPS32r6Test.Bnez |
| 900 | // AssemblerMIPS32r6Test.Bltz |
| 901 | // AssemblerMIPS32r6Test.Bgez |
| 902 | // AssemblerMIPS32r6Test.Blez |
| 903 | // AssemblerMIPS32r6Test.Bgtz |
| 904 | // AssemblerMIPS32r6Test.Blt |
| 905 | // AssemblerMIPS32r6Test.Bge |
| 906 | // AssemblerMIPS32r6Test.Bltu |
| 907 | // AssemblerMIPS32r6Test.Bgeu |
| 908 | |
| 909 | #undef __ |
| 910 | |
| 911 | } // namespace art |