Alexandre Rames | 22aa54b | 2016-10-18 09:32:29 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2016 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_COMPILER_OPTIMIZING_SCHEDULER_ARM64_H_ |
| 18 | #define ART_COMPILER_OPTIMIZING_SCHEDULER_ARM64_H_ |
| 19 | |
| 20 | #include "scheduler.h" |
| 21 | |
| 22 | namespace art { |
| 23 | namespace arm64 { |
| 24 | |
| 25 | static constexpr uint32_t kArm64MemoryLoadLatency = 5; |
| 26 | static constexpr uint32_t kArm64MemoryStoreLatency = 3; |
| 27 | |
| 28 | static constexpr uint32_t kArm64CallInternalLatency = 10; |
| 29 | static constexpr uint32_t kArm64CallLatency = 5; |
| 30 | |
| 31 | // AArch64 instruction latency. |
| 32 | // We currently assume that all arm64 CPUs share the same instruction latency list. |
| 33 | static constexpr uint32_t kArm64IntegerOpLatency = 2; |
| 34 | static constexpr uint32_t kArm64FloatingPointOpLatency = 5; |
| 35 | |
| 36 | |
| 37 | static constexpr uint32_t kArm64DataProcWithShifterOpLatency = 3; |
| 38 | static constexpr uint32_t kArm64DivDoubleLatency = 30; |
| 39 | static constexpr uint32_t kArm64DivFloatLatency = 15; |
| 40 | static constexpr uint32_t kArm64DivIntegerLatency = 5; |
| 41 | static constexpr uint32_t kArm64LoadStringInternalLatency = 7; |
| 42 | static constexpr uint32_t kArm64MulFloatingPointLatency = 6; |
| 43 | static constexpr uint32_t kArm64MulIntegerLatency = 6; |
| 44 | static constexpr uint32_t kArm64TypeConversionFloatingPointIntegerLatency = 5; |
| 45 | |
| 46 | class SchedulingLatencyVisitorARM64 : public SchedulingLatencyVisitor { |
| 47 | public: |
| 48 | // Default visitor for instructions not handled specifically below. |
| 49 | void VisitInstruction(HInstruction* ATTRIBUTE_UNUSED) { |
| 50 | last_visited_latency_ = kArm64IntegerOpLatency; |
| 51 | } |
| 52 | |
| 53 | // We add a second unused parameter to be able to use this macro like the others |
| 54 | // defined in `nodes.h`. |
| 55 | #define FOR_EACH_SCHEDULED_COMMON_INSTRUCTION(M) \ |
| 56 | M(ArrayGet , unused) \ |
| 57 | M(ArrayLength , unused) \ |
| 58 | M(ArraySet , unused) \ |
| 59 | M(BinaryOperation , unused) \ |
| 60 | M(BoundsCheck , unused) \ |
| 61 | M(Div , unused) \ |
| 62 | M(InstanceFieldGet , unused) \ |
| 63 | M(InstanceOf , unused) \ |
| 64 | M(Invoke , unused) \ |
| 65 | M(LoadString , unused) \ |
| 66 | M(Mul , unused) \ |
| 67 | M(NewArray , unused) \ |
| 68 | M(NewInstance , unused) \ |
| 69 | M(Rem , unused) \ |
| 70 | M(StaticFieldGet , unused) \ |
| 71 | M(SuspendCheck , unused) \ |
| 72 | M(TypeConversion , unused) |
| 73 | |
| 74 | #define FOR_EACH_SCHEDULED_SHARED_INSTRUCTION(M) \ |
| 75 | M(BitwiseNegatedRight, unused) \ |
| 76 | M(MultiplyAccumulate, unused) \ |
Anton Kirilov | 74234da | 2017-01-13 14:42:47 +0000 | [diff] [blame^] | 77 | M(IntermediateAddress, unused) \ |
| 78 | M(DataProcWithShifterOp, unused) |
Alexandre Rames | 22aa54b | 2016-10-18 09:32:29 +0100 | [diff] [blame] | 79 | |
| 80 | #define DECLARE_VISIT_INSTRUCTION(type, unused) \ |
| 81 | void Visit##type(H##type* instruction) OVERRIDE; |
| 82 | |
| 83 | FOR_EACH_SCHEDULED_COMMON_INSTRUCTION(DECLARE_VISIT_INSTRUCTION) |
| 84 | FOR_EACH_SCHEDULED_SHARED_INSTRUCTION(DECLARE_VISIT_INSTRUCTION) |
| 85 | FOR_EACH_CONCRETE_INSTRUCTION_ARM64(DECLARE_VISIT_INSTRUCTION) |
| 86 | |
| 87 | #undef DECLARE_VISIT_INSTRUCTION |
| 88 | }; |
| 89 | |
| 90 | class HSchedulerARM64 : public HScheduler { |
| 91 | public: |
| 92 | HSchedulerARM64(ArenaAllocator* arena, SchedulingNodeSelector* selector) |
| 93 | : HScheduler(arena, &arm64_latency_visitor_, selector) {} |
| 94 | ~HSchedulerARM64() OVERRIDE {} |
| 95 | |
| 96 | bool IsSchedulable(const HInstruction* instruction) const OVERRIDE { |
| 97 | #define CASE_INSTRUCTION_KIND(type, unused) case \ |
| 98 | HInstruction::InstructionKind::k##type: |
| 99 | switch (instruction->GetKind()) { |
| 100 | FOR_EACH_SCHEDULED_SHARED_INSTRUCTION(CASE_INSTRUCTION_KIND) |
| 101 | return true; |
| 102 | FOR_EACH_CONCRETE_INSTRUCTION_ARM64(CASE_INSTRUCTION_KIND) |
| 103 | return true; |
| 104 | default: |
| 105 | return HScheduler::IsSchedulable(instruction); |
| 106 | } |
| 107 | #undef CASE_INSTRUCTION_KIND |
| 108 | } |
| 109 | |
| 110 | private: |
| 111 | SchedulingLatencyVisitorARM64 arm64_latency_visitor_; |
| 112 | DISALLOW_COPY_AND_ASSIGN(HSchedulerARM64); |
| 113 | }; |
| 114 | |
| 115 | } // namespace arm64 |
| 116 | } // namespace art |
| 117 | |
| 118 | #endif // ART_COMPILER_OPTIMIZING_SCHEDULER_ARM64_H_ |