lgao4 | 7b202cb | 2010-02-23 23:58:38 +0000 | [diff] [blame] | 1 | ## @file
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 2 | # Public definitions for PcAtChipset package.
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| 3 | #
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| 4 | # This package is designed to public interfaces and implementation which follows
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| 5 | # PcAt defacto standard.
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| 6 | #
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Elvin Li | 1e5fff6 | 2015-01-23 04:49:00 +0000 | [diff] [blame] | 7 | # Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 8 | #
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hhtian | 95d48e8 | 2010-04-24 12:07:51 +0000 | [diff] [blame] | 9 | # This program and the accompanying materials
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 10 | # are licensed and made available under the terms and conditions of the BSD License
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| 11 | # which accompanies this distribution. The full text of the license may be found at
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| 12 | # http://opensource.org/licenses/bsd-license.php
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| 13 | #
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| 14 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| 15 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 16 | #
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lgao4 | 7b202cb | 2010-02-23 23:58:38 +0000 | [diff] [blame] | 17 | ##
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 18 |
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| 19 | [Defines]
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| 20 | DEC_SPECIFICATION = 0x00010005
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| 21 | PACKAGE_NAME = PcAtChipsetPkg
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 22 | PACKAGE_UNI_FILE = PcAtChipsetPkg.uni
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 23 | PACKAGE_GUID = B728689A-52D3-4b8c-AE89-2CE5514CC6DC
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Ruiyu Ni | 9325f68 | 2014-01-10 07:29:32 +0000 | [diff] [blame] | 24 | PACKAGE_VERSION = 0.3
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 25 |
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mdkinney | 986d1df | 2011-09-02 02:43:51 +0000 | [diff] [blame] | 26 | [Includes]
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| 27 | Include
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| 28 |
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| 29 | [LibraryClasses]
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| 30 | ## @libraryclass Provides functions to manage I/O APIC Redirection Table Entries.
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| 31 | #
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| 32 | IoApicLib|Include/Library/IoApicLib.h
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| 33 |
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mdkinney | 53705ed | 2011-05-09 17:51:00 +0000 | [diff] [blame] | 34 | [Guids]
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| 35 | gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }
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| 36 |
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Ruiyu Ni | f5f4747 | 2015-06-12 01:43:46 +0000 | [diff] [blame] | 37 | #
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| 38 | # [Error.gPcAtChipsetPkgTokenSpaceGuid]
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| 39 | # 0x80000001 | Invalid value provided.
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| 40 | #
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| 41 |
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mdkinney | 986d1df | 2011-09-02 02:43:51 +0000 | [diff] [blame] | 42 | [PcdsFeatureFlag]
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 43 | ## Indicates the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them, or use I/O APIC interrupts.<BR><BR>
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| 44 | # TRUE - Configures the HPET Timer to use MSI interrupts if the HPET Timer supports them.<BR>
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| 45 | # FALSE - Configures the HPET Timer to use I/O APIC interrupts.<BR>
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| 46 | # @Prompt Configure HPET to use MSI.
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mdkinney | 986d1df | 2011-09-02 02:43:51 +0000 | [diff] [blame] | 47 | gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 48 |
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mdkinney | 856f592 | 2011-05-04 20:56:30 +0000 | [diff] [blame] | 49 | [PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 50 | ## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined<BR><BR>
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 51 | # 1) If platform only support pure UEFI, value should be set to 0xFFFF or 0xFFFE;
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 52 | # Because only clock interrupt is allowed in legacy mode in pure UEFI platform.<BR>
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| 53 | # 2) If platform install CSM and use thunk module:<BR>
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 54 | # a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 55 | # should be opened as 0.<BR>
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| 56 | # For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 1, then
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| 57 | # the value should be set to 0xFFFC.<BR>
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 58 | # b) If all thunk call provied by CSM binary do not require legacy interrupt support, value should be set
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 59 | # to 0xFFFF or 0xFFFE.<BR>
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 60 | #
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klu2 | 31ed75a | 2009-07-06 02:59:37 +0000 | [diff] [blame] | 61 | # The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely
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| 62 | # need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 63 | # mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.<BR>
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| 64 | # @Prompt 8259 Legacy Mode mask.
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lgao4 | 1f44ee1 | 2010-04-02 05:22:40 +0000 | [diff] [blame] | 65 | gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001
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klu2 | e356f99 | 2009-07-06 07:40:18 +0000 | [diff] [blame] | 66 |
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| 67 | ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 68 | # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
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| 69 | # @Prompt 8259 Legacy Mode edge level.
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lgao4 | 1f44ee1 | 2010-04-02 05:22:40 +0000 | [diff] [blame] | 70 | gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x00000002
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niruiyu | e8bce4b | 2011-03-10 07:33:42 +0000 | [diff] [blame] | 71 |
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 72 | ## Indicates if we need enable IsaAcpiCom1 device.<BR><BR>
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| 73 | # TRUE - Enables IsaAcpiCom1 device.<BR>
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| 74 | # FALSE - Doesn't enable IsaAcpiCom1 device.<BR>
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| 75 | # @Prompt Enable IsaAcpiCom1 device.
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niruiyu | e8bce4b | 2011-03-10 07:33:42 +0000 | [diff] [blame] | 76 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom1Enable|TRUE|BOOLEAN|0x00000003
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| 77 |
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 78 | ## Indicates if we need enable IsaAcpiCom2 device.<BR><BR>
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| 79 | # TRUE - Enables IsaAcpiCom2 device.<BR>
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| 80 | # FALSE - Doesn't enable IsaAcpiCom2 device.<BR>
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| 81 | # @Prompt Enable IsaAcpiCom12 device.
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niruiyu | e8bce4b | 2011-03-10 07:33:42 +0000 | [diff] [blame] | 82 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom2Enable|TRUE|BOOLEAN|0x00000004
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| 83 |
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 84 | ## Indicates if we need enable IsaAcpiPs2Keyboard device.<BR><BR>
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| 85 | # TRUE - Enables IsaAcpiPs2Keyboard device.<BR>
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| 86 | # FALSE - Doesn't enable IsaAcpiPs2Keyboard device.<BR>
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| 87 | # @Prompt Enable IsaAcpiPs2Keyboard device.
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niruiyu | e8bce4b | 2011-03-10 07:33:42 +0000 | [diff] [blame] | 88 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2KeyboardEnable|TRUE|BOOLEAN|0x00000005
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| 89 |
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 90 | ## Indicates if we need enable IsaAcpiPs2Mouse device.<BR><BR>
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| 91 | # TRUE - Enables IsaAcpiPs2Mouse device.<BR>
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| 92 | # FALSE - Doesn't enable IsaAcpiPs2Mouse device.<BR>
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| 93 | # @Prompt Enable IsaAcpiPs2Mouse device.
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niruiyu | e8bce4b | 2011-03-10 07:33:42 +0000 | [diff] [blame] | 94 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2MouseEnable|TRUE|BOOLEAN|0x00000006
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| 95 |
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 96 | ## Indicates if we need enable IsaAcpiFloppyA device.<BR><BR>
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| 97 | # TRUE - Enables IsaAcpiFloppyA device.<BR>
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| 98 | # FALSE - Doesn't enable IsaAcpiFloppyA device.<BR>
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| 99 | # @Prompt Enable IsaAcpiFloppyA device.
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niruiyu | e8bce4b | 2011-03-10 07:33:42 +0000 | [diff] [blame] | 100 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyAEnable|TRUE|BOOLEAN|0x00000007
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| 101 |
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 102 | ## Indicates if we need enable IsaAcpiFloppyB device.<BR><BR>
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| 103 | # TRUE - Enables IsaAcpiFloppyB device.<BR>
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| 104 | # FALSE - Doesn't enable IsaAcpiFloppyB device.<BR>
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| 105 | # @Prompt Enable IsaAcpiFloppyB device.
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niruiyu | e8bce4b | 2011-03-10 07:33:42 +0000 | [diff] [blame] | 106 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyBEnable|TRUE|BOOLEAN|0x00000008
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mdkinney | 986d1df | 2011-09-02 02:43:51 +0000 | [diff] [blame] | 107 |
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| 108 | ## This PCD specifies the base address of the HPET timer.
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 109 | # @Prompt HPET base address.
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mdkinney | 986d1df | 2011-09-02 02:43:51 +0000 | [diff] [blame] | 110 | gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000|UINT32|0x00000009
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| 111 |
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| 112 | ## This PCD specifies the Local APIC Interrupt Vector for the HPET Timer.
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 113 | # @Prompt HPET local APIC vector.
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mdkinney | 986d1df | 2011-09-02 02:43:51 +0000 | [diff] [blame] | 114 | gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A
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| 115 |
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| 116 | ## This PCD specifies the defaut period of the HPET Timer in 100 ns units.
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| 117 | # The default value of 100000 100 ns units is the same as 10 ms.
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 118 | # @Prompt Default period of HPET timer.
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mdkinney | 986d1df | 2011-09-02 02:43:51 +0000 | [diff] [blame] | 119 | gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B
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| 120 |
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 121 | ## This PCD specifies the base address of the IO APIC.
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| 122 | # @Prompt IO APIC base address.
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mdkinney | 986d1df | 2011-09-02 02:43:51 +0000 | [diff] [blame] | 123 | gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C
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Elvin Li | 1e5fff6 | 2015-01-23 04:49:00 +0000 | [diff] [blame] | 124 |
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| 125 | ## This PCD specifies the minimal valid year in RTC.
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| 126 | # @Prompt Minimal valid year in RTC.
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| 127 | gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear|1998|UINT16|0x0000000D
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| 128 |
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| 129 | ## This PCD specifies the maximal valid year in RTC.
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| 130 | # @Prompt Maximal valid year in RTC.
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Ruiyu Ni | f5f4747 | 2015-06-12 01:43:46 +0000 | [diff] [blame] | 131 | # @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100
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Ruiyu Ni | fe32096 | 2015-06-11 07:14:18 +0000 | [diff] [blame] | 132 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E
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niruiyu | bae5fa3 | 2011-12-13 08:33:18 +0000 | [diff] [blame] | 133 |
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Gao, Liming | 83d1ffb | 2014-08-14 14:30:32 +0000 | [diff] [blame] | 134 | [PcdsFixedAtBuild, PcdsPatchableInModule]
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| 135 | ## Defines the ACPI register set base address.
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| 136 | # The invalid 0xFFFF is as its default value. It must be configured to the real value.
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| 137 | # @Prompt ACPI Timer IO Port Address
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| 138 | gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress |0xFFFF|UINT16|0x00000010
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| 139 |
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| 140 | ## Defines the PCI Bus Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
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| 141 | # @Prompt ACPI Hardware PCI Bus Number
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| 142 | gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00| UINT8|0x00000011
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| 143 |
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| 144 | ## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
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| 145 | # The invalid 0xFF is as its default value. It must be configured to the real value.
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| 146 | # @Prompt ACPI Hardware PCI Device Number
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| 147 | gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0xFF| UINT8|0x00000012
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| 148 |
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| 149 | ## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
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| 150 | # The invalid 0xFF is as its default value. It must be configured to the real value.
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| 151 | # @Prompt ACPI Hardware PCI Function Number
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| 152 | gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0xFF| UINT8|0x00000013
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| 153 |
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| 154 | ## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.
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| 155 | # The invalid 0xFFFF is as its default value. It must be configured to the real value.
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| 156 | # @Prompt ACPI Hardware PCI Register Offset
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| 157 | gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0xFFFF|UINT16|0x00000014
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| 158 |
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| 159 | ## Defines the bit mask that must be set to enable the APIC hardware register BAR.
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| 160 | # @Prompt ACPI Hardware PCI Bar Enable BitMask
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| 161 | gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x00| UINT8|0x00000015
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| 162 |
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| 163 | ## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.
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| 164 | # The invalid 0xFFFF is as its default value. It must be configured to the real value.
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| 165 | # @Prompt ACPI Hardware PCI Bar Register Offset
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| 166 | gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0xFFFF|UINT16|0x00000016
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| 167 |
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| 168 | ## Defines the offset to the 32-bit Timer Value register that resides within the ACPI BAR.
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| 169 | # @Prompt Offset to 32-bit Timer register in ACPI BAR
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| 170 | gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset |0x0008|UINT16|0x00000017
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 171 |
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Liming Gao | 9ff926d | 2015-02-28 05:34:38 +0000 | [diff] [blame] | 172 | ## Defines the bit mask to retrieve ACPI IO Port Base Address
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| 173 | # @Prompt ACPI IO Port Base Address Mask
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| 174 | gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask |0xFFFE|UINT16|0x00000018
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| 175 |
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Qiu, Shumin | b414ac4 | 2014-08-28 05:19:04 +0000 | [diff] [blame] | 176 | [UserExtensions.TianoCore."ExtraFiles"]
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Ruiyu Ni | fe32096 | 2015-06-11 07:14:18 +0000 | [diff] [blame] | 177 | PcAtChipsetPkgExtra.uni
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