| /** @file
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| Debug Agent timer lib for OMAP 35xx.
|
|
|
| Copyright (c) 2008-2010, Apple Inc. All rights reserved.
|
|
|
| All rights reserved. This program and the accompanying materials
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| are licensed and made available under the terms and conditions of the BSD License
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| which accompanies this distribution. The full text of the license may be found at
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| http://opensource.org/licenses/bsd-license.php
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|
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| THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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|
|
| **/
|
| #include <Base.h>
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| #include <Library/BaseLib.h> |
| #include <Library/IoLib.h> |
| #include <Library/OmapLib.h> |
| #include <Library/ArmLib.h>
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| #include <Library/PcdLib.h> |
|
|
| #include <Omap3530/Omap3530.h> |
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|
|
|
| volatile UINT32 gVector;
|
| |
| // Cached registers |
| volatile UINT32 gTISR; |
| volatile UINT32 gTCLR; |
| volatile UINT32 gTLDR; |
| volatile UINT32 gTCRR; |
| volatile UINT32 gTIER; |
|
|
| VOID
|
| EnableInterruptSource (
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| VOID
|
| )
|
| {
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| UINTN Bank;
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| UINTN Bit;
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|
|
| // Map vector to FIQ, IRQ is default
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| MmioWrite32 (INTCPS_ILR (gVector), 1);
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|
|
| Bank = gVector / 32;
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| Bit = 1UL << (gVector % 32);
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|
|
| MmioWrite32 (INTCPS_MIR_CLEAR(Bank), Bit);
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| }
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|
|
| VOID
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| DisableInterruptSource (
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| VOID
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| )
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| {
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| UINTN Bank;
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| UINTN Bit;
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|
|
| Bank = gVector / 32;
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| Bit = 1UL << (gVector % 32);
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|
|
| MmioWrite32 (INTCPS_MIR_SET(Bank), Bit);
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| }
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|
|
|
|
|
|
| /**
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| Setup all the hardware needed for the debug agents timer.
|
|
|
| This function is used to set up debug enviroment. It may enable interrupts.
|
|
|
| **/
|
| VOID
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| EFIAPI
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| DebugAgentTimerIntialize (
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| VOID
|
| )
|
| {
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| UINT32 TimerBaseAddress;
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| UINT32 TimerNumber;
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|
|
| TimerNumber = PcdGet32(PcdOmap35xxDebugAgentTimer);
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| gVector = InterruptVectorForTimer (TimerNumber); |
|
|
| // Set up the timer registers |
| TimerBaseAddress = TimerBase (TimerNumber); |
| gTISR = TimerBaseAddress + GPTIMER_TISR; |
| gTCLR = TimerBaseAddress + GPTIMER_TCLR; |
| gTLDR = TimerBaseAddress + GPTIMER_TLDR; |
| gTCRR = TimerBaseAddress + GPTIMER_TCRR; |
| gTIER = TimerBaseAddress + GPTIMER_TIER; |
|
|
| if ((TimerNumber < 2) || (TimerNumber > 9)) {
|
| // This code assumes one the General Purpose timers is used
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| // GPT2 - GPT9
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| CpuDeadLoop ();
|
| }
|
| // Set source clock for GPT2 - GPT9 to SYS_CLK
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| MmioOr32 (CM_CLKSEL_PER, 1 << (TimerNumber - 2));
|
|
|
| }
|
|
|
|
|
| /**
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| Set the period for the debug agent timer. Zero means disable the timer.
|
|
|
| @param[in] TimerPeriodMilliseconds Frequency of the debug agent timer.
|
|
|
| **/
|
| VOID
|
| EFIAPI
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| DebugAgentTimerSetPeriod (
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| IN UINT32 TimerPeriodMilliseconds
|
| )
|
| {
|
| UINT64 TimerCount; |
| INT32 LoadValue; |
| |
| if (TimerPeriodMilliseconds == 0) { |
| // Turn off GPTIMER3 |
| MmioWrite32 (gTCLR, TCLR_ST_OFF); |
| |
| DisableInterruptSource (); |
| } else { |
| // Calculate required timer count |
| TimerCount = DivU64x32(TimerPeriodMilliseconds * 1000000, PcdGet32(PcdDebugAgentTimerFreqNanoSeconds)); |
| |
| // Set GPTIMER5 Load register |
| LoadValue = (INT32) -TimerCount; |
| MmioWrite32 (gTLDR, LoadValue); |
| MmioWrite32 (gTCRR, LoadValue); |
| |
| // Enable Overflow interrupt |
| MmioWrite32 (gTIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_ENABLE | TIER_MAT_IT_DISABLE); |
| |
| // Turn on GPTIMER3, it will reload at overflow |
| MmioWrite32 (gTCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON); |
| |
| EnableInterruptSource (); |
| } |
| }
|
|
|
|
|
| /**
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| Perform End Of Interrupt for the debug agent timer. This is called in the
|
| interrupt handler after the interrupt has been processed.
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|
|
| **/
|
| VOID
|
| EFIAPI
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| DebugAgentTimerEndOfInterrupt (
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| VOID
|
| )
|
| {
|
| // Clear all timer interrupts |
| MmioWrite32 (gTISR, TISR_CLEAR_ALL); |
| |
| // Poll interrupt status bits to ensure clearing |
| while ((MmioRead32 (gTISR) & TISR_ALL_INTERRUPT_MASK) != TISR_NO_INTERRUPTS_PENDING);
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|
|
| MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWFIQAGR);
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| ArmDataSyncronizationBarrier ();
|
|
|
| }
|
|
|
| |