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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / dce677da57c0edac7a53f1fce58fca180b7ea89b / drivers / clk / hisilicon / crg-hi3798cv200.c
  1. 1ccea77 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13 by Thomas Gleixner · 6 years ago
  2. 80820a7 clk: hisilicon: add missing usb3 clocks for Hi3798CV200 SoC by Jianguo Sun · 7 years ago
  3. d1b0399 clk: hi3798cv200: add emmc sample and drive clock by tianshuliang · 7 years ago
  4. 80f8ce5 clk: hi3798cv200: add COMBPHY0 clock support by Jianguo Sun · 7 years ago
  5. a44d1f5 clk: hi3798cv200: fix define indentation by Shawn Guo · 7 years ago
  6. 50fd588 clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK by Shawn Guo · 7 years ago
  7. 47629f6 clk: hi3798cv200: correct IR clock parent by Younian Wang · 7 years ago
  8. 055d568 clk: hi3798cv200: fix unregister call sequence in error path by Shawn Guo · 7 years ago
  9. 3320f39 clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu' by Shawn Guo · 7 years ago
  10. 0d84659 clk: hisilicon: add usb2 clocks for hi3798cv200 SoC by Jiancheng Xue · 8 years ago
  11. 707d33c clk: hisilicon: add CRG driver for Hi3798CV200 SoC by Jiancheng Xue · 8 years ago