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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / c5c32cda59714f88b6f42de5beebd2bf4b98b2c3 / drivers / gpu / drm / i915 / intel_pm.c
  1. c5c32cd drm/i915: We implement WaDisableL3Bank2xClockGate:vlv by Ville Syrjälä · 11 years ago
  2. 5cd5410 drm/i915: Fix FBC1 enable message by Ville Syrjälä · 11 years ago
  3. 46f3dab drm/i915: Don't preserve DPFC_CONTROL bits ILK/SNB by Ville Syrjälä · 11 years ago
  4. fe74c1a drm/i915: Actually write the correct bits to DPFC_CONTROL on CTG by Ville Syrjälä · 11 years ago
  5. 3fa2e0e drm/i915: Use 1/2 compression ratio limit for 16bpp on FBC2 by Ville Syrjälä · 11 years ago
  6. 7f2cf22 drm/i915: Improve FBC plane defines a bit by Ville Syrjälä · 11 years ago
  7. 4e41f3a drm/i915: Don't set DPFC_HT_MODIFY bit on CTG/ILK/SNB by Ville Syrjälä · 11 years ago
  8. 567689a drm/i915: Don't set persistent FBC mode on ILK/SNB by Ville Syrjälä · 11 years ago
  9. b339088 drm/i915: Don't write IVB_FBC_RT_BASE by Ville Syrjälä · 11 years ago
  10. 0e5539b Merge branch 'topic/ppgtt' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  11. 4167e32 drm/i915: Don't use i915_preliminary_hw_support to mean pre-production by Damien Lespiau · 11 years ago
  12. 0d9d349 Merge commit origin/master into drm-intel-next by Daniel Vetter · 11 years ago
  13. 3f2dc5a drm/i915: Fix 915GM self-refresh enable/disable by Ville Syrjälä · 11 years ago
  14. feb56b9 drm/i915: i830M has watermarks like i855 by Daniel Vetter · 11 years ago
  15. 3a77c4c drm/i915: Drop I915_ prefix from HAS_FBC by Daniel Vetter · 11 years ago
  16. 576b259 drm/i915: use crtc_htotal when calculating ilk watermarks by Jesse Barnes · 11 years ago
  17. bd60254 drm/i915: Simplify watermark/init_clock_gating setup by Ville Syrjälä · 11 years ago
  18. 03dce88 drm/i915: Enable watermarks for BDW by Ville Syrjälä · 11 years ago
  19. a42a571 drm/i915: Fix watermark code for BDW by Ville Syrjälä · 11 years ago
  20. 3d7f0f9 Merge commit drm-intel-fixes into topic/ppgtt by Daniel Vetter · 11 years ago
  21. d7f46fc drm/i915: Make pin count per VMA by Ben Widawsky · 11 years ago
  22. 820c198 drm/i915: s/haswell_update_wm/ilk_update_wm/ by Imre Deak · 11 years ago
  23. 954911e drm/i915: simplify platform specific code in hsw_write_wm_values by Imre Deak · 11 years ago
  24. 8553c18 drm/i915: Try to fix the messy IVB sprite scaling workaround by Ville Syrjälä · 11 years ago
  25. 96f90c5 drm/i915: Move ILK/SNB/IVB over to the HSW WM code by Ville Syrjälä · 11 years ago
  26. 017636c drm/i915: Disable LP1+ watermarks safely in init by Ville Syrjälä · 11 years ago
  27. ce0e071 drm/i915: Linetime watermarks are a HSW feature by Ville Syrjälä · 11 years ago
  28. 6c8b6c2 drm/i915: Disable FBC WM on ILK, and disable LP2+ when FBC is enabled by Ville Syrjälä · 11 years ago
  29. 0ba22e2 drm/i915: Don't merge LP1+ watermarks on ILK/SNB/IVB when multiple pipes are enabled by Ville Syrjälä · 11 years ago
  30. facd619b drm/i915: Fix LP1+ watermark disabling ILK by Ville Syrjälä · 11 years ago
  31. 6cef2b8a drm/i915: Fix LP1 sprite watermarks for ILK/SNB by Ville Syrjälä · 11 years ago
  32. 7b39a0b drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabled by Ville Syrjälä · 11 years ago
  33. a68d68e drm/i915: Add ILK/SNB/IVB WM latency field support by Ville Syrjälä · 11 years ago
  34. ac9545f drm/i915: Add IVB DDB partitioning control by Ville Syrjälä · 11 years ago
  35. 691bb71 drm/i915: Use IS_VALLEYVIEW() to test the is_valleyview flag by Damien Lespiau · 11 years ago
  36. be3d26b drm/i915: get a PC8 reference when enabling the power well by Paulo Zanoni · 11 years ago
  37. ab57fff drm/i915/bdw: Implement ff workarounds by Ben Widawsky · 11 years ago
  38. 63801f2 drm/i915/bdw: Force all Data Cache Data Port access to be Non-Coherent by Ben Widawsky · 11 years ago
  39. 993495a drm/i915: Rework the FBC interval/stall stuff a bit by Ville Syrjälä · 11 years ago
  40. 159f987 drm/i915: FBC_CONTROL2 is gen4 only by Ville Syrjälä · 11 years ago
  41. 42a430f drm/i915: Gen2 FBC1 CFB pitch wants 32B units by Ville Syrjälä · 11 years ago
  42. f9dcb0d drm/i915: touch VGA MSR after we enable the power well by Paulo Zanoni · 11 years ago
  43. d5e8fdc drm/i915: extract hsw_power_well_post_{enable, disable} by Paulo Zanoni · 11 years ago
  44. 25945b6 Merge tag 'drm-intel-fixes-2013-12-11' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes by Dave Airlie · 11 years ago
  45. 62a3a12 Merge branch 'bdw-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes by Dave Airlie · 11 years ago
  46. 8a18745 drm/i915: add initial Runtime PM functions by Paulo Zanoni · 11 years ago
  47. d62292c drm/i915: get a PC8 reference when enabling the power well by Paulo Zanoni · 11 years ago
  48. f7698ba Merge tag 'v3.13-rc3' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  49. f742a55 drm/i915: fix pm init ordering by Daniel Vetter · 11 years ago
  50. 4004546 drm/i915: Reorganize FBC function pointer initializaition by Ville Syrjälä · 11 years ago
  51. c5a44aa drm/i915: Fix FBC1 plane checks for gen2 by Ville Syrjälä · 11 years ago
  52. ddf9c53 drm/i915: add intel_display_power_enabled_sw() for use in atomic ctx by Imre Deak · 11 years ago
  53. 6b88f29 drm/i915/vlv: use parallel context restore when coming out of RC6 by Jesse Barnes · 11 years ago
  54. 2f0aa304 drm/i915/vlv: use a lower RC6 timeout on VLV by Jesse Barnes · 11 years ago
  55. 940aece drm/i915/vlv: Valleyview support for forcewake Individual power wells. by Deepak S · 11 years ago
  56. c8d9a59 drm/i915: Add power well arguments to force wake routines. by Deepak S · 11 years ago
  57. fec8cba drm/i915: use crtc_htotal in watermark calculations to match fastboot v2 by Jesse Barnes · 11 years ago
  58. 1da5158 drm/i915: add a debugfs entry for power domain info by Imre Deak · 11 years ago
  59. 1c2256d drm/i915: add a default always-on power well by Imre Deak · 11 years ago
  60. f7243ac drm/i915: don't do BDW/HSW specific powerdomains init on other platforms by Imre Deak · 11 years ago
  61. 6f3ef5d drm/i915: add always-on power wells instead of special casing them by Imre Deak · 11 years ago
  62. c1ca727 drm/i915: support for multiple power wells by Imre Deak · 11 years ago
  63. fbeeaa2 drm/i915: add audio power domain by Imre Deak · 11 years ago
  64. d629336 drm/i915: Don't set the fence number in DPFC_CTL on SNB by Ville Syrjälä · 11 years ago
  65. b19870e drm/i915: Use plane_name() in gen7_enable_fbc() by Ville Syrjälä · 11 years ago
  66. f727b49 drm/i915: Fix gen3 self-refresh watermarks by Daniel Vetter · 11 years ago
  67. 29c78f6 Partially revert "drm/i915: tune the RC6 threshold for stability" by Daniel Vetter · 11 years ago
  68. c09cd6e Merge branch 'backlight-rework' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  69. 596cc11 drm/i915/bdw: PIPE_[BC] I[ME]R moved to powerwell by Ben Widawsky · 11 years ago
  70. 4c2e7a5 drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints by Ben Widawsky · 11 years ago
  71. a75f362 drm/i915/bdw: conservative SBE VUE cache mode by Ben Widawsky · 11 years ago
  72. 7f88da0 drm/i915/bdw: Limit SDE poly depth FIFO to 2 by Ben Widawsky · 11 years ago
  73. bf66347 drm/i915/bdw: Sampler power bypass disable by Ben Widawsky · 11 years ago
  74. fd392b6 ddrm/i915/bdw: Disable centroid pixel perf optimization by Ben Widawsky · 11 years ago
  75. 4afe8d3 drm/i915/bdw: BWGTLB clock gate disable by Ben Widawsky · 11 years ago
  76. fe4ab3c drm/i915/bdw: Implement edp PSR workarounds by Ben Widawsky · 11 years ago
  77. 6edee7f drm/i915/bdw: Create a separate BDW rps enable by Ben Widawsky · 11 years ago
  78. 46c764d drm/i915/bdw: Use HSW formula for ring freq scaling by Ben Widawsky · 11 years ago
  79. 416f472 drm/i915/bdw: Add Broadwell display FIFO limits by Ville Syrjälä · 11 years ago
  80. 50ed5fb drm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriority by Ben Widawsky · 11 years ago
  81. 6745a2c drm/i915/bdw: Broadwell also has the "power down well" by Paulo Zanoni · 11 years ago
  82. 1020a5c drm/i915/bdw: Clock gating init by Ben Widawsky · 11 years ago
  83. 4c79156 drm/i915: Kill vlv_update_rps_cur_delay() by Ville Syrjälä · 11 years ago
  84. 6917c7b drm/i915: Initialise min/max frequencies before updating RPS registers by Chris Wilson · 11 years ago
  85. 2325991 drm/i915/vlv: Workaround a punit issue in DDR data rate for 1333. by Chon Ming Lee · 11 years ago
  86. 2ec3815 drm/i915: Pass dev_priv to vlv_gpu_freq() and vlv_freq_opcode() by Ville Syrjälä · 11 years ago
  87. 07ab118 drm/i915: Improve vlv_gpu_freq() and vlv_freq_opcode() by Ville Syrjälä · 11 years ago
  88. f64a28a drm/i915/vlv: fixup DDR freq detection per Punit spec by Jesse Barnes · 11 years ago
  89. 85b1d7b drm/i915: move VLV DDR freq fetch into init_clock_gating by Jesse Barnes · 11 years ago
  90. 7f16e5c Merge tag 'v3.12' into drm-intel-next by Daniel Vetter · 11 years ago
  91. 1ad577a drm/i915: add back checking for i915_disable_power_well by Imre Deak · 11 years ago
  92. ddb642f drm/i915: rename i915_init_power_well to init_power_domains_init by Imre Deak · 11 years ago
  93. b4ed448 drm/i915: remove device field from struct power_well by Imre Deak · 11 years ago
  94. baa7070 drm/i915: use power get/put instead of set for power on after init by Imre Deak · 11 years ago
  95. 83c00f5 drm/i915: prepare for multiple power wells by Imre Deak · 11 years ago
  96. 8c7b72f drm/i915: Remove WaFbcDisableDpfcClockGating on HSW by Ben Widawsky · 11 years ago
  97. a74b0c4 drm/i915: Remove WaFbcDisableDpfcClockGating on IVB by Ben Widawsky · 11 years ago
  98. 153b4b95 drm/i915: Convert straggling MCHBAR registers by Ben Widawsky · 11 years ago
  99. 959cbc1 drm/i915: change power_well->lock to be mutex by Imre Deak · 11 years ago
  100. bddc764 drm/i915: factor out is_always_on_domain by Imre Deak · 11 years ago