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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / c24449b321095d8c80cdda3d68107269c1d5569f / drivers / irqchip / irq-sifive-plic.c
  1. 1d4df64 irqchip/sifive-plic: Add missing thead,c900-plic match string by Guo Ren · 3 years ago
  2. 69ea463 irqchip/sifive-plic: Fixup EOI failed when masked by Guo Ren · 3 years, 2 months ago
  3. 046a6ee irqchip: Bulk conversion to generic_handle_domain_irq() by Marc Zyngier · 3 years, 9 months ago
  4. e03b7c1 irqchip/sifive-plic: Mark two global variables __ro_after_init by Jisheng Zhang · 3 years, 10 months ago
  5. f9ac7bb irqchip/sifive-plic: Fix chip_data access within a hierarchy by Greentime Hu · 4 years, 3 months ago
  6. a7480c5 irqchip/sifive-plic: Fix broken irq_set_affinity() callback by Greentime Hu · 4 years, 3 months ago
  7. 6b7ce892 irqchip: RISC-V per-HART local interrupt controller driver by Anup Patel · 4 years, 8 months ago
  8. d175d69 RISC-V: Rename and move plic_find_hart_id() to arch directory by Anup Patel · 4 years, 8 months ago
  9. 0e375f5 irqchip/sifive-plic: Improve boot prints for multiple PLIC instances by Anup Patel · 4 years, 8 months ago
  10. 2234ae8 irqchip/sifive-plic: Setup cpuhp once after boot CPU handler is present by Anup Patel · 4 years, 8 months ago
  11. 2458ed3 irqchip/sifive-plic: Set default irq affinity in plic_irqdomain_map() by Anup Patel · 4 years, 8 months ago
  12. 82f2202 irqchip/sifive-plic: Remove incorrect requirement about number of irq contexts by Wesley W. Terpstra · 4 years, 8 months ago
  13. d727be7 irqchip/sifive-plic: Fix maximum priority threshold value by Atish Patra · 4 years, 10 months ago
  14. f1ad113 irqchip/sifive-plic: Add support for multiple PLICs by Atish Patra · 4 years, 11 months ago
  15. ccbe80b irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offline by Atish Patra · 4 years, 11 months ago
  16. 43ee744 Merge tag 'irqchip-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core by Thomas Gleixner · 5 years ago
  17. 466008f irqchip/sifive-plic: Support irq domain hierarchy by Yash Shah · 5 years ago
  18. 2f3035d riscv: prefix IRQ_ macro names with an RV_ namespace by Paul Walmsley · 5 years ago
  19. a4c3733 riscv: abstract out CSR names for supervisor vs machine mode by Christoph Hellwig · 5 years ago
  20. 1486b7b Merge tag 'irqchip-fixes-5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent by Thomas Gleixner · 5 years ago
  21. 41860cc irqchip/sifive-plic: Skip contexts except supervisor in plic_init() by Alan Mikhak · 5 years ago
  22. c9b5918 Merge tag 'irqchip-fixes-5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent by Thomas Gleixner · 5 years ago
  23. bb0fed1 irqchip/sifive-plic: Switch to fasteoi flow by Marc Zyngier · 5 years ago
  24. 9ce0649 irqchip/sifive-plic: set max threshold for ignored handlers by Christoph Hellwig · 5 years ago
  25. cc9f04f irqchip/sifive-plic: Implement irq_set_affinity() for SMP host by Anup Patel · 6 years ago
  26. 6adfe8d irqchip/sifive-plic: Differentiate between PLIC handler and context by Anup Patel · 6 years ago
  27. 3fecb5a irqchip/sifive-plic: Add warning in plic_init() if handler already present by Anup Patel · 6 years ago
  28. 86c7cbf irqchip/sifive-plic: Pre-compute context hart base and enable base by Anup Patel · 6 years ago
  29. fc03aca irqchip/irq-sifive-plic: Check and continue in case of an invalid cpuid. by Atish Patra · 6 years ago
  30. f99fb60 RISC-V: Use Linux logical CPU number instead of hartid by Atish Patra · 6 years ago
  31. b2f8cfa7 RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid by Palmer Dabbelt · 6 years ago
  32. 8237f8b irqchip: add a SiFive PLIC driver by Christoph Hellwig · 6 years ago