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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / a7546159718171ba9f2a4df37b574c64b1589b5d / drivers / gpu / drm / i915 / intel_pm.c
  1. a754615 drm/i915/bxt: Clean up bxt_init_clock_gating by Nick Hoath · 10 years ago
  2. 742f491 drm/i915: use the yesno helper for logging by Jani Nikula · 9 years ago
  3. 395ab75 drm/i915/skl: Avoid using un-initialized bits_per_pixel by Kumar, Mahesh · 9 years ago
  4. c269952 drm/i915: Add HAS_PCH_LPT_LP() macro by Ville Syrjälä · 9 years ago
  5. 06059d5 Merge tag 'topic/drm-misc-2015-07-28' into drm-intel-next-queued by Daniel Vetter · 9 years ago
  6. 245d966 drm/i915:skl: Add WaEnableGapsTsvCreditFix by Arun Siluvery · 9 years ago
  7. 4ea50e9 drm: Simplify drm_for_each_legacy_plane arguments by Daniel Vetter · 9 years ago
  8. dd92d8d Partially revert "drm/i915: s/mdelay/msleep/" in ilk rps code by Daniel Vetter · 9 years ago
  9. 661abfc drm/i915: Fix divide by zero on watermark update by Mika Kuoppala · 9 years ago
  10. a4106a7 drm/i915/gen9: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround by Arun Siluvery · 9 years ago
  11. 6381b55 drm/i915/gen9: Implement WaDisableKillLogic for gen 9 by Nick Hoath · 9 years ago
  12. 97d3308 drm/i915: Add HAS_CORE_RING_FREQ macro by Akash Goel · 10 years ago
  13. cc017fb4 drm/i915/skl: Restrict the ring frequency table programming to SKL by Akash Goel · 10 years ago
  14. cd25dd5 drm/i915: Update PM interrupts before updating the freq by Deepak S · 9 years ago
  15. 4c8c774 drm/i915/skl: Ring frequency table programming changes by Akash Goel · 10 years ago
  16. c5e0688 drm/i915/skl: Retrieve the Rpe value from Pcode by Akash Goel · 10 years ago
  17. 7733b49 drm/i915: use dev_priv for the FBC functions by Paulo Zanoni · 9 years ago
  18. 6adfb1e drm/i915: s/mdelay/msleep/ by Daniel Vetter · 9 years ago
  19. 2cb389b drm/i915: Zero unused WM1 watermarks on VLV/CHV by Ville Syrjälä · 10 years ago
  20. 6f9c784 drm/i915: Don't do PM5/DDR DVFS with multiple pipes by Ville Syrjälä · 10 years ago
  21. 852eb00 drm/i915: Try to make sure cxsr is disabled around plane enable/disable by Ville Syrjälä · 10 years ago
  22. 26e1fe4 drm/i915: Use the memory latency based WM computation on VLV too by Ville Syrjälä · 10 years ago
  23. 54f1b6e drm/i915: Compute display FIFO split dynamically for CHV by Ville Syrjälä · 10 years ago
  24. 262cd2e drm/i915: CHV DDR DVFS support and another watermark rewrite by Ville Syrjälä · 10 years ago
  25. 6eb1a68 drm/i915: Read wm values from hardware at init on CHV by Ville Syrjälä · 10 years ago
  26. a7a6c49 drm/i915: POSTING_READ() in intel_set_memory_cxsr() by Ville Syrjälä · 10 years ago
  27. 3504056 drm/i915: Update rps frequencies for BXT by Bob Paauwe · 10 years ago
  28. e7d66d8 drm/i915: Remove more ilk rc6 remnants by Daniel Vetter · 10 years ago
  29. 8cfb340 drm/i915: Don't enable IPS when pixel rate exceeds 95% by Ville Syrjälä · 10 years ago
  30. 05024da drm/i915: Use cached cdclk value by Ville Syrjälä · 10 years ago
  31. a8a50fc Merge tag 'v4.1-rc6' into drm-next by Dave Airlie · 10 years ago
  32. a580516 drm/i915: s/dpio_lock/sb_lock/ by Ville Syrjälä · 10 years ago
  33. b12ce1d drm/i915: Kill intel_flush_primary_plane() by Ville Syrjälä · 10 years ago
  34. 8d3afd7 drm/i915: Use spinlocks for checking when to waitboost by Chris Wilson · 10 years ago
  35. d0bc54f drm/i915: Introduce DRM_I915_THROTTLE_JIFFIES by Chris Wilson · 10 years ago
  36. 6d50b06 drm/i915: Enable GTT caching on gen8 by Ville Syrjälä · 10 years ago
  37. 4d487cf drm/i915: Move WaProgramL3SqcReg1Default:bdw to init_clock_gating() by Ville Syrjälä · 10 years ago
  38. 7ad0dba drm/i915: Use ilk_init_lp_watermarks() on BDW by Ville Syrjälä · 10 years ago
  39. e61b995 drm/i915: Free RPS boosts for all laggards by Chris Wilson · 10 years ago
  40. 2e1b873 drm/i915: Convert RPS tracking to a intel_rps_client struct by Chris Wilson · 10 years ago
  41. bcafc4e drm/i915: Limit mmio flip RPS boosts by Chris Wilson · 10 years ago
  42. a6f766f drm/i915: Limit ring synchronisation (sw sempahores) RPS boosts by Chris Wilson · 10 years ago
  43. eed29a5 drm/i915: s/\<rq\>/req/g by Daniel Vetter · 10 years ago
  44. 5b7c91b drm/i915/chv: Set min freq to efficient frequency on chv by Deepak S · 10 years ago
  45. 4a7624f drm/i915/chv: Extend set idle rps wa to chv by Deepak S · 10 years ago
  46. a7f6e23 drm/i915/vlv: Remove wait for for punit to updates freq. by Deepak S · 10 years ago
  47. b6e742f drm/i915: Be optimistic about future display engines having 7 WM levels by Damien Lespiau · 10 years ago
  48. 2cd601c drm/i915: Adding dbuf support for skl nv12 format. by Chandra Konduru · 10 years ago
  49. 54da691 drm/i915: fix screen flickering by Thomas Gummerer · 10 years ago
  50. f1d3d34 drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCS by Damien Lespiau · 10 years ago
  51. 813b5e6 drm/i915: s/9/intel_freq_opcode(450)/ by Ville Syrjälä · 10 years ago
  52. 3ef6234 drm/i915: Setup static bias for GPU by Deepak S · 10 years ago
  53. f4f71c7 drm/i915: Re-adjusting rc6 promotional timer for chv by Deepak S · 10 years ago
  54. c5fe557 Merge branch 'topic/bxt-stage1' into drm-intel-next-queued by Daniel Vetter · 10 years ago
  55. e3a2905 drm/i915/bxt: add workaround to avoid PTE corruption by Robert Beckett · 10 years ago
  56. 868434c drm/i915/bxt: add GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ workaround by Ben Widawsky · 10 years ago
  57. 32608ca drm/i915/bxt: add GEN8_SDEUNIT_CLOCK_GATE_DISABLE workaround by Imre Deak · 10 years ago
  58. a82abe4 drm/i915/bxt: add bxt_init_clock_gating by Imre Deak · 10 years ago
  59. cb07bae drm/i915: Disable Render power gating by Sagar Kamble · 10 years ago
  60. a4104c5 drm/i915: Naming constants to be written to GEN9_PG_ENABLE by Sagar Kamble · 10 years ago
  61. 1854d5c drm/i915: Deminish contribution of wait-boosting from clients by Chris Wilson · 10 years ago
  62. 6ad790c drm/i915: Boost GPU frequency if we detect outstanding pageflips by Chris Wilson · 10 years ago
  63. 8fb5519 drm/i915: Agressive downclocking on Baytrail by Chris Wilson · 10 years ago
  64. f9fc42f drm/i915/skl: Implement WaDisableVFUnitClockGating by Damien Lespiau · 10 years ago
  65. 669506e drm/i915/skl: Fix stepping check for a couple of W/As by Damien Lespiau · 10 years ago
  66. c929cb4 drm/i915: Silence a sparse warning by Ville Syrjälä · 10 years ago
  67. 43d735a drm/i915/bxt: Broxton DDB is 512 blocks by Damien Lespiau · 10 years ago
  68. 1652d19 drm/i915: Convert the ddi cdclk code to get_display_clock_speed by Ville Syrjälä · 10 years ago
  69. 2f0b579 drm/i915/skl: fix semicolon.cocci warnings by kbuild test robot · 10 years ago
  70. 1fc0a8f drm/i915/skl: Take 90/270 rotation into account in watermark calculations by Tvrtko Ursulin · 10 years ago
  71. 6f4b12f8 drm/i915: Use down ei for manual Baytrail RPS calculations by Chris Wilson · 10 years ago
  72. 43cf3bf drm/i915: Improved w/a for rps on Baytrail by Chris Wilson · 10 years ago
  73. aed242f drm/i915: Relax RPS contraints to allows setting minfreq on idle by Chris Wilson · 10 years ago
  74. 4c2a889 drm/i915/skl: Enable the RPS interrupts programming by Akash Goel · 10 years ago
  75. 0beb059 drm/i915/skl: Updated the gen9_enable_rps function by Akash Goel · 10 years ago
  76. 74ef117 drm/i915/skl: Updated the gen6_rps_limits function by Akash Goel · 10 years ago
  77. 8a58643 drm/i915/skl: Restructured the gen6_set_rps_thresholds function by Akash Goel · 10 years ago
  78. 5704195 drm/i915/skl: Updated the gen6_set_rps function by Akash Goel · 10 years ago
  79. cee991c drm/i915/skl: Updated the gen6_init_rps_frequencies function by Akash Goel · 10 years ago
  80. 80b6dda drm/i915/skl: Updated intel_gpu_freq() and intel_freq_opcode() by Akash Goel · 10 years ago
  81. f499896 drm/i915: Use FW_WM() macro for older gmch platforms too by Ville Syrjälä · 10 years ago
  82. 1566597 drm/i915: Add polish to VLV WM shift+mask operations by Ville Syrjälä · 10 years ago
  83. c9f038a drm/i915: Don't assume primary & cursor are always on for wm calculation (v4) by Matt Roper · 10 years ago
  84. fc1ac8d drm/i915: Disable DDR DVFS on CHV by Ville Syrjälä · 10 years ago
  85. cfb4141 drm/i915: Enable the maxfifo PM5 mode when appropriate on CHV by Ville Syrjälä · 10 years ago
  86. ae80152 drm/i915: Rewrite VLV/CHV watermark code by Ville Syrjälä · 10 years ago
  87. 3ef0028 drm/i915: Use crtc->state->active in ilk/skl watermark calculations (v3) by Matt Roper · 10 years ago
  88. c6beb13 drm/i915: Make sure PND deadline mode is enabled on VLV/CHV by Ville Syrjälä · 10 years ago
  89. b500472 drm/i915: Read out display FIFO size on VLV/CHV by Ville Syrjälä · 10 years ago
  90. 883a3d2 drm/i915: Pass plane to vlv_compute_drain_latency() by Ville Syrjälä · 10 years ago
  91. 0018fda drm/i915: Reorganize VLV DDL setup by Ville Syrjälä · 10 years ago
  92. 341c526 drm/i915: Hide VLV DDL precision handling by Ville Syrjälä · 10 years ago
  93. abfc00b drm/i915: Simplify VLV drain latency computation by Ville Syrjälä · 10 years ago
  94. 1203051 drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines by Ville Syrjälä · 10 years ago
  95. edf6056 drm/i915: Reduce CHV DDL multiplier to 16/8 by Ville Syrjälä · 10 years ago
  96. a561165 drm/i915: Remove ironlake rc6 support by John Harrison · 10 years ago
  97. dd74078 drm/i915: Make for_each_plane() take dev_priv as argument by Damien Lespiau · 10 years ago
  98. 59bea88 drm/i915: Use plane->state->fb in watermark code (v2) by Matt Roper · 10 years ago
  99. 3dd512f drm/i915: Kill intel_crtc->cursor_{width, height} (v2) by Matt Roper · 10 years ago
  100. 8dd0eb3 Merge tag 'drm-intel-next-2015-02-27' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 10 years ago