1. f2b0b25 ARCv2: Support IO Coherency and permutations involving L1 and L2 caches by Alexey Brodkin · 10 years ago
  2. 795f455 ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency) by Vineet Gupta · 10 years ago
  3. bcc4d65a ARCv2: MMUv4: support aliasing icache config by Vineet Gupta · 10 years ago
  4. d1f317d ARCv2: MMUv4: cache programming model changes by Vineet Gupta · 10 years ago
  5. c4aa49d ARC: Update comments about uncached address space by Vineet Gupta · 10 years ago
  6. 230a15f ARC: remove checks for CONFIG_ARC_MMU_V4 by Paul Bolle · 11 years ago
  7. ef680cd ARC: Disable caches in early boot if so configured by Vineet Gupta · 11 years ago
  8. 63d2dfd ARC: cacheflush refactor #2: I and D caches lines to have same size by Vineet Gupta · 11 years ago
  9. 07b9b65 ARC: fix new Section mismatches in build (post __cpuinit cleanup) by Vineet Gupta · 11 years ago
  10. 3049918 ARC: cache detection code bitrot by Vineet Gupta · 12 years ago
  11. da1677b ARC: Disintegrate arcregs.h by Vineet Gupta · 12 years ago
  12. 8235703 ARC: Use kconfig helper IS_ENABLED() to get rid of defines.h by Vineet Gupta · 12 years ago
  13. 5bba49f ARC: [mm] Aliasing VIPT dcache support 4/4 by Vineet Gupta · 12 years ago
  14. 95d6976 ARC: Cache Flush Management by Vineet Gupta · 12 years ago
  15. 3be80aa ARC: Fundamental ARCH data-types/defines by Vineet Gupta · 12 years ago