1. 84c2377 drm/i915/bdw: Allocate ringbuffers for Logical Ring Contexts by Oscar Mateo · 10 years ago
  2. 8c857917 drm/i915/bdw: A bit more advanced LR context alloc/free by Oscar Mateo · 10 years ago
  3. c9e003a drm/i915/bdw: Introduce one context backing object per engine by Oscar Mateo · 10 years ago
  4. ede7d42 drm/i915/bdw: Initialization for Logical Ring Contexts by Oscar Mateo · 10 years ago
  5. bd84b1e drm/i915: WARN if module opt sanitization goes out of order by Daniel Vetter · 10 years ago
  6. 127f100 drm/i915/bdw: Macro for LRCs and module option for Execlists by Oscar Mateo · 10 years ago
  7. b20385f drm/i915/bdw: New source and header file for LRs, LRCs and Execlists by Oscar Mateo · 10 years ago
  8. 906843c drm/i915: Simplify relocate_entry_gtt() and make 64-bit safe by Chris Wilson · 10 years ago
  9. 060e82c drm/i915: Remove redundant list_empty(eb->vmas) tests in execbuffer by Chris Wilson · 10 years ago
  10. ad19f10 drm/i915: Pre-validate the NEED_GTTS flag for execbuffer by Chris Wilson · 10 years ago
  11. da51a1e drm/i915: Fix secure dispatch with full ppgtt by Daniel Vetter · 10 years ago
  12. dbbe912 drm/i915: Agnostic INTEL_INFO by Chris Wilson · 10 years ago
  13. 9bec9b1 drm/i915: Double check ring is idle before declaring the GPU wedged by Chris Wilson · 10 years ago
  14. 1bee201 drm/i915: Remove set but unused 'gt_perf_status' by Damien Lespiau · 10 years ago
  15. f6daaec drm/i915: Make intel_disable_shared_dpll() static by Damien Lespiau · 10 years ago
  16. 87f1f46 drm/i915: Copy PCI device id into the device info block by Chris Wilson · 10 years ago
  17. 82b6b6d drm/i915: Remove fenced_gpu_access and pending_fenced_gpu_access by Chris Wilson · 10 years ago
  18. e6a8446 drm/i915: Force CPU relocations if not GTT mapped by Chris Wilson · 10 years ago
  19. dc8cd1e drm/i915: Only perform set-to-gtt domain for objects bound to the global gtt by Chris Wilson · 10 years ago
  20. d6699dd drm/i915: Fix wrong number of HDMI translation entries by Damien Lespiau · 10 years ago
  21. 3bb11b5 drm/i915: Continuation of future readiness series by Sonika Jindal · 10 years ago
  22. 22c5996 drm/i915: fix i915_interrupt_info on BDW by Paulo Zanoni · 10 years ago
  23. fdd508a6 drm/i915: Call .update_primary_plane in intel_{enable, disable}_primary_hw_plane() by Ville Syrjälä · 10 years ago
  24. f45651b drm/i915: Eliminate rmw from .update_primary_plane() by Ville Syrjälä · 10 years ago
  25. 4fa7904 drm/i915: Fix erroneous conversion to u8 by Damien Lespiau · 10 years ago
  26. 2c0827c drm/i915: Update DRIVER_DATE to 20140808 by Daniel Vetter · 10 years ago
  27. 403bdd1 drm/i915: No busy-loop wait_for in the ring init code by Daniel Vetter · 10 years ago
  28. 01e184c drm/i915: Add sprite watermark programming for VLV and CHV by Gajanan Bhat · 10 years ago
  29. a398e9c drm/i915: Round-up clock and limit drain latency by Gajanan Bhat · 10 years ago
  30. 0948c26 drm/i915: Generalize drain latency computation by Gajanan Bhat · 10 years ago
  31. e2fcdaa drm/i915: Free pending page flip events at .preclose() by Ville Syrjälä · 10 years ago
  32. 692ef70 drm/i915: clean up PPGTT checking logic by Jesse Barnes · 10 years ago
  33. efd814b drm/i915: Polish the chv cmnlane resrt macros by Ville Syrjälä · 11 years ago
  34. 3dd7b974 drm/i915: Hack to tie both common lanes together on chv by Ville Syrjälä · 11 years ago
  35. 3c2777f drm/i915: Add cherryview_update_wm() by Ville Syrjälä · 11 years ago
  36. 41aad81 drm/i915: Update DDL only for current CRTC by Gajanan Bhat · 10 years ago
  37. 1abc4dc drm/i915: Parametrize VLV_DDL registers by Ville Syrjälä · 11 years ago
  38. 0a56067 drm/i915: Fill out the FWx watermark register defines by Ville Syrjälä · 11 years ago
  39. 9783de2 drm: Resetting rotation property by Sonika Jindal · 10 years ago
  40. 7ed6eee drm/i915: Add rotation property for sprites by Ville Syrjälä · 10 years ago
  41. e57465f drm/i915: Make intel_plane_restore() return an error by Ville Syrjälä · 10 years ago
  42. 76eebda drm/i915: Add 180 degree sprite rotation support by Ville Syrjälä · 10 years ago
  43. b2784e1 drm/i915: Introduce a for_each_intel_encoder() macro by Damien Lespiau · 10 years ago
  44. 4079b8d drm/i915: Demote the DRRS messages to debug messages by Damien Lespiau · 10 years ago
  45. 7fad359 drm/i915: remove duplicate register defines by Paulo Zanoni · 10 years ago
  46. ac921bd drm/i915: Remove now useless comments about the translation values by Damien Lespiau · 10 years ago
  47. 156ae28 drm/i915/bdw: Remove the HDMI/DVI entry from the DP/eDP/FDI tables by Damien Lespiau · 10 years ago
  48. a26aa8b drm/i915/bdw: Provide the BDW specific HDMI buffer translation table by Damien Lespiau · 10 years ago
  49. ce4dd49 drm/i915: Gather the HDMI level shifter logic into one place by Damien Lespiau · 10 years ago
  50. da46f93 drm/i915: Introduce FBC False Color for debug purposes. by Rodrigo Vivi · 10 years ago
  51. 7f3de83 drm/i915: Align intel_dsi*.c files a bit by Daniel Vetter · 10 years ago
  52. 7f0c860 drm/i915: Add support for Video Burst Mode for MIPI DSI by Shobhit Kumar · 10 years ago
  53. 1fb4450 drm/i915: Clarify CHV swing margin/deemph bits by Ville Syrjälä · 11 years ago
  54. 625695f drm/i915: Call intel_{dp, hdmi}_prepare for chv by Ville Syrjälä · 11 years ago
  55. 1ae0d13 drm/i915: Split chv_update_pll() apart by Ville Syrjälä · 11 years ago
  56. d17ec4c drm/i915: Leave DPLL ref clocks on by Ville Syrjälä · 11 years ago
  57. d49a340 drm/i915: Disable cdclk changes for chv until Punit is ready by Ville Syrjälä · 11 years ago
  58. 383c5a6 drm/i915: Add cdclk change support for chv by Ville Syrjälä · 11 years ago
  59. 06ffc77 d rm/i915: freeze display before the interrupts and GT by Paulo Zanoni · 10 years ago
  60. 3d51278a drm/i915: Make ddi_clock_gate() HSW/BDW specific by Daniel Vetter · 10 years ago
  61. ad13d60 drm/i915: Split the CDCLK retrieval per-platform by Damien Lespiau · 10 years ago
  62. d664c0c drm/i915: Make intel_ddi_calculate_wrpll() HSW/BDW specific by Damien Lespiau · 10 years ago
  63. 0220ab6 drm/i915: Split the BDW/HSW specific shared pll selection by Damien Lespiau · 10 years ago
  64. bf9584b drm/i915: Fix stale comment for intel_ddi_pll_select() by Damien Lespiau · 10 years ago
  65. ea155f3 drm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDW by Damien Lespiau · 10 years ago
  66. 143b307 drm/i915: Extract the HSW/BDW shared dpll init code by Damien Lespiau · 10 years ago
  67. 7d2c817 drm/i915: Extract the HSW DDI selection code into its own function by Damien Lespiau · 10 years ago
  68. 74dd692 drm/i915: Add a space to the shared DPLL debug message by Damien Lespiau · 10 years ago
  69. dcfc355 drm/i915: Specify when the PLL hw state fields are valid by Damien Lespiau · 10 years ago
  70. aad3d14 drm/i915: Add DP training pattern 3 for CHV by Ville Syrjälä · 11 years ago
  71. a504345 drm/i915: Split a few long debug prints by Ville Syrjälä · 11 years ago
  72. 026b96e drm/i915: Fix read back of plane stride register by Rafael Barbalho · 10 years ago
  73. 2ce147f drm/i915: Add chv port D TX wells by Ville Syrjälä · 11 years ago
  74. 8258356 drm/i915: Add chv port B and C TX wells by Ville Syrjälä · 11 years ago
  75. 26972b0 drm/i915: Add per-pipe power wells for chv by Ville Syrjälä · 11 years ago
  76. f07057d drm/i915: Add disp2d power well for chv by Ville Syrjälä · 11 years ago
  77. a74d782 drm/i915: Kill intel_reset_dpio() by Ville Syrjälä · 11 years ago
  78. 5d6f7ea drm/i915: Add chv cmnlane power wells by Ville Syrjälä · 11 years ago
  79. 4811ff4 drm/i915: Add chv_power_wells[] by Ville Syrjälä · 11 years ago
  80. 210871b6 drm/i915: Kill intel_crtc->vbl_wait by Ville Syrjälä · 11 years ago
  81. b95af8b drm/i915: State readout and cross-checking for dp_m2_n2 by Vandana Kannan · 10 years ago
  82. f769cd2 drm/i915: Set M2_N2 registers during mode set by Vandana Kannan · 10 years ago
  83. be71eab Revert "drm/i915: Enable semaphores on BDW" by Rodrigo Vivi · 10 years ago
  84. ece4a17 drm/i915: read HEAD register back in init_ring_common() to enforce ordering by Jiri Kosina · 10 years ago
  85. ed3b667 drm/i915: Fix crash when failing to parse MIPI VBT by Rafael Barbalho · 10 years ago
  86. 274fa1c drm/i915: Bring GPU Freq to min while suspending. by Deepak S · 10 years ago
  87. 885ea5a drm/i915: Fix DEIER and GTIER collecting for BDW. by Rodrigo Vivi · 10 years ago
  88. f260fe7 drm/i915: Don't accumulate hangcheck score on forward progress by Mika Kuoppala · 10 years ago
  89. 02c9f7e drm/i915: Add the WaCsStallBeforeStateCacheInvalidate:bdw workaround. by Kenneth Graunke · 11 years ago
  90. 884ceac drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper. by Kenneth Graunke · 11 years ago
  91. 69bbeb4 drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL values by Ville Syrjälä · 11 years ago
  92. 22c5aee drm/i915: Fix drain latency precision multipler for VLV by Zhenyu Wang · 11 years ago
  93. 843db71 drm/i915: Collect gtier properly on HSW. by Rodrigo Vivi · 10 years ago
  94. df662a2 drm/i915: Tune down MCH_SSKPD values warning by Daniel Vetter · 10 years ago
  95. 8dfd1f0 drm/i915: Tune done rc6 enabling output by Daniel Vetter · 10 years ago
  96. cba38bf drm/i915: Don't require dev->struct_mutex in psr_match_conditions by Daniel Vetter · 10 years ago
  97. 864c618 drm/i915: Fix error state collecting by Rodrigo Vivi · 10 years ago
  98. 6d93c0c drm/i915: fix VDD state tracking after system resume by Imre Deak · 10 years ago
  99. f573de5 drm/i915: Add correct hw/sw config check for DSI encoder by Shobhit Kumar · 10 years ago
  100. aba8689 drm/i915: factor out intel_edp_panel_vdd_sanitize by Imre Deak · 10 years ago