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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 7da467d82d1ed4fb317aff836f99709169e73f10 / arch / openrisc / kernel / smp.c
  1. f1a0a37 sched/core: Initialize the idle task with preemption disabled by Valentin Schneider · 3 years, 8 months ago
  2. 8f722f6 openrisc: Use devicetree to determine present cpus by Jan Henrik Weinstock · 4 years ago
  3. c28b274 openrisc: Implement proper SMP tlb flushing by Stafford Horne · 4 years, 7 months ago
  4. fc74d71 openrisc: use mmgrab by Julia Lawall · 5 years ago
  5. 610f01b openrisc: fix possible deadlock scenario during timer sync by Stafford Horne · 7 years ago
  6. 4553474 openrisc: add tick timer multi-core sync logic by Stafford Horne · 8 years ago
  7. 4ee93d8 openrisc: add cacheflush support to fix icache aliasing by Jan Henrik Weinstock · 9 years ago
  8. c056718 openrisc: sleep instead of spin on secondary wait by Stafford Horne · 8 years ago
  9. b441aab openrisc: fix initial preempt state for secondary cpu tasks by Stafford Horne · 7 years ago
  10. 8e6d08e openrisc: initial SMP support by Stefan Kristiansson · 11 years ago