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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 6017608936c1825ff5d7325270484042f597edff / arch / x86 / events / perf_event.h
  1. 6017608 perf/x86/intel: Add Icelake support by Kan Liang · 6 years ago
  2. 63b79f6 perf/x86: Support constraint ranges by Peter Zijlstra · 6 years ago
  3. d3617b98 perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles them by Andi Kleen · 6 years ago
  4. c22497f perf/x86/intel: Support adaptive PEBS v4 by Kan Liang · 6 years ago
  5. 878068e perf/x86: Support outputting XMM registers by Kan Liang · 6 years ago
  6. f447e4e perf/x86/intel: Force resched when TFA sysctl is modified by Stephane Eranian · 6 years ago
  7. cc86709 Merge branch 'perf/urgent' into perf/core, to pick up fixes by Ingo Molnar · 6 years ago
  8. 9d5dcc9 perf/x86: Fix incorrect PEBS_REGS by Kan Liang · 6 years ago
  9. 1f6a1e2 perf/x86: Remove PERF_X86_EVENT_COMMITTED by Peter Zijlstra · 6 years ago
  10. f764c58 perf/x86: Fixup typo in stub functions by Peter Zijlstra · 6 years ago
  11. 004cc08 Merge branch 'x86-tsx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip by Linus Torvalds · 6 years ago
  12. 400816f perf/x86/intel: Implement support for TSX Force Abort by Peter Zijlstra (Intel) · 6 years ago
  13. d01b1f9 perf/x86/intel: Make cpuc allocations consistent by Peter Zijlstra (Intel) · 6 years ago
  14. 9ed8f1a Merge branch 'linus' into perf/core, to pick up fixes by Ingo Molnar · 6 years ago
  15. 81ec3f3 perf/x86: Add check_period PMU callback by Jiri Olsa · 6 years ago
  16. 9b545c0 perf/x86/kvm: Avoid unnecessary work in guest filtering by Andi Kleen · 6 years ago
  17. 67266c1 perf/x86/intel: Add generic branch tracing check to intel_pmu_has_bts() by Jiri Olsa · 6 years ago
  18. af3bdb9 perf/x86/intel: Add a separate Arch Perfmon v4 PMI handler by Andi Kleen · 6 years ago
  19. 3196234 perf/x86/intel: Introduce PMU flag for Extended PEBS by Kan Liang · 7 years ago
  20. 8b077e4a perf/x86/intel/lbr: Optimize context switches for the LBR call stack by Kan Liang · 7 years ago
  21. 0592e57 perf/x86/intel/lbr: Fix incomplete LBR call stack by Kan Liang · 7 years ago
  22. 7054e4e Merge branch 'perf/urgent' into perf/core, to pick up fixes by Ingo Molnar · 7 years ago
  23. 174afc3 perf/x86/intel: Rename confusing 'freerunning PEBS' API and implementation to 'large PEBS' by Kan Liang · 7 years ago
  24. 5bee2cc perf/x86/intel/ds: Introduce ->read() function for auto-reload events and flush the PEBS buffer there by Kan Liang · 7 years ago
  25. bcfbe5c perf/x86: Introduce a ->read() callback in 'struct x86_pmu' by Kan Liang · 7 years ago
  26. f605cfc perf/x86/intel: Fix large period handling on Broadwell CPUs by Kan Liang · 7 years ago
  27. 1197491 x86/events/intel/ds: Add PERF_SAMPLE_PERIOD into PEBS_FREERUNNING_FLAGS by Jiri Olsa · 7 years ago
  28. c1961a4 x86/events/intel/ds: Map debug buffers in cpu_entry_area by Hugh Dickins · 7 years ago
  29. 10043e0 x86/cpu_entry_area: Add debugstore entries to cpu_entry_area by Thomas Gleixner · 7 years ago
  30. 2fe1bc1 perf/x86: Enable free running PEBS for REGS_USER/INTR by Andi Kleen · 7 years ago
  31. fc7ce9c perf/core, x86: Add PERF_SAMPLE_PHYS_ADDR by Kan Liang · 7 years ago
  32. b00233b perf/x86: Export some PMU attributes in caps/ directory by Andi Kleen · 7 years ago
  33. 6ae5fa6 perf/x86: Fix data source decoding for Skylake by Andi Kleen · 7 years ago
  34. 9529835 perf/x86: Move Nehalem PEBS code to flag by Andi Kleen · 7 years ago
  35. dd0b06b perf/x86/intel: Add Goldmont Plus CPU PMU support by Kan Liang · 7 years ago
  36. 6089327 perf/x86: Add sysfs entry to freeze counters on SMI by Kan Liang · 8 years ago
  37. fd583ad perf/x86: Fix spurious NMI with PEBS Load Latency event by Kan Liang · 8 years ago
  38. b0c1ef5 perf/x86: Fix exclusion of BTS and LBR for Goldmont by Andi Kleen · 8 years ago
  39. b800058 perf/x86/intel: Cure bogus unwind from PEBS entries by Peter Zijlstra · 8 years ago
  40. 3e2c1a6 perf/x86/intel: Clean up LBR state tracking by Peter Zijlstra · 8 years ago
  41. 68f7082 perf/x86: Ensure perf_sched_cb_{inc,dec}() is only called from pmu::{add,del}() by Peter Zijlstra · 8 years ago
  42. 09e61b4f perf/x86/intel: Rework the large PEBS setup code by Peter Zijlstra · 8 years ago
  43. 19fc9dd perf/x86/intel: Fix MSR_LAST_BRANCH_FROM_x bug when no TSX by David Carrillo-Cisneros · 9 years ago
  44. fc07e9f perf/x86: Support sysfs files depending on SMT status by Andi Kleen · 9 years ago
  45. ccbebba perf/x86/intel/pt: Bypass PT vs. LBR exclusivity if the core supports it by Alexander Shishkin · 9 years ago
  46. f21d5ad perf/x86/intel: Add LBR filter support for Silvermont and Airmont CPUs by Kan Liang · 9 years ago
  47. 8b92c3a perf/x86/intel: Add Goldmont CPU support by Kan Liang · 9 years ago
  48. 4c3b73c Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip by Linus Torvalds · 9 years ago
  49. 32b62f4 perf/x86/amd: Cleanup Fam10h NB event constraints by Peter Zijlstra · 9 years ago
  50. a49ac9f perf/x86: Move events_sysfs_show() outside CPU_SUP_INTEL by Huang Rui · 9 years ago
  51. 00f5268 Merge branch 'x86/cleanups' into x86/urgent by Ingo Molnar · 9 years ago
  52. e17dc65 perf/x86/intel: Fix PEBS data source interpretation on Nehalem/Westmere by Andi Kleen · 9 years ago
  53. b3e6246 perf/x86/pebs: Add proper PEBS constraints for Broadwell by Stephane Eranian · 9 years ago
  54. e72daf3 perf/x86/intel: Use PAGE_SIZE for PEBS buffer size on Core2 by Jiri Olsa · 9 years ago
  55. 27f6d22 perf/x86: Move perf_event.h to its new home by Borislav Petkov · 9 years ago[Renamed from arch/x86/kernel/cpu/perf_event.h]
  56. 1e7b939 perf/x86/intel: Add perf core PMU support for Intel Knights Landing by Harish Chegondi · 9 years ago
  57. 7246976 perf/x86: Use INST_RETIRED.PREC_DIST for cycles: ppp by Andi Kleen · 9 years ago
  58. f1ad448 perf/x86: Remove old MSR perf tracing code by Andi Kleen · 9 years ago
  59. 42a0789 Merge branch 'perf/urgent' into perf/core, to pick up fixes by Ingo Molnar · 9 years ago
  60. 169b932 perf/x86/intel: Fix INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_NA macro by Jiri Olsa · 9 years ago
  61. b7883a1 perf/x86: Handle multiple umask bits for BDW CYCLE_ACTIVITY.* by Andi Kleen · 9 years ago
  62. 90eec10 treewide: Remove old email address by Peter Zijlstra · 9 years ago
  63. b28ae95 perf/x86: Fix LBR call stack save/restore by Andi Kleen · 9 years ago
  64. 02386c3 Merge branch 'perf/urgent' into perf/core, to pick up fixes before applying new changes by Ingo Molnar · 9 years ago
  65. d0dc849 perf/x86/intel/pebs: Add PEBS frontend profiling for Skylake by Andi Kleen · 9 years ago
  66. 8f3e568 perf/core: Drop PERF_EVENT_TXN by Sukadev Bhattiprolu · 9 years ago
  67. fbbe070 perf/core: Add a 'flags' parameter to the PMU transactional interfaces by Sukadev Bhattiprolu · 9 years ago
  68. 47732d8 perf/x86: Make merge_attr() global to use from perf_event_intel by Andi Kleen · 10 years ago
  69. 9a92e16 perf/x86/intel: Add Intel Skylake PMU support by Andi Kleen · 10 years ago
  70. 50eab8f perf/x86/intel/lbr: Add support for LBRv5 by Andi Kleen · 10 years ago
  71. a7b58d2 perf/x86/intel/lbr: Allow time stamp for free running PEBSv3 by Andi Kleen · 10 years ago
  72. c749b3e perf/x86/intel/lbr: Kill off intel_pmu_needs_lbr_smpl for good by Alexander Shishkin · 10 years ago
  73. 6bc4c3a Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip by Linus Torvalds · 10 years ago
  74. 6b099d9 perf/x86/intel/bts: Fix DS area sharing with x86_pmu events by Alexander Shishkin · 10 years ago
  75. 9c964ef perf/x86/intel: Drain the PEBS buffer during context switches by Yan, Zheng · 10 years ago
  76. 3569c0d perf/x86/intel: Implement batched PEBS interrupt handling (large PEBS interrupt threshold) by Yan, Zheng · 10 years ago
  77. 851559e perf/x86/intel: Use the PEBS auto reload mechanism when possible by Yan, Zheng · 10 years ago
  78. 43ef205 perf/x86/intel: Remove intel_excl_states::init_state by Peter Zijlstra · 10 years ago
  79. 0c41e75 perf/x86/intel: Clean up intel_commit_scheduling() placement by Peter Zijlstra · 10 years ago
  80. cc1790c perf/x86: Improve HT workaround GP counter constraint by Peter Zijlstra · 10 years ago
  81. b371b59 perf/x86: Fix event/group validation by Peter Zijlstra · 10 years ago
  82. c857eb5 perf/x86: Fix hw_perf_event::flags collision by Peter Zijlstra · 10 years ago
  83. 1a78d93 perf/x86/intel: Streamline LBR MSR handling in PMI by Andi Kleen · 10 years ago
  84. b37609c perf/x86/intel: Make the HT bug workaround conditional on HT enabled by Stephane Eranian · 10 years ago
  85. c02cdbf perf/x86/intel: Limit to half counters when the HT workaround is enabled, to avoid exclusive mode starvation by Stephane Eranian · 10 years ago
  86. b63b4b4 perf/x86/intel: Enforce HT bug workaround with PEBS for SNB/IVB/HSW by Maria Dimakopoulou · 10 years ago
  87. e979121 perf/x86/intel: Implement cross-HT corruption bug workaround by Maria Dimakopoulou · 10 years ago
  88. 6f6539c perf/x86/intel: Add cross-HT counter exclusion infrastructure by Maria Dimakopoulou · 10 years ago
  89. 79cba82 perf/x86: Add 'index' param to get_event_constraint() callback by Stephane Eranian · 10 years ago
  90. c5362c0 perf/x86: Add 3 new scheduling callbacks by Maria Dimakopoulou · 10 years ago
  91. 9041346 perf/x86: Vectorize cpuc->kfree_on_online by Stephane Eranian · 10 years ago
  92. 9a5e3fb perf/x86: Rename x86_pmu::er_flags to 'flags' by Stephane Eranian · 10 years ago
  93. 8062382 perf/x86/intel/bts: Add BTS PMU driver by Alexander Shishkin · 10 years ago
  94. 52ca9ce perf/x86/intel/pt: Add Intel PT PMU driver by Alexander Shishkin · 10 years ago
  95. 4807034 perf/x86: Mark Intel PT and LBR/BTS as mutually exclusive by Alexander Shishkin · 10 years ago
  96. 294fe0f perf/x86/intel: Add INST_RETIRED.ALL workarounds by Andi Kleen · 10 years ago
  97. 2c44b19 perf/x86/intel: Expose LBR callstack to user space tooling by Peter Zijlstra · 10 years ago
  98. e18bf52 perf/x86/intel: Allocate space for storing LBR stack by Yan, Zheng · 10 years ago
  99. e9d7f7cd perf/x86/intel: Add basic Haswell LBR call stack support by Yan, Zheng · 10 years ago
  100. 2a0ad3b perf/x86/intel: Use context switch callback to flush LBR stack by Yan, Zheng · 10 years ago