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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 5bd4ae07e7970d73e3372910e60bb38623ac3064 / include / soc / arc / mcip.h
  1. 174ae4e ARCv2: IDU-intc: Add support for edge-triggered interrupts by Mischa Jonker · 5 years ago
  2. d2912cb treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 by Thomas Gleixner · 6 years ago
  3. f3205de ARC: mcip: update MCIP debug mask when the new cpu came online by Eugeniy Paltsev · 7 years ago
  4. 07423d0 ARC: mcip: halt GFRC counter when ARC cores halt by Eugeniy Paltsev · 7 years ago
  5. 6f0310a ARCv2: IDU-intc: Use build registers for getting numbers of interrupts by Yuriy Kolerov · 8 years ago
  6. 517e7610d ARCv2: MCIP: update the BCR per current changes by Vineet Gupta · 8 years ago
  7. 2d7f5c4 ARC: move mcip.h into include/soc and adjust the includes by Vineet Gupta · 8 years ago[Renamed (96%) from arch/arc/include/asm/mcip.h]
  8. c33a605 ARC: breakout aux handling into a separate header by Vineet Gupta · 8 years ago
  9. 3ce0fef ARCv2: intc: untangle SMP, MCIP and IDU by Vineet Gupta · 8 years ago
  10. d584f0f ARCv2: clocksource: Rename GRTC -> GFRC ... by Vineet Gupta · 9 years ago
  11. aa0efcd ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_smp() by Vineet Gupta · 9 years ago
  12. 26b8f99 ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_early_smp() by Vineet Gupta · 9 years ago
  13. 72d7288 ARCv2: SMP: clocksource: Enable Global Real Time counter by Vineet Gupta · 10 years ago
  14. 82fea5a ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al by Vineet Gupta · 10 years ago