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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 5a9b1258170836151d7c0465523b7e869a2d21fb / drivers / soc / xilinx / xlnx_vcu.c
  1. 5a9b125 soc: xilinx: vcu: remove calculation of PLL configuration by Michael Tretter · 4 years ago
  2. 58ee6ba soc: xilinx: vcu: make the PLL configurable by Michael Tretter · 4 years ago
  3. 4472e18 soc: xilinx: vcu: make pll post divider explicit by Michael Tretter · 4 years ago
  4. 9c789de soc: xilinx: vcu: implement clock provider for output clocks by Michael Tretter · 4 years ago
  5. 5a2b2e1 soc: xilinx: vcu: register PLL as fixed rate clock by Michael Tretter · 4 years ago
  6. f1bc982 soc: xilinx: vcu: implement PLL disable by Michael Tretter · 4 years ago
  7. 354dcf7 soc: xilinx: vcu: add helpers for configuring PLL by Michael Tretter · 4 years ago
  8. a3ab984 soc: xilinx: vcu: add helper to wait for PLL locked by Michael Tretter · 4 years ago
  9. d387dfc soc: xilinx: vcu: drop coreclk from struct xlnx_vcu by Michael Tretter · 4 years ago
  10. 30b79eb soc: xilinx: vcu: use vcu-settings syscon registers by Michael Tretter · 4 years, 2 months ago
  11. 853e69d soc: xilinx: vcu: drop useless success message by Michael Tretter · 4 years, 2 months ago
  12. 4bdc0d6 remove ioremap_nocache and devm_ioremap_nocache by Christoph Hellwig · 5 years ago
  13. 2a7157b soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv by Gustavo A. R. Silva · 7 years ago
  14. cee8113 soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver by Dhaval Shah · 7 years ago