Gitiles
Code Review Sign In
review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 326ac39b68e6aeb57d81c60c6078989955c225b5 / drivers / gpu / drm / i915 / i915_reg.h
  1. 326ac39b drm/i915/skl: Register definitions for SKL Clocks by Satheeshakrishna M · 10 years ago
  2. f1f55cc drm/i915: Add the predicate source registers to the register whitelist by Neil Roberts · 10 years ago
  3. 95289009 drm/i915/chv: Add new workarounds for chv by Arun Siluvery · 10 years ago
  4. eb84f97 Merge remote-tracking branch 'airlied/drm-next' into HEAD by Daniel Vetter · 10 years ago
  5. 82910ac drm/i915: make pipe/port based audio valid accessors easier to use by Jani Nikula · 10 years ago
  6. 38cff0b drm/i915/skl: Gen9 Forcewake by Zhe Wang · 10 years ago
  7. 8211bd5 drm/i915/skl: Program the DDB allocation by Damien Lespiau · 10 years ago
  8. fae1267 drm/i915/skl: Register definitions and macros for SKL Watermark regs by Pradeep Bhat · 10 years ago
  9. 2af30a5 drm/i915/skl: Read the Memory Latency Values for WM computation by Pradeep Bhat · 10 years ago
  10. c46f111 drm/i915: clean up and clarify audio related register defines by Jani Nikula · 10 years ago
  11. 1f9e14b Merge tag 'topic/core-stuff-2014-11-05' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 10 years ago
  12. 6ca2aeb drm/i915: Add support for CHV pipe B sprite CSC by Ville Syrjälä · 10 years ago
  13. c14b048 drm/i915: Initialize new chv primary plane and pipe blender registers by Ville Syrjälä · 10 years ago
  14. 4398ad4 drm/i915: Add rotation support for cursor plane (v5) by Ville Syrjälä · 10 years ago
  15. 5e56ba4 drm/i915/chv: Use 16 and 32 for low and high drain latency precision. by Rodrigo Vivi · 10 years ago
  16. 142d2ec drm/i915: Fix chv PCS DW11 register defines by Ville Syrjälä · 10 years ago
  17. 1447dde drm/i915/skl: Add 180 degree HW rotation support by Sonika Jindal · 10 years ago
  18. a8cbd45 Merge branch 'drm-intel-next-fixes' into drm-intel-next by Daniel Vetter · 10 years ago
  19. 32197aa gpu:drm: Fix typo in Documentation/DocBook/drm.xml by Masanari Iida · 10 years ago
  20. 570e2a7 drm/i915: Clear TX FIFO reset master override bits on chv by Ville Syrjälä · 10 years ago
  21. a02ef3c drm/i915: Make sure hardware uses the correct swing margin/deemph bits on chv by Ville Syrjälä · 10 years ago
  22. 5ca476f drm/i915: De-magic the PSR AUX message by Ville Syrjälä · 10 years ago
  23. ebb69c9 drm/i915: Enable pixel replicated modes on BDW and HSW. by Clint Taylor · 10 years ago
  24. 955e36d Merge branch 'topic/skl-stage1' into drm-intel-next-queued by Daniel Vetter · 10 years ago
  25. da09654 drm/i915/bdw: WaDisableFenceDestinationToSLM by Rodrigo Vivi · 10 years ago
  26. 7526ed7 Revert "drm/i915/bdw: BDW Software Turbo" by Daniel Vetter · 10 years ago
  27. dc2a41b drm/i915/skl: Implement drm_plane vfuncs by Damien Lespiau · 11 years ago
  28. 3ca5da4 drm/i915/skl: Implement WaDisableDgMirrorFixInHalfSliceChicken5:skl by Damien Lespiau · 11 years ago
  29. 770de83d drm/i915/skl: Adjust the display engine interrupts by Damien Lespiau · 11 years ago
  30. b9ca5fa drm/i915/skl: Provide a get_aux_send_ctl() vfunc for skylake by Damien Lespiau · 11 years ago
  31. 70d21f0 drm/i915/skl: Implement the new update_plane() for primary planes by Damien Lespiau · 12 years ago
  32. 40bae73 drm/i915: Extend BIOS stolen mem handling to all platform by Daniel Vetter · 10 years ago
  33. 40d201a Merge tag 'drm-intel-next-2014-09-05' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 10 years ago
  34. b2efb3f drm: backmerge tag 'v3.17-rc5' into drm-next by Dave Airlie · 10 years ago
  35. c4d69da drm/i915: Evict CS TLBs between batches by Chris Wilson · 10 years ago
  36. 81e7f20 drm/i915: Idle unused rings on gen2/3 during init/resume by Ville Syrjälä · 10 years ago
  37. 1038392 drm/i915: Disable trickle feed for gen2/3 by Ville Syrjälä · 10 years ago
  38. c76bb61 drm/i915/bdw: BDW Software Turbo by Daisy Sun · 10 years ago
  39. 2bb25c1 drm/i915: Populate mem_freq in init_gt_powerwave() by Ville Syrjälä · 10 years ago
  40. c5fe6a0 drm/i915: Rename defines for selection of ddi buffer translation slot by Sonika Jindal · 10 years ago
  41. ad933b5 drm/i915: Parametrize PANEL_PORT_SELECT_VLV by Ville Syrjälä · 10 years ago
  42. 48404c1 drm/i915: Add 180 degree primary plane rotation support by Sonika Jindal · 10 years ago
  43. dc41c15 drm/i915: Add support for variable cursor size on 845/865 by Ville Syrjälä · 10 years ago
  44. 73d477f drm/i915/bdw: Interrupts with logical rings by Oscar Mateo · 10 years ago
  45. 4da46e1 drm/i915/bdw: GEN-specific logical ring emit request by Oscar Mateo · 10 years ago
  46. 8670d6f drm/i915/bdw: Populate LR contexts (somewhat) by Oscar Mateo · 10 years ago
  47. 01e184c drm/i915: Add sprite watermark programming for VLV and CHV by Gajanan Bhat · 10 years ago
  48. 0948c26 drm/i915: Generalize drain latency computation by Gajanan Bhat · 10 years ago
  49. efd814b drm/i915: Polish the chv cmnlane resrt macros by Ville Syrjälä · 11 years ago
  50. 1abc4dc drm/i915: Parametrize VLV_DDL registers by Ville Syrjälä · 11 years ago
  51. 0a56067 drm/i915: Fill out the FWx watermark register defines by Ville Syrjälä · 11 years ago
  52. 76eebda drm/i915: Add 180 degree sprite rotation support by Ville Syrjälä · 10 years ago
  53. 7fad359 drm/i915: remove duplicate register defines by Paulo Zanoni · 10 years ago
  54. da46f93 drm/i915: Introduce FBC False Color for debug purposes. by Rodrigo Vivi · 10 years ago
  55. 1fb4450 drm/i915: Clarify CHV swing margin/deemph bits by Ville Syrjälä · 11 years ago
  56. 383c5a6 drm/i915: Add cdclk change support for chv by Ville Syrjälä · 11 years ago
  57. aad3d14 drm/i915: Add DP training pattern 3 for CHV by Ville Syrjälä · 11 years ago
  58. 2ce147f drm/i915: Add chv port D TX wells by Ville Syrjälä · 11 years ago
  59. 26972b0 drm/i915: Add per-pipe power wells for chv by Ville Syrjälä · 11 years ago
  60. 5d6f7ea drm/i915: Add chv cmnlane power wells by Ville Syrjälä · 11 years ago
  61. 22c5aee drm/i915: Fix drain latency precision multipler for VLV by Zhenyu Wang · 11 years ago
  62. 5d42f82 Merge tag 'v3.16' into drm-next by Dave Airlie · 10 years ago
  63. 4dac3ed Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next by Daniel Vetter · 10 years ago
  64. 01b887c drm/i915: add some registers need for displayport MST support. by Dave Airlie · 11 years ago
  65. 542a6b2 drm/i915/chv: calculate rc6 residency correctly by Mika Kuoppala · 10 years ago
  66. 67c3bf6 drm/i915: populate mem_freq/cz_clock for chv by Deepak S · 10 years ago
  67. 716c2e5 drm/i915: Switch to common shared dpll framework for WRPLLs by Daniel Vetter · 11 years ago
  68. d452c5b drm/i915: State readout support for WRPLLs by Daniel Vetter · 11 years ago
  69. 26804af drm/i915: State readout and cross-checking for ddi_pll_sel by Daniel Vetter · 11 years ago
  70. 114fe48 drm/i915: Clean up WRPLL/SPLL #defines by Daniel Vetter · 11 years ago
  71. 9ccd5ae drm/i915: fix D_COMP usage on BDW by Paulo Zanoni · 11 years ago
  72. f1e1c21 drm/i915: Don't clobber the GTT when it's within stolen memory by Ville Syrjälä · 11 years ago
  73. 31685c2 drm/i915/vlv: WA for Turbo and RC6 to work together. by Deepak S · 11 years ago
  74. 5ee426c drm/i915/bdw: implement semaphore wait by Ben Widawsky · 11 years ago
  75. 3e78998 drm/i915/bdw: implement semaphore signal by Ben Widawsky · 11 years ago
  76. 9cf33db drm/i915: Give names to the CCK_DISPLAY_CLOCK_CONTROL bits by Ville Syrjälä · 11 years ago
  77. c9224fa drm/i915: Add some L3 registers to the parser whitelist by Brad Volkin · 11 years ago
  78. 9576c27 drm/i915: update BDW DDI buffer translations by Paulo Zanoni · 11 years ago
  79. 82c5625 drm/i915: BDW PSR: Add single frame update support. by Rodrigo Vivi · 11 years ago
  80. a8aab8b drm/i915: Fix VLV CRC reading. by Rodrigo Vivi · 11 years ago
  81. a211b49 drm/i915: Add #defines for short/long pulse on gmch platforms by Daniel Vetter · 11 years ago
  82. a2560a6 drm/i915: Use transcoder as index to MIPI regs by Shashank Sharma · 11 years ago
  83. 4ad83e9 drm/i915: Change Mipi register definitions by Shashank Sharma · 11 years ago
  84. 2dcbc34 drm/i915/chv: Handle video DIP registers on CHV by Ville Syrjälä · 11 years ago
  85. 2d401b1 drm/i915: Don't use pipe_offset stuff for DPLL registers by Ville Syrjälä · 11 years ago
  86. b9e5ac3 drm/i915/chv: Force clock buffer enables by Ville Syrjälä · 11 years ago
  87. 9197c88 drm/i915/chv: Try to program the PHY used clock channel overrides by Ville Syrjälä · 11 years ago
  88. 2b6b3a0 drm/i915/chv: Enable RPS (Turbo) for Cherryview by Deepak S · 11 years ago
  89. 3880774 drm/i915/chv: Enable Render Standby (RC6) for Cherryview by Deepak S · 11 years ago
  90. 54e472a drm/i915: Enable interrupt-based AGPBUSY# enable on 85x by Ville Syrjälä · 11 years ago
  91. 3299254 drm/i915: Flip the sense of AGPBUSY_DIS bit by Ville Syrjälä · 11 years ago
  92. fa4f53c drm/i915: Implement WaVcpClkGateDisableForMediaReset:ctg, elk by Ville Syrjälä · 11 years ago
  93. 0e76718 drm/i915: Add a brief description of the VLV display PHY internals by Ville Syrjälä · 11 years ago
  94. 75f7f3e drm/i915: Fix mmio vs. CS flip race on ILK+ by Ville Syrjälä · 11 years ago
  95. 646b426 drm/i915: Drop /** */ comments from i915_reg.h by Ville Syrjälä · 11 years ago
  96. e4443e4 drm/i915/chv: Add a bunch of pre production workarounds by Ville Syrjälä · 11 years ago
  97. 1966e59 drm/i915/chv: Use RMW to toggle swing calc init by Ville Syrjälä · 11 years ago
  98. f72df8d drm/i915/chv: Don't do group access reads from TX lanes either by Ville Syrjälä · 11 years ago
  99. 97fd4d5 drm/i915/chv: Don't use PCS group access reads by Ville Syrjälä · 11 years ago
  100. d2152b2 drm/i915/chv: Set soft reset override bit for data lane resets by Ville Syrjälä · 11 years ago