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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 2c8580e4e21c17011e78e7ac4e1fbab8b0d632bf / drivers / gpu / drm / i915 / i915_reg.h
  1. 2c8580e drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 to HW whitelist by Arun Siluvery · 9 years ago
  2. 3669ab6 drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelist by Arun Siluvery · 9 years ago
  3. e0f3fa0 drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelist by Arun Siluvery · 9 years ago
  4. 33136b0 drm/i915/gen9: Add framework to whitelist specific GPU registers by Arun Siluvery · 9 years ago
  5. 2da80b5 Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued by Daniel Vetter · 9 years ago
  6. 8ac3e1b drm/i915: Add non claimed mmio checking for vlv/chv by Mika Kuoppala · 9 years ago
  7. ade1ba7 Merge tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 9 years ago
  8. f03d8ed drm/doc: Convert to markdown by Danilo Cesar Lemes de Paula · 9 years ago
  9. 56c4897 drm/i915: dual link pipe selection for bxt by Deepak M · 9 years ago
  10. f7be2c2 drm/i915: Disable CLKOUT_DP bending on LPT/WPT as needed by Ville Syrjälä · 9 years ago
  11. 61ad992 drm/i915: Correct the Ref clock value for BXT by Deepak M · 9 years ago
  12. 65e472e drm/i915: Don't register the CRT connector when it's fused off on LPT-H by Ville Syrjälä · 9 years ago
  13. d965e7ac drm/i915/bxt: backlight clock gating workaround by Imre Deak · 9 years ago
  14. f0f59a0 drm/i915: Type safe register read/write by Ville Syrjälä · 9 years ago
  15. 9bca5d0 drm/i915: Add missing ')' to SKL_PS_ECC_STAT define by Ville Syrjälä · 9 years ago
  16. 35dc3f9 drm/i915: Give names to more ring registers by Ville Syrjälä · 9 years ago
  17. e597ef4 drm/i915: Make the cmd parser 64bit regs explicit by Ville Syrjälä · 9 years ago
  18. 8697600 drm/i915: Make the high dword offset more explicit in i915_reg_read_ioctl by Ville Syrjälä · 9 years ago
  19. e6c4c76 drm/i915: Parametrize MOCS registers by Ville Syrjälä · 9 years ago
  20. 6fa1c5f drm/i915: Parametrize L3 error registers by Ville Syrjälä · 9 years ago
  21. 086f8e8 drm/i915: Prefix raw register defines with underscore by Ville Syrjälä · 9 years ago
  22. 9f836f9 drm/i915/gen9: Turn DC handling into a power well by Patrik Jakobsson · 9 years ago
  23. cd02ac5 drm/i915: Explain usage of power well IDs vs bit groups by Patrik Jakobsson · 9 years ago
  24. 13ae3a0 drm/i915/gen9: simplify DC toggling code by Imre Deak · 9 years ago
  25. 56fcfd6 drm/i915: fix the power well ID for always on wells by Imre Deak · 9 years ago
  26. 443a389 drm/i915: Add dev_priv->psr_mmio_base by Ville Syrjälä · 9 years ago
  27. da00bdc drm/i915: Remove the magic AUX_CTL is at DP + foo tricks by Ville Syrjälä · 9 years ago
  28. 750a951 drm/i915: Parametrize AUX registers by Ville Syrjälä · 9 years ago
  29. b377e0d drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/ by Ville Syrjälä · 9 years ago
  30. 6fb403d drm/i915: Add csr programming registers to dmc debugfs entry by Mika Kuoppala · 9 years ago
  31. 16e11b9 drm/i915/bxt: Expose DC5 entry count by Mika Kuoppala · 9 years ago
  32. 8337206 drm/i915/skl: Expose DC5/DC6 entry counts by Damien Lespiau · 9 years ago
  33. f1b391a drm/i915/skl: While sanitizing cdclock check the SWF18 as well by Shobhit Kumar · 9 years ago
  34. 01403de drm/i915: Use paramtrized WRPLL_CTL() by Ville Syrjälä · 9 years ago
  35. 85fa792 drm/i915: Parametrize and fix SWF registers by Ville Syrjälä · 9 years ago
  36. fd8f507c drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc. by Ville Syrjälä · 9 years ago
  37. 395b291 drm/i915: Fix a few bad hex numbers in register defines by Ville Syrjälä · 9 years ago
  38. 68d9753 drm/i915: Protect register macro arguments by Ville Syrjälä · 9 years ago
  39. 699fc40 drm/i915: Include gpio_mmio_base in GMBUS reg defines by Ville Syrjälä · 9 years ago
  40. 436c6d4 drm/i915: Parametrize HSW video DIP data registers by Ville Syrjälä · 9 years ago
  41. 03999f0 drm/i915: Eliminate weird parameter inversion from BXT PPS registers by Ville Syrjälä · 9 years ago
  42. 26148bd drm/i915/bxt: Set time interval unit to 0.833us by Akash Goel · 9 years ago
  43. 7b9748c drm/i915: Add GEN7_GPGPU_DISPATCHDIMX/Y/Z to the register whitelist by Jordan Justen · 9 years ago
  44. 022e4e5 drm/i915/bxt: Modify BXT BLC according to VBT changes by Sunil Kamath · 9 years ago
  45. 11b8e4f drm/i915/bxt: Program Tx Rx and Dphy clocks by Shashank Sharma · 9 years ago
  46. 37ab081 drm/i915/bxt: DSI enable for BXT by Shashank Sharma · 9 years ago
  47. 13d70b8 drm/i915: rename INSTDONE1 to GEN4_INSTDONE1 by Imre Deak · 9 years ago
  48. bd93a50 drm/i915: rename INSTDONE to GEN2_INSTDONE by Imre Deak · 9 years ago
  49. f1d5434 drm/i915: remove duplicate names for the render ring INSTDONE register by Imre Deak · 9 years ago
  50. 923c1241 drm/i915: s/GET_CFG_CR1_REG/DPLL_CFGCR1/ etc. by Ville Syrjälä · 9 years ago
  51. 91bedd3 drm/i915/bdw: Check for slice, subslice and EU count for BDW by Łukasz Daniluk · 9 years ago
  52. bfa7df0 drm/i915: Read czclk from CCK on vlv/chv by Ville Syrjälä · 9 years ago
  53. 87d5d25 drm/i915: Renaming CCK related reg definitions by Vandana Kannan · 9 years ago
  54. e66eb81 drm/i915: Add VLV_HDMIB etc. which already include VLV_DISPLAY_BASE by Ville Syrjälä · 9 years ago
  55. f65a9c5 drm/i915: Parametrize PALETTE and LGC_PALETTE by Ville Syrjälä · 9 years ago
  56. c039b7f drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR by Ville Syrjälä · 9 years ago
  57. 7e435ad drm/i915: Add LO/HI PRIVATE_PAT registers by Ville Syrjälä · 9 years ago
  58. eecf613 drm/i915: Parametrize fence registers by Ville Syrjälä · 9 years ago
  59. 9c58a04 drm/i915/bxt: Set oscaledcompmethod to enable scale value by Sonika Jindal · 9 years ago
  60. 9712e68 drm/i915: Parametrize DDI_BUF_TRANS registers by Ville Syrjälä · 9 years ago
  61. 184d7c0 drm/i915: Parametrize TV luma/chroma filter registers by Ville Syrjälä · 9 years ago
  62. 616847e drm/i915: Parametrize ILK turbo registers by Ville Syrjälä · 9 years ago
  63. 4d110c7 drm/i915: Parametrize FBC_TAG registers by Ville Syrjälä · 9 years ago
  64. 22dfe79 drm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITS by Ville Syrjälä · 9 years ago
  65. 7d316ae drm/i915: Implement stolen reserved detection for ctg/elk by Ville Syrjälä · 9 years ago
  66. d2e08c0 drm/i915/bxt: DSI prepare changes for BXT by Shashank Sharma · 9 years ago
  67. cfe01a5 drm/i915/bxt: Enable BXT DSI PLL by Shashank Sharma · 9 years ago
  68. 6b6d562 drm/i915/gen9: WA ST Unit Power Optimization Disable by Robert Beckett · 9 years ago
  69. 5b88aba drm/i915/bxt: Add WaSetClckGatingDisableMedia by Arun Siluvery · 9 years ago
  70. aa17cdb drm/i915: initialize backlight max from VBT by Jani Nikula · 9 years ago
  71. a52bb15 drm/i915: Rewrite BXT HPD code to conform to pre-existing style by Ville Syrjälä · 9 years ago
  72. 74c0b39 drm/i915: Add port A HPD support for SPT by Ville Syrjälä · 9 years ago
  73. 195baa0 drm/i915: Rename BXT PORTA HPD defines by Ville Syrjälä · 9 years ago
  74. 40bfd7a drm/i915: Clean up various HPD defines by Ville Syrjälä · 9 years ago
  75. e93c28f Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queued by Daniel Vetter · 9 years ago
  76. 3014227 drm/i915: Add CHV PHY LDO power sanity checks by Ville Syrjälä · 10 years ago
  77. 6669e39 drm/i915: Add some CHV DPIO lane power state asserts by Ville Syrjälä · 10 years ago
  78. 3e28878 drm/i915: Force CL2 off in CHV x1 PHY by Ville Syrjälä · 10 years ago
  79. ee27921 drm/i915: Enable DPIO SUS clock gating on CHV by Ville Syrjälä · 10 years ago
  80. e0fce78 drm/i915: Implement PHY lane power gating for CHV by Ville Syrjälä · 10 years ago
  81. 26951ca drm/i915/skl: enable DDI-E hotplug by Xiong Zhang · 9 years ago
  82. f1afe24 drm/i915: Change SRM, LRM instructions to use correct length by Arun Siluvery · 9 years ago
  83. 4df001d drm/i915: Interrupt routing for GuC submission by Dave Gordon · 9 years ago
  84. 33a732f drm/i915: GuC-specific firmware loader by Alex Dai · 9 years ago
  85. 90a6b7b drm/i915: Move intel_dp->lane_count into pipe_config by Ville Syrjälä · 10 years ago
  86. 2dba323 drm/i915/gen8: Add 4 level switching infrastructure and lrc support by Michel Thierry · 9 years ago
  87. 3774eb5 drm/i915: fix stolen bios_reserved checks by Paulo Zanoni · 9 years ago
  88. 245d966 drm/i915:skl: Add WaEnableGapsTsvCreditFix by Arun Siluvery · 9 years ago
  89. 63c88d2 drm/i915/bxt: add support for HPD long/short pulse detection on HPD_PORT_A pin by Imre Deak · 10 years ago
  90. ca6e440 Merge tag 'drm-intel-fixes-2015-07-15' into drm-intel-next-queued by Daniel Vetter · 10 years ago
  91. 6381b55 drm/i915/gen9: Implement WaDisableKillLogic for gen 9 by Nick Hoath · 10 years ago
  92. 3bbaba0 drm/i915: Added Programming of the MOCS by Peter Antoine · 10 years ago
  93. 60bfe44 drm/i915: Apply OCD to VLV/CHV DPLL defines by Ville Syrjälä · 10 years ago
  94. 9e00084 drm/i915: Update WaFlushCoherentL3CacheLinesAtContextSwitch by Arun Siluvery · 10 years ago
  95. 4c436d55 drm/i915: Enable Resource Streamer state save/restore on MI_SET_CONTEXT by Abdiel Janulgue · 10 years ago
  96. 919032e drm/i915: Enable resource streamer bits on MI_BATCH_BUFFER_START by Abdiel Janulgue · 10 years ago
  97. e629255 drm/i915/bxt: BUNs related to port PLL by Vandana Kannan · 10 years ago
  98. c021bf1 Merge tag 'drm-intel-next-fixes-2015-07-02' of git://anongit.freedesktop.org/drm-intel by Linus Torvalds · 10 years ago
  99. aa610dc drm/i915/bxt: add DDI port HW readout support by Imre Deak · 10 years ago
  100. 05712c1 drm/i915/bxt: add missing DDI PLL registers to the state checking by Imre Deak · 10 years ago