- 70868a1 Merge tag 'cxl-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl by Linus Torvalds · 3 years, 4 months ago
- 2b922a9 cxl/registers: Fix Documentation warning by Dan Williams · 3 years, 4 months ago
- a01da6c cxl/pmem: Fix Documentation warning by Dan Williams · 3 years, 4 months ago
- da582aa cxl/pci: Fix debug message in cxl_probe_regs() by Li Qiang (Johnny Li) · 3 years, 4 months ago
- 9e56614 cxl/pci: Fix lockdown level by Dan Williams · 3 years, 4 months ago
- a7bfaad cxl/acpi: Do not add DSDT disabled ACPI0016 host bridge ports by Alison Schofield · 3 years, 4 months ago
- ceeb0da cxl/mem: Adjust ram/pmem range to represent DPA ranges by Ira Weiny · 3 years, 7 months ago
- f847502 cxl/mem: Account for partitionable space in ram/pmem ranges by Ira Weiny · 3 years, 5 months ago
- 0b9159d cxl/pci: Store memory capacity values by Ira Weiny · 3 years, 7 months ago
- 5b68705 cxl/pci: Simplify register setup by Ben Widawsky · 3 years, 6 months ago
- 1e39db5 cxl/pci: Ignore unknown register block types by Ben Widawsky · 3 years, 6 months ago
- 3d135db cxl/core: Move memdev management to core by Ben Widawsky · 3 years, 6 months ago
- 9cc238c cxl/pci: Introduce cdevm_file_operations by Dan Williams · 3 years, 6 months ago
- 0f06157 cxl/core: Move register mapping infrastructure by Dan Williams · 3 years, 6 months ago
- 06737cd cxl/core: Move pmem functionality by Dan Williams · 3 years, 6 months ago
- 95aaed2 cxl/core: Improve CXL core kernel docs by Ben Widawsky · 3 years, 6 months ago
- 5161a55 cxl: Move cxl_core to new directory by Ben Widawsky · 3 years, 6 months ago
- fc7a620 bus: Make remove callback return void by Uwe Kleine-König · 3 years, 6 months ago
- 4ad6181 cxl/pci: Rename CXL REGLOC ID by Ben Widawsky · 3 years, 7 months ago
- 3e23d17 cxl/acpi: Use the ACPI CFMWS to create static decoder objects by Alison Schofield · 3 years, 7 months ago
- da6aafe cxl/acpi: Add the Host Bridge base address to CXL port objects by Alison Schofield · 3 years, 7 months ago
- 21083f5 cxl/pmem: Register 'pmem' / cxl_nvdimm devices by Dan Williams · 3 years, 7 months ago
- 8fdcb17 cxl/pmem: Add initial infrastructure for pmem support by Dan Williams · 3 years, 7 months ago
- 6af7139 cxl/core: Add cxl-bus driver infrastructure by Dan Williams · 3 years, 7 months ago
- 87815ee cxl/pci: Add media provisioning required commands by Ben Widawsky · 3 years, 9 months ago
- ba26864 cxl/component_regs: Fix offset by Ben Widawsky · 3 years, 7 months ago
- 6423035 cxl/hdm: Fix decoder count calculation by Ben Widawsky · 3 years, 7 months ago
- 40ba17a cxl/acpi: Introduce cxl_decoder objects by Dan Williams · 3 years, 7 months ago
- 3b94ce7 cxl/acpi: Enumerate host bridge root ports by Dan Williams · 3 years, 7 months ago
- 7d4b5ca cxl/acpi: Add downstream port data to cxl_port instances by Dan Williams · 3 years, 7 months ago
- 3feaa2d cxl/Kconfig: Default drivers to CONFIG_CXL_BUS by Dan Williams · 3 years, 7 months ago
- 4812be9 cxl/acpi: Introduce the root of a cxl_port topology by Dan Williams · 3 years, 7 months ago
- 605a5e4 cxl/pci: Fixup devm_cxl_iomap_block() to take a 'struct device *' by Dan Williams · 3 years, 8 months ago
- 0842237 cxl/pci: Add HDM decoder capabilities by Ben Widawsky · 3 years, 8 months ago
- 9a01652 cxl/pci: Reserve individual register block regions by Ira Weiny · 3 years, 8 months ago
- 30af972 cxl/pci: Map registers based on capabilities by Ira Weiny · 3 years, 8 months ago
- f8a7e8c cxl/pci: Reserve all device regions at once by Ira Weiny · 3 years, 8 months ago
- 07d62ea cxl/pci: Introduce cxl_decode_register_block() by Ira Weiny · 3 years, 8 months ago
- 6630d31 cxl/mem: Get rid of @cxlm.base by Ben Widawsky · 3 years, 8 months ago
- 1d5a415 cxl/mem: Move register locator logic into reg setup by Ben Widawsky · 3 years, 9 months ago
- 1b0a1a2 cxl/mem: Split creation from mapping in probe by Ben Widawsky · 3 years, 9 months ago
- 5d0c6f0 cxl/mem: Use dev instead of pdev->dev by Ben Widawsky · 3 years, 9 months ago
- dd2a93a cxl/mem: Demarcate vendor specific capability IDs by Ben Widawsky · 3 years, 8 months ago
- 199cf8c cxl/pci.c: Add a 'label_storage_size' attribute to the memdev by Vishal Verma · 3 years, 8 months ago
- 21e9f76 cxl: Rename mem to pci by Ben Widawsky · 3 years, 8 months ago
- 399d34e cxl/core: Refactor CXL register lookup for bridge reuse by Dan Williams · 3 years, 8 months ago
- 5f653f7 cxl/core: Rename bus.c to core.c by Dan Williams · 3 years, 8 months ago
- 8ac75dd cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devices by Dan Williams · 3 years, 8 months ago
- 5f50d6b cxl/mem: Move some definitions to mem.h by Dan Williams · 3 years, 8 months ago
- fae8817 cxl/mem: Fix memory device capacity probing by Dan Williams · 3 years, 9 months ago
- b21bb4cd cxl/mem: Fix register block offset calculation by Ben Widawsky · 3 years, 9 months ago
- 392be0b cxl/mem: Force array size of mem_commands[] to CXL_MEM_COMMAND_ID_MAX by Robert Richter · 3 years, 10 months ago
- 7eda645 cxl/mem: Disable cxl device power management by Dan Williams · 3 years, 10 months ago
- 1c3333a cxl/mem: Do not rely on device_add() side effects for dev_set_name() failures by Dan Williams · 3 years, 10 months ago
- 5877515 cxl/mem: Fix synchronization mechanism for device removal vs ioctl operations by Dan Williams · 3 years, 10 months ago
- 6eff572 cxl/mem: Use sysfs_emit() for attribute show routines by Dan Williams · 3 years, 10 months ago
- 88ff5d4 cxl/mem: Fix potential memory leak by Ben Widawsky · 3 years, 11 months ago
- 5829492 cxl/mem: Return -EFAULT if copy_to_user() fails by Dan Carpenter · 4 years ago
- 57ee605 cxl/mem: Add set of informational commands by Ben Widawsky · 4 years ago
- 472b1ce cxl/mem: Enable commands via CEL by Ben Widawsky · 4 years ago
- 1323718 cxl/mem: Add a "RAW" send command by Ben Widawsky · 4 years ago
- 583fa5e cxl/mem: Add basic IOCTL interface by Ben Widawsky · 4 years ago
- b39cb10 cxl/mem: Register CXL memX devices by Dan Williams · 4 years ago
- 8adaf74 cxl/mem: Find device capabilities by Ben Widawsky · 4 years ago
- 4cdadfd cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints by Dan Williams · 4 years ago