1. 1ffa325 drm/i915: set more FBC chicken bits by Jesse Barnes · 14 years ago
  2. 776ad80 drm/i915: detect & report PCH display error interrupts by Jesse Barnes · 14 years ago
  3. 88271da drm/i915: re-enable rc6 support for Ironlake+ by Jesse Barnes · 14 years ago
  4. 0f46832 drm/i915: Mask USER interrupts on gen6 (until required) by Chris Wilson · 14 years ago
  5. b79d499 drm/i915: support low power watermarks on Ironlake by Jesse Barnes · 14 years ago
  6. a6044e2 drm/i915: support overclocking on Sandy Bridge by Jesse Barnes · 14 years ago
  7. 3c5a62b drm/i915: fix calculation of eDP signal levels on Sandybridge by Yuanhan Liu · 14 years ago
  8. 4f12501 Merge branch 'master' of /home/airlied/kernel/linux-2.6 into drm-core-next by Dave Airlie · 14 years ago
  9. 4d30244 drm/i915: Verify Ironlake eDP presence on DP_A using the capability fuse by Chris Wilson · 14 years ago
  10. 06f3775 drm/i915: Set the required VFMUNIT clock gating disable on Ironlake. by Eric Anholt · 14 years ago
  11. 3b8d8d9 drm/i915: dynamic render p-state support for Sandy Bridge by Jesse Barnes · 14 years ago
  12. 0af7e4d drm/i915: Add support for precise vblank timestamping (v2) by Mario Kleiner · 14 years ago
  13. 9c04f01 drm/i915: Add frame buffer compression on Sandybridge by Yuanhan Liu · 14 years ago
  14. 1398261 drm/i915: Add self-refresh support on Sandybridge by Yuanhan Liu · 14 years ago
  15. 8fd2685 drm/i915: Enable RC6 autodownclocking on Sandybridge by Chris Wilson · 14 years ago
  16. eb43f4a drm/i915: Terminate the FORCE WAKE after we have finished reading by Chris Wilson · 14 years ago
  17. 1ec14ad drm/i915: Implement GPU semaphores for inter-ring synchronisation on SNB by Chris Wilson · 14 years ago
  18. c185812 drm/i915: Enable CB tuning of the Display PLL by Chris Wilson · 14 years ago
  19. b9e6867 Merge branch 'drm-intel-fixes' into drm-intel-next by Chris Wilson · 14 years ago
  20. 220cad3 drm/i915: Always set the DP transcoder config to 8BPC. by Eric Anholt · 14 years ago
  21. c664278 drm/i915: Add a mechanism for pipelining fence register updates by Daniel Vetter · 14 years ago
  22. cff458c drm/i915: Add support for GPU reset on gen6. by Eric Anholt · 14 years ago
  23. c4a1d9e drm/i915: Capture interesting display registers on error by Chris Wilson · 14 years ago
  24. 8168bd4 drm/i915: Remove the definitions for Primary Ring Buffer by Chris Wilson · 14 years ago
  25. cae5852 drm/i915/ringbuffer: set FORCE_WAKE bit before reading ring register by Zou Nan hai · 14 years ago
  26. 67e92af drm/i915: Apply display workaround required according to the B-Spec. by Eric Anholt · 14 years ago
  27. de6e2ea drm/i915: Apply B-spec mandated workaround for read flushes on Ironlake. by Eric Anholt · 14 years ago
  28. add354d drm/i915: Record BSD engine error state by Chris Wilson · 14 years ago
  29. 1d8f38f drm/i915: Record BLT engine error state by Chris Wilson · 14 years ago
  30. f406839 drm/i915: Capture ERROR register on Sandybridge hangs by Chris Wilson · 14 years ago
  31. 3c17fe4 i915: enable AVI infoframe for intel_hdmi.c [v4] by David Härdeman · 14 years ago
  32. 549f736 drm/i915: Enable SandyBridge blitter ring by Chris Wilson · 14 years ago
  33. 939fe4d drm/i915: Remove duplicate set of ADPA definitions by Chris Wilson · 14 years ago
  34. 2d7b836 drm/i915: Update hotplug interrupts register definitions for Sandybridge by Yuanhan Liu · 14 years ago
  35. 382b093 drm/i915: diasable clock gating for the panel power sequencer by Jesse Barnes · 14 years ago
  36. 5b2adf8 drm/i915: add Ironlake clock gating workaround for FDI link training by Jesse Barnes · 14 years ago
  37. 01cb9ea drm/i915/dp: eDP power sequencing fixes by Jesse Barnes · 14 years ago
  38. 58e10eb Merge branch 'drm-intel-fixes' into drm-intel-next by Chris Wilson · 14 years ago
  39. dc96e9b drm/i915: Try to reset gen2 devices. by Chris Wilson · 14 years ago
  40. 3d281d8 drm/i915: kill per-ring macros by Daniel Vetter · 14 years ago
  41. 95375b7 drm/i915: kill now unnecessary gtt defines from i915_reg.h by Daniel Vetter · 14 years ago
  42. 333e9fe drm/i915: add relative ring register macros by Daniel Vetter · 14 years ago
  43. b8aea0c drm/i915: kill duplicated/unneeded register defines by Daniel Vetter · 14 years ago
  44. 881f47b drm/i915: add a new BSD ring buffer for Sandybridge by Xiang, Haihao · 14 years ago
  45. 0573ed4 drm/i915: Add support for GPU soft reset on Ironlake. by Kenneth Graunke · 14 years ago
  46. eeccdca drm/i915: Rename graphics reset registers. by Kenneth Graunke · 14 years ago
  47. f899fc6 drm/i915: use GMBUS to manage i2c links by Chris Wilson · 14 years ago
  48. 5eddb70 drm/i915: Use macros to switch between equivalent pipe registers by Chris Wilson · 14 years ago
  49. 4ed765f drm/i915: Tidy Ironlake watermark computation by Chris Wilson · 14 years ago
  50. ea056c1 drm/i915: enable thermal reporting for IPS by Jesse Barnes · 14 years ago
  51. 8b3016c Merge branch 'drm-intel-fixes' into drm-intel-next by Chris Wilson · 14 years ago
  52. 021357a drm/i915: Use the real FDI frequency for determining b/w by Chris Wilson · 14 years ago
  53. dd8849c drm/i915: don't enable self-refresh on Ironlake by Jesse Barnes · 14 years ago
  54. 4f0d1af drm/i915: fix pipeconf dither bit definitions by Jesse Barnes · 14 years ago
  55. 4b60e5c drm/i915: Clear scanline waits after disabling the pipe. by Chris Wilson · 14 years ago
  56. b8ed2a4 drm/i915/tv: Preserve reserved DAC bits during mode-setting by Chris Wilson · 14 years ago
  57. a69ffdb drm/i915: Enable MI_FLUSH on Sandybridge by Zhenyu Wang · 14 years ago
  58. 9d0498a drm/i915: wait for actual vblank, not just 20ms by Jesse Barnes · 14 years ago
  59. aa40d6b drm/i915: Set up a render context on Ironlake by Zou Nan hai · 15 years ago
  60. 1cafd34 drm/i915 invalidate indirect state pointers at end of ring exec by Zou Nan hai · 15 years ago
  61. 94113ce drm/i915: Do not clobber the contents of TRANS_DP_CTL when enabling. by Chris Wilson · 14 years ago
  62. 2bd34f6 Merge remote branch 'origin/master' into drm-intel-next by Eric Anholt · 14 years ago
  63. 7aa69d2 drm/i915: Typo in #define by Nicolas Kaiser · 15 years ago
  64. b52eb4d drm/i915: Add frame buffer compression support on Ironlake mobile by Zhao Yakui · 15 years ago
  65. c936f44 drm/i915: Calculate cursor watermark under non-SR state for Ironlake by Zhao Yakui · 15 years ago
  66. 4fe5e61 drm/i915: Apply self-refresh watermark calculation for cursor plane by Zhao Yakui · 15 years ago
  67. 1b07e04 drm/i915: Fix fifo size for self-refresh watermark on 965G by Zhao Yakui · 15 years ago
  68. d874bcf drm/i915: remove duplicate PIPE*STAT bit definitions by Jesse Barnes · 15 years ago
  69. 225aa011 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel by Linus Torvalds · 14 years ago
  70. 4a655f0 drm/i915: add PANEL_UNLOCK_REGS definition by Jesse Barnes · 14 years ago
  71. 45503de drm/i915: Define MI_ARB_STATE bits by Keith Packard · 14 years ago
  72. 2d1c975 drm/i915: Fix CRT hotplug regression in 2.6.35-rc1 by Andy Lutomirski · 15 years ago
  73. 1afe3e9 drm/i915: gen3 page flipping fixes by Jesse Barnes · 15 years ago
  74. a1786bd drm/i915: Unmask interrupt for render engine on Sandybridge by Zhenyu Wang · 15 years ago
  75. 9553426 drm/i915: Add CxSR support on Pineview DDR3 by Li Peng · 15 years ago
  76. 467b200 drm/i915: Fix HDMI mode select for Cougarpoint PCH by Zhenyu Wang · 15 years ago
  77. 7648fa9 drm/i915: add power monitoring support by Jesse Barnes · 15 years ago
  78. 7a772c4 drm/i915/gen4: Extra CRT hotplug paranoia by Adam Jackson · 15 years ago
  79. d1b851f drm/i915: implement BSD ring buffer V2 by Zou Nan hai · 15 years ago
  80. 34dc4d4 Merge remote branch 'origin/master' into drm-intel-next by Eric Anholt · 15 years ago
  81. 0a31a44 drm/i915: Use spatio-temporal dithering on PCH by Adam Jackson · 15 years ago
  82. e552eb7 drm/i915: use PIPE_CONTROL instruction on Ironlake and Sandy Bridge by Jesse Barnes · 15 years ago
  83. c36a2a6 drm/i915: fix tiling limits for i915 class hw v2 by Daniel Vetter · 15 years ago
  84. 7f8a856 drm/i915: Add the support of memory self-refresh on Ironlake by Zhenyu Wang · 15 years ago
  85. d429434 drm/i915: Move Pineview CxSR and watermark code into update_wm hook. by Zhao Yakui · 15 years ago
  86. 461ed3c drm/i915: Add support of SDVO on Ibexpeak PCH by Zhao Yakui · 15 years ago
  87. 8db9d77 drm/i915: Support for Cougarpoint PCH display pipeline by Zhenyu Wang · 15 years ago
  88. 8956c8b drm/i915: Set up the documented clock gating on Sandybridge and Ironlake. by Eric Anholt · 15 years ago
  89. 71cf39b drm/i915: Enable VS timer dispatch. by Eric Anholt · 15 years ago
  90. 4967790 drm/i915: Rename FBC_C3_IDLE to FBC_CTL_C3_IDLE to match other registers by Priit Laes · 15 years ago
  91. 14bc490 drm/i915, agp/intel: Fix stolen memory size on Sandybridge by Zhenyu Wang · 15 years ago
  92. f6e450a drm/i915: Fix sandybridge status page setup. by Eric Anholt · 15 years ago
  93. 4e901fd drm/i915: Set up fence registers on sandybridge. by Eric Anholt · 15 years ago
  94. 9df3079 drm/i915: Record batch buffer following GPU error by Chris Wilson · 15 years ago
  95. b5b72e8 drm/i915: Deobfuscate the render p-state obfuscation by Matthew Garrett · 15 years ago
  96. f97108d drm/i915: add dynamic performance control support for Ironlake by Jesse Barnes · 15 years ago
  97. ee980b8 drm/i915: enable memory self refresh on 9xx by Li Peng · 15 years ago
  98. ee25df2 drm/i915: handle FBC and self-refresh better by Jesse Barnes · 15 years ago
  99. 21bd770 drm/i915: Fix the incorrect cursor A bit definition in DSPFW2 register by Zhao Yakui · 15 years ago
  100. 898822c drm/i915: Enable/disable the dithering for LVDS based on VBT setting by Zhao Yakui · 15 years ago