1. 10d9be6 clk: tegra: Unlock top rates for Tegra124 DFLL clock by Mikko Perttunen · 9 years ago
  2. c5a132a clk: tegra: Fix some static checker problems by Stephen Boyd · 9 years ago
  3. 62a8a09 clk: tegra: Add Tegra124 DFLL clocksource platform driver by Tuomas Tynkkynen · 10 years ago
  4. c4fe70a clk: tegra: Add closed loop support for the DFLL by Tuomas Tynkkynen · 10 years ago
  5. d8d7a08 clk: tegra: Add library for the DFLL clock source (open-loop mode) by Tuomas Tynkkynen · 10 years ago