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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 107de3724eff5a6fa6474a4d2aa5460b63749ebf / drivers / clk / clk-vt8500.c
  1. 419e321 clk: vt8500: Fix unbalanced spinlock in vt8500_dclk_set_rate() by Tony Prisk · 12 years ago
  2. 362ed48 Merge tag 'clk-for-linus-3.10' of git://git.linaro.org/people/mturquette/linux by Linus Torvalds · 12 years ago
  3. bdca21e clk: vt8500: Missing breaks in vtwm_pll_round_rate/_set_rate. by Tony Prisk · 12 years ago
  4. d6d1053 clk: vt8500: Fix "fix device clock divisor calculations" by Arnd Bergmann · 12 years ago
  5. 5b6e0ad clk: vt8500: Use common of_clk_init() function by Prashant Gaikwad · 12 years ago
  6. abb165a clk: vt8500: Add support for WM8750/WM8850 PLL clocks by Tony Prisk · 12 years ago
  7. 58eb5a6 clk: vt8500: Fix division-by-0 when requested rate=0 by Tony Prisk · 12 years ago
  8. 7248001 clk: vt8500: Fix device clock divisor calculations by Tony Prisk · 12 years ago
  9. 35a5db5 clk: vt8500: Fix error in PLL calculations on non-exact match. by Tony Prisk · 12 years ago
  10. 973e1d1 CLK: vt8500: Fix SDMMC clk special cases by Tony Prisk · 12 years ago
  11. 85814d6 arm: vt8500: clk: Add Common Clock Framework support by Tony Prisk · 12 years ago