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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 017636cc09e2c58bc493cc1fe74d858f50d173af / drivers / gpu / drm / i915 / intel_pm.c
  1. 017636c drm/i915: Disable LP1+ watermarks safely in init by Ville Syrjälä · 11 years ago
  2. ce0e071 drm/i915: Linetime watermarks are a HSW feature by Ville Syrjälä · 11 years ago
  3. 6c8b6c2 drm/i915: Disable FBC WM on ILK, and disable LP2+ when FBC is enabled by Ville Syrjälä · 11 years ago
  4. 0ba22e2 drm/i915: Don't merge LP1+ watermarks on ILK/SNB/IVB when multiple pipes are enabled by Ville Syrjälä · 11 years ago
  5. facd619b drm/i915: Fix LP1+ watermark disabling ILK by Ville Syrjälä · 11 years ago
  6. 6cef2b8a drm/i915: Fix LP1 sprite watermarks for ILK/SNB by Ville Syrjälä · 11 years ago
  7. 7b39a0b drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabled by Ville Syrjälä · 11 years ago
  8. a68d68e drm/i915: Add ILK/SNB/IVB WM latency field support by Ville Syrjälä · 11 years ago
  9. ac9545f drm/i915: Add IVB DDB partitioning control by Ville Syrjälä · 11 years ago
  10. 691bb71 drm/i915: Use IS_VALLEYVIEW() to test the is_valleyview flag by Damien Lespiau · 11 years ago
  11. ab57fff drm/i915/bdw: Implement ff workarounds by Ben Widawsky · 11 years ago
  12. 63801f2 drm/i915/bdw: Force all Data Cache Data Port access to be Non-Coherent by Ben Widawsky · 11 years ago
  13. 993495a drm/i915: Rework the FBC interval/stall stuff a bit by Ville Syrjälä · 11 years ago
  14. 159f987 drm/i915: FBC_CONTROL2 is gen4 only by Ville Syrjälä · 11 years ago
  15. 42a430f drm/i915: Gen2 FBC1 CFB pitch wants 32B units by Ville Syrjälä · 11 years ago
  16. f9dcb0d drm/i915: touch VGA MSR after we enable the power well by Paulo Zanoni · 11 years ago
  17. d5e8fdc drm/i915: extract hsw_power_well_post_{enable, disable} by Paulo Zanoni · 11 years ago
  18. 8a18745 drm/i915: add initial Runtime PM functions by Paulo Zanoni · 11 years ago
  19. d62292c drm/i915: get a PC8 reference when enabling the power well by Paulo Zanoni · 11 years ago
  20. f7698ba Merge tag 'v3.13-rc3' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  21. 4004546 drm/i915: Reorganize FBC function pointer initializaition by Ville Syrjälä · 11 years ago
  22. c5a44aa drm/i915: Fix FBC1 plane checks for gen2 by Ville Syrjälä · 11 years ago
  23. ddf9c53 drm/i915: add intel_display_power_enabled_sw() for use in atomic ctx by Imre Deak · 11 years ago
  24. 6b88f29 drm/i915/vlv: use parallel context restore when coming out of RC6 by Jesse Barnes · 11 years ago
  25. 2f0aa304 drm/i915/vlv: use a lower RC6 timeout on VLV by Jesse Barnes · 11 years ago
  26. 940aece drm/i915/vlv: Valleyview support for forcewake Individual power wells. by Deepak S · 11 years ago
  27. c8d9a59 drm/i915: Add power well arguments to force wake routines. by Deepak S · 11 years ago
  28. 1da5158 drm/i915: add a debugfs entry for power domain info by Imre Deak · 11 years ago
  29. 1c2256d drm/i915: add a default always-on power well by Imre Deak · 11 years ago
  30. f7243ac drm/i915: don't do BDW/HSW specific powerdomains init on other platforms by Imre Deak · 11 years ago
  31. 6f3ef5d drm/i915: add always-on power wells instead of special casing them by Imre Deak · 11 years ago
  32. c1ca727 drm/i915: support for multiple power wells by Imre Deak · 11 years ago
  33. fbeeaa2 drm/i915: add audio power domain by Imre Deak · 11 years ago
  34. d629336 drm/i915: Don't set the fence number in DPFC_CTL on SNB by Ville Syrjälä · 11 years ago
  35. b19870e drm/i915: Use plane_name() in gen7_enable_fbc() by Ville Syrjälä · 11 years ago
  36. f727b49 drm/i915: Fix gen3 self-refresh watermarks by Daniel Vetter · 11 years ago
  37. 29c78f6 Partially revert "drm/i915: tune the RC6 threshold for stability" by Daniel Vetter · 11 years ago
  38. c09cd6e Merge branch 'backlight-rework' into drm-intel-next-queued by Daniel Vetter · 11 years ago
  39. 596cc11 drm/i915/bdw: PIPE_[BC] I[ME]R moved to powerwell by Ben Widawsky · 11 years ago
  40. 4c2e7a5 drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints by Ben Widawsky · 11 years ago
  41. a75f362 drm/i915/bdw: conservative SBE VUE cache mode by Ben Widawsky · 11 years ago
  42. 7f88da0 drm/i915/bdw: Limit SDE poly depth FIFO to 2 by Ben Widawsky · 11 years ago
  43. bf66347 drm/i915/bdw: Sampler power bypass disable by Ben Widawsky · 11 years ago
  44. fd392b6 ddrm/i915/bdw: Disable centroid pixel perf optimization by Ben Widawsky · 11 years ago
  45. 4afe8d3 drm/i915/bdw: BWGTLB clock gate disable by Ben Widawsky · 11 years ago
  46. fe4ab3c drm/i915/bdw: Implement edp PSR workarounds by Ben Widawsky · 11 years ago
  47. 6edee7f drm/i915/bdw: Create a separate BDW rps enable by Ben Widawsky · 11 years ago
  48. 46c764d drm/i915/bdw: Use HSW formula for ring freq scaling by Ben Widawsky · 11 years ago
  49. 416f472 drm/i915/bdw: Add Broadwell display FIFO limits by Ville Syrjälä · 11 years ago
  50. 50ed5fb drm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriority by Ben Widawsky · 11 years ago
  51. 6745a2c drm/i915/bdw: Broadwell also has the "power down well" by Paulo Zanoni · 11 years ago
  52. 1020a5c drm/i915/bdw: Clock gating init by Ben Widawsky · 11 years ago
  53. 4c79156 drm/i915: Kill vlv_update_rps_cur_delay() by Ville Syrjälä · 11 years ago
  54. 6917c7b drm/i915: Initialise min/max frequencies before updating RPS registers by Chris Wilson · 11 years ago
  55. 2325991 drm/i915/vlv: Workaround a punit issue in DDR data rate for 1333. by Chon Ming Lee · 11 years ago
  56. 2ec3815 drm/i915: Pass dev_priv to vlv_gpu_freq() and vlv_freq_opcode() by Ville Syrjälä · 11 years ago
  57. 07ab118 drm/i915: Improve vlv_gpu_freq() and vlv_freq_opcode() by Ville Syrjälä · 11 years ago
  58. f64a28a drm/i915/vlv: fixup DDR freq detection per Punit spec by Jesse Barnes · 11 years ago
  59. 85b1d7b drm/i915: move VLV DDR freq fetch into init_clock_gating by Jesse Barnes · 11 years ago
  60. 7f16e5c Merge tag 'v3.12' into drm-intel-next by Daniel Vetter · 11 years ago
  61. 1ad577a drm/i915: add back checking for i915_disable_power_well by Imre Deak · 11 years ago
  62. ddb642f drm/i915: rename i915_init_power_well to init_power_domains_init by Imre Deak · 11 years ago
  63. b4ed448 drm/i915: remove device field from struct power_well by Imre Deak · 11 years ago
  64. baa7070 drm/i915: use power get/put instead of set for power on after init by Imre Deak · 11 years ago
  65. 83c00f5 drm/i915: prepare for multiple power wells by Imre Deak · 11 years ago
  66. 8c7b72f drm/i915: Remove WaFbcDisableDpfcClockGating on HSW by Ben Widawsky · 11 years ago
  67. a74b0c4 drm/i915: Remove WaFbcDisableDpfcClockGating on IVB by Ben Widawsky · 11 years ago
  68. 153b4b95 drm/i915: Convert straggling MCHBAR registers by Ben Widawsky · 11 years ago
  69. 959cbc1 drm/i915: change power_well->lock to be mutex by Imre Deak · 11 years ago
  70. bddc764 drm/i915: factor out is_always_on_domain by Imre Deak · 11 years ago
  71. dc39fff drm/i915: Print RC6 info less often by Ben Widawsky · 11 years ago
  72. ec98c8d drm/i915: Check 5/6 DDB split only when sprites are enabled by Ville Syrjälä · 11 years ago
  73. d939565 drm/i915: Rename ilk_check_wm to ilk_validate_wm_level by Ville Syrjälä · 11 years ago
  74. 34982fe drm/i915: Rename ilk_wm_max to ilk_compute_wm_maximums by Ville Syrjälä · 11 years ago
  75. dcaf13f drm/i915: Remove a somewhat silly debug print from watermark code by Ville Syrjälä · 11 years ago
  76. 243e6a4 drm/i915: Init HSW watermark tracking in intel_modeset_setup_hw_state() by Ville Syrjälä · 11 years ago
  77. 49a687c drm/i915: Improve watermark dirtyness checks by Ville Syrjälä · 11 years ago
  78. 609cede drm/i915: Store current watermark state in dev_priv->wm by Ville Syrjälä · 11 years ago
  79. 7eaa4d5 drm/i915: Kill fbc_wm_enabled from intel_wm_config by Ville Syrjälä · 11 years ago
  80. b380ca3 drm/i915: Refactor wm_lp to level calculation by Ville Syrjälä · 11 years ago
  81. a5db6b6 drm/i915: Check 5/6 DDB split only when sprites are enabled by Ville Syrjälä · 11 years ago
  82. a485bfb drm/i915: Move some computations out from hsw_compute_wm_parameters() by Ville Syrjälä · 11 years ago
  83. 198a1e9 drm/i915: Use intel_pipe_wm in hsw_find_best_results by Ville Syrjälä · 11 years ago
  84. 0362c78 drm/i915: Move LP1+ watermark merging out from hsw_compute_wm_results() by Ville Syrjälä · 11 years ago
  85. 7c4a395 drm/i915: Don't re-compute pipe watermarks except for the affected pipe by Ville Syrjälä · 11 years ago
  86. 0b2ae6d drm/i915: Add intel_pipe_wm and prepare for watermark pre-compute by Ville Syrjälä · 11 years ago
  87. cd66407 drm/i915: disable LVDS clock gating on CPT v2 by Jesse Barnes · 11 years ago
  88. c0951f0 drm/i915: Avoid tweaking RPS before it is enabled by Chris Wilson · 11 years ago
  89. 4c445e0 drm/i915: Rename primary_disabled to primary_enabled by Ville Syrjälä · 11 years ago
  90. eda7964 drm/i915: Use the real cpu max frequency for ring scaling by Ben Widawsky · 11 years ago
  91. 1dba99f drm/i915: Rename intel_flush_display_plane to intel_flush_primary_plane by Ville Syrjälä · 11 years ago
  92. 967ad7f Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next by Daniel Vetter · 11 years ago
  93. 5380e92 drm: Collect per-crtc vblank stuff to a struct by Ville Syrjälä · 11 years ago
  94. dd75fdc drm/i915: Tweak RPS thresholds to more aggressively downclock by Chris Wilson · 11 years ago
  95. b29c19b drm/i915: Boost RPS frequency for CPU stalls by Chris Wilson · 11 years ago
  96. f6aca45 drm/i915: Clean up the ring scaling calculations by Ben Widawsky · 11 years ago
  97. f3fc488 drm/i915/hsw: Disable L3 caching of atomic memory operations. by Francisco Jerez · 11 years ago
  98. 671952a drm/i915: fix rps.vlv_work initialization by Imre Deak · 11 years ago
  99. 5134099 drm/i915: Make intel_resume_power_well() static by Damien Lespiau · 11 years ago
  100. f7d85c1 drm/i915/vlv: reduce GT FIFO error info to a debug message by Jesse Barnes · 11 years ago