blob: 5e766174c2f47eb029ed3bd43b94b03c7b0df124 [file] [log] [blame]
Geert Uytterhoevendcc09fd2016-04-20 14:02:38 +02001/*
2 * Renesas R-Car System Controller
3 *
4 * Copyright (C) 2016 Glider bvba
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 */
10#ifndef __SOC_RENESAS_RCAR_SYSC_H__
11#define __SOC_RENESAS_RCAR_SYSC_H__
12
13#include <linux/types.h>
14
15
16/*
17 * Power Domain flags
18 */
19#define PD_CPU BIT(0) /* Area contains main CPU core */
20#define PD_SCU BIT(1) /* Area contains SCU and L2 cache */
21#define PD_NO_CR BIT(2) /* Area lacks PWR{ON,OFF}CR registers */
22
23#define PD_BUSY BIT(3) /* Busy, for internal use only */
24
25#define PD_CPU_CR PD_CPU /* CPU area has CR (R-Car H1) */
26#define PD_CPU_NOCR PD_CPU | PD_NO_CR /* CPU area lacks CR (R-Car Gen2/3) */
27#define PD_ALWAYS_ON PD_NO_CR /* Always-on area */
28
29
30/*
31 * Description of a Power Area
32 */
33
34struct rcar_sysc_area {
35 const char *name;
36 u16 chan_offs; /* Offset of PWRSR register for this area */
37 u8 chan_bit; /* Bit in PWR* (except for PWRUP in PWRSR) */
38 u8 isr_bit; /* Bit in SYSCI*R */
39 int parent; /* -1 if none */
40 unsigned int flags; /* See PD_* */
41};
42
43
44/*
45 * SoC-specific Power Area Description
46 */
47
48struct rcar_sysc_info {
49 const struct rcar_sysc_area *areas;
50 unsigned int num_areas;
51};
52
Geert Uytterhoeven9b83ea12016-04-20 14:02:41 +020053extern const struct rcar_sysc_info r8a7779_sysc_info;
Geert Uytterhoevenad7c9db2016-04-20 14:02:42 +020054extern const struct rcar_sysc_info r8a7790_sysc_info;
Geert Uytterhoevenc5fbb3c2016-04-20 14:02:43 +020055extern const struct rcar_sysc_info r8a7791_sysc_info;
Geert Uytterhoeven9af1dbc2016-04-20 14:02:45 +020056extern const struct rcar_sysc_info r8a7794_sysc_info;
Geert Uytterhoeven23f1e2e2016-04-20 14:02:46 +020057extern const struct rcar_sysc_info r8a7795_sysc_info;
Geert Uytterhoevendcc09fd2016-04-20 14:02:38 +020058#endif /* __SOC_RENESAS_RCAR_SYSC_H__ */